1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2018 Jernej Skrabec <jernej.skrabec@siol.net> 4 */ 5 6 #include <linux/component.h> 7 #include <linux/module.h> 8 #include <linux/of_device.h> 9 #include <linux/platform_device.h> 10 11 #include <drm/drm_of.h> 12 #include <drm/drmP.h> 13 #include <drm/drm_crtc_helper.h> 14 15 #include "sun8i_dw_hdmi.h" 16 #include "sun8i_tcon_top.h" 17 18 static void sun8i_dw_hdmi_encoder_mode_set(struct drm_encoder *encoder, 19 struct drm_display_mode *mode, 20 struct drm_display_mode *adj_mode) 21 { 22 struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder); 23 24 if (hdmi->quirks->set_rate) 25 clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000); 26 } 27 28 static const struct drm_encoder_helper_funcs 29 sun8i_dw_hdmi_encoder_helper_funcs = { 30 .mode_set = sun8i_dw_hdmi_encoder_mode_set, 31 }; 32 33 static const struct drm_encoder_funcs sun8i_dw_hdmi_encoder_funcs = { 34 .destroy = drm_encoder_cleanup, 35 }; 36 37 static enum drm_mode_status 38 sun8i_dw_hdmi_mode_valid_a83t(struct drm_connector *connector, 39 const struct drm_display_mode *mode) 40 { 41 if (mode->clock > 297000) 42 return MODE_CLOCK_HIGH; 43 44 return MODE_OK; 45 } 46 47 static enum drm_mode_status 48 sun8i_dw_hdmi_mode_valid_h6(struct drm_connector *connector, 49 const struct drm_display_mode *mode) 50 { 51 /* This is max for HDMI 2.0b (4K@60Hz) */ 52 if (mode->clock > 594000) 53 return MODE_CLOCK_HIGH; 54 55 return MODE_OK; 56 } 57 58 static bool sun8i_dw_hdmi_node_is_tcon_top(struct device_node *node) 59 { 60 return IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP) && 61 !!of_match_node(sun8i_tcon_top_of_table, node); 62 } 63 64 static u32 sun8i_dw_hdmi_find_possible_crtcs(struct drm_device *drm, 65 struct device_node *node) 66 { 67 struct device_node *port, *ep, *remote, *remote_port; 68 u32 crtcs = 0; 69 70 remote = of_graph_get_remote_node(node, 0, -1); 71 if (!remote) 72 return 0; 73 74 if (sun8i_dw_hdmi_node_is_tcon_top(remote)) { 75 port = of_graph_get_port_by_id(remote, 4); 76 if (!port) 77 goto crtcs_exit; 78 79 for_each_child_of_node(port, ep) { 80 remote_port = of_graph_get_remote_port(ep); 81 if (remote_port) { 82 crtcs |= drm_of_crtc_port_mask(drm, remote_port); 83 of_node_put(remote_port); 84 } 85 } 86 } else { 87 crtcs = drm_of_find_possible_crtcs(drm, node); 88 } 89 90 crtcs_exit: 91 of_node_put(remote); 92 93 return crtcs; 94 } 95 96 static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master, 97 void *data) 98 { 99 struct platform_device *pdev = to_platform_device(dev); 100 struct dw_hdmi_plat_data *plat_data; 101 struct drm_device *drm = data; 102 struct device_node *phy_node; 103 struct drm_encoder *encoder; 104 struct sun8i_dw_hdmi *hdmi; 105 int ret; 106 107 if (!pdev->dev.of_node) 108 return -ENODEV; 109 110 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); 111 if (!hdmi) 112 return -ENOMEM; 113 114 plat_data = &hdmi->plat_data; 115 hdmi->dev = &pdev->dev; 116 encoder = &hdmi->encoder; 117 118 hdmi->quirks = of_device_get_match_data(dev); 119 120 encoder->possible_crtcs = 121 sun8i_dw_hdmi_find_possible_crtcs(drm, dev->of_node); 122 /* 123 * If we failed to find the CRTC(s) which this encoder is 124 * supposed to be connected to, it's because the CRTC has 125 * not been registered yet. Defer probing, and hope that 126 * the required CRTC is added later. 127 */ 128 if (encoder->possible_crtcs == 0) 129 return -EPROBE_DEFER; 130 131 hdmi->rst_ctrl = devm_reset_control_get(dev, "ctrl"); 132 if (IS_ERR(hdmi->rst_ctrl)) { 133 dev_err(dev, "Could not get ctrl reset control\n"); 134 return PTR_ERR(hdmi->rst_ctrl); 135 } 136 137 hdmi->clk_tmds = devm_clk_get(dev, "tmds"); 138 if (IS_ERR(hdmi->clk_tmds)) { 139 dev_err(dev, "Couldn't get the tmds clock\n"); 140 return PTR_ERR(hdmi->clk_tmds); 141 } 142 143 hdmi->regulator = devm_regulator_get(dev, "hvcc"); 144 if (IS_ERR(hdmi->regulator)) { 145 dev_err(dev, "Couldn't get regulator\n"); 146 return PTR_ERR(hdmi->regulator); 147 } 148 149 ret = regulator_enable(hdmi->regulator); 150 if (ret) { 151 dev_err(dev, "Failed to enable regulator\n"); 152 return ret; 153 } 154 155 ret = reset_control_deassert(hdmi->rst_ctrl); 156 if (ret) { 157 dev_err(dev, "Could not deassert ctrl reset control\n"); 158 goto err_disable_regulator; 159 } 160 161 ret = clk_prepare_enable(hdmi->clk_tmds); 162 if (ret) { 163 dev_err(dev, "Could not enable tmds clock\n"); 164 goto err_assert_ctrl_reset; 165 } 166 167 phy_node = of_parse_phandle(dev->of_node, "phys", 0); 168 if (!phy_node) { 169 dev_err(dev, "Can't found PHY phandle\n"); 170 goto err_disable_clk_tmds; 171 } 172 173 ret = sun8i_hdmi_phy_probe(hdmi, phy_node); 174 of_node_put(phy_node); 175 if (ret) { 176 dev_err(dev, "Couldn't get the HDMI PHY\n"); 177 goto err_disable_clk_tmds; 178 } 179 180 drm_encoder_helper_add(encoder, &sun8i_dw_hdmi_encoder_helper_funcs); 181 drm_encoder_init(drm, encoder, &sun8i_dw_hdmi_encoder_funcs, 182 DRM_MODE_ENCODER_TMDS, NULL); 183 184 sun8i_hdmi_phy_init(hdmi->phy); 185 186 plat_data->mode_valid = hdmi->quirks->mode_valid; 187 sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data); 188 189 platform_set_drvdata(pdev, hdmi); 190 191 hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data); 192 193 /* 194 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(), 195 * which would have called the encoder cleanup. Do it manually. 196 */ 197 if (IS_ERR(hdmi->hdmi)) { 198 ret = PTR_ERR(hdmi->hdmi); 199 goto cleanup_encoder; 200 } 201 202 return 0; 203 204 cleanup_encoder: 205 drm_encoder_cleanup(encoder); 206 sun8i_hdmi_phy_remove(hdmi); 207 err_disable_clk_tmds: 208 clk_disable_unprepare(hdmi->clk_tmds); 209 err_assert_ctrl_reset: 210 reset_control_assert(hdmi->rst_ctrl); 211 err_disable_regulator: 212 regulator_disable(hdmi->regulator); 213 214 return ret; 215 } 216 217 static void sun8i_dw_hdmi_unbind(struct device *dev, struct device *master, 218 void *data) 219 { 220 struct sun8i_dw_hdmi *hdmi = dev_get_drvdata(dev); 221 222 dw_hdmi_unbind(hdmi->hdmi); 223 sun8i_hdmi_phy_remove(hdmi); 224 clk_disable_unprepare(hdmi->clk_tmds); 225 reset_control_assert(hdmi->rst_ctrl); 226 regulator_disable(hdmi->regulator); 227 } 228 229 static const struct component_ops sun8i_dw_hdmi_ops = { 230 .bind = sun8i_dw_hdmi_bind, 231 .unbind = sun8i_dw_hdmi_unbind, 232 }; 233 234 static int sun8i_dw_hdmi_probe(struct platform_device *pdev) 235 { 236 return component_add(&pdev->dev, &sun8i_dw_hdmi_ops); 237 } 238 239 static int sun8i_dw_hdmi_remove(struct platform_device *pdev) 240 { 241 component_del(&pdev->dev, &sun8i_dw_hdmi_ops); 242 243 return 0; 244 } 245 246 static const struct sun8i_dw_hdmi_quirks sun8i_a83t_quirks = { 247 .mode_valid = sun8i_dw_hdmi_mode_valid_a83t, 248 .set_rate = true, 249 }; 250 251 static const struct sun8i_dw_hdmi_quirks sun50i_h6_quirks = { 252 .mode_valid = sun8i_dw_hdmi_mode_valid_h6, 253 }; 254 255 static const struct of_device_id sun8i_dw_hdmi_dt_ids[] = { 256 { 257 .compatible = "allwinner,sun8i-a83t-dw-hdmi", 258 .data = &sun8i_a83t_quirks, 259 }, 260 { 261 .compatible = "allwinner,sun50i-h6-dw-hdmi", 262 .data = &sun50i_h6_quirks, 263 }, 264 { /* sentinel */ }, 265 }; 266 MODULE_DEVICE_TABLE(of, sun8i_dw_hdmi_dt_ids); 267 268 static struct platform_driver sun8i_dw_hdmi_pltfm_driver = { 269 .probe = sun8i_dw_hdmi_probe, 270 .remove = sun8i_dw_hdmi_remove, 271 .driver = { 272 .name = "sun8i-dw-hdmi", 273 .of_match_table = sun8i_dw_hdmi_dt_ids, 274 }, 275 }; 276 module_platform_driver(sun8i_dw_hdmi_pltfm_driver); 277 278 MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>"); 279 MODULE_DESCRIPTION("Allwinner DW HDMI bridge"); 280 MODULE_LICENSE("GPL"); 281