1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2018 Jernej Skrabec <jernej.skrabec@siol.net> 4 */ 5 6 #include <linux/component.h> 7 #include <linux/module.h> 8 #include <linux/of_device.h> 9 #include <linux/platform_device.h> 10 11 #include <drm/drm_crtc_helper.h> 12 #include <drm/drm_of.h> 13 14 #include "sun8i_dw_hdmi.h" 15 #include "sun8i_tcon_top.h" 16 17 static void sun8i_dw_hdmi_encoder_mode_set(struct drm_encoder *encoder, 18 struct drm_display_mode *mode, 19 struct drm_display_mode *adj_mode) 20 { 21 struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder); 22 23 if (hdmi->quirks->set_rate) 24 clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000); 25 } 26 27 static const struct drm_encoder_helper_funcs 28 sun8i_dw_hdmi_encoder_helper_funcs = { 29 .mode_set = sun8i_dw_hdmi_encoder_mode_set, 30 }; 31 32 static const struct drm_encoder_funcs sun8i_dw_hdmi_encoder_funcs = { 33 .destroy = drm_encoder_cleanup, 34 }; 35 36 static enum drm_mode_status 37 sun8i_dw_hdmi_mode_valid_a83t(struct drm_connector *connector, 38 const struct drm_display_mode *mode) 39 { 40 if (mode->clock > 297000) 41 return MODE_CLOCK_HIGH; 42 43 return MODE_OK; 44 } 45 46 static enum drm_mode_status 47 sun8i_dw_hdmi_mode_valid_h6(struct drm_connector *connector, 48 const struct drm_display_mode *mode) 49 { 50 /* 51 * Controller support maximum of 594 MHz, which correlates to 52 * 4K@60Hz 4:4:4 or RGB. However, for frequencies greater than 53 * 340 MHz scrambling has to be enabled. Because scrambling is 54 * not yet implemented, just limit to 340 MHz for now. 55 */ 56 if (mode->clock > 340000) 57 return MODE_CLOCK_HIGH; 58 59 return MODE_OK; 60 } 61 62 static bool sun8i_dw_hdmi_node_is_tcon_top(struct device_node *node) 63 { 64 return IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP) && 65 !!of_match_node(sun8i_tcon_top_of_table, node); 66 } 67 68 static u32 sun8i_dw_hdmi_find_possible_crtcs(struct drm_device *drm, 69 struct device_node *node) 70 { 71 struct device_node *port, *ep, *remote, *remote_port; 72 u32 crtcs = 0; 73 74 remote = of_graph_get_remote_node(node, 0, -1); 75 if (!remote) 76 return 0; 77 78 if (sun8i_dw_hdmi_node_is_tcon_top(remote)) { 79 port = of_graph_get_port_by_id(remote, 4); 80 if (!port) 81 goto crtcs_exit; 82 83 for_each_child_of_node(port, ep) { 84 remote_port = of_graph_get_remote_port(ep); 85 if (remote_port) { 86 crtcs |= drm_of_crtc_port_mask(drm, remote_port); 87 of_node_put(remote_port); 88 } 89 } 90 } else { 91 crtcs = drm_of_find_possible_crtcs(drm, node); 92 } 93 94 crtcs_exit: 95 of_node_put(remote); 96 97 return crtcs; 98 } 99 100 static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master, 101 void *data) 102 { 103 struct platform_device *pdev = to_platform_device(dev); 104 struct dw_hdmi_plat_data *plat_data; 105 struct drm_device *drm = data; 106 struct device_node *phy_node; 107 struct drm_encoder *encoder; 108 struct sun8i_dw_hdmi *hdmi; 109 int ret; 110 111 if (!pdev->dev.of_node) 112 return -ENODEV; 113 114 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); 115 if (!hdmi) 116 return -ENOMEM; 117 118 plat_data = &hdmi->plat_data; 119 hdmi->dev = &pdev->dev; 120 encoder = &hdmi->encoder; 121 122 hdmi->quirks = of_device_get_match_data(dev); 123 124 encoder->possible_crtcs = 125 sun8i_dw_hdmi_find_possible_crtcs(drm, dev->of_node); 126 /* 127 * If we failed to find the CRTC(s) which this encoder is 128 * supposed to be connected to, it's because the CRTC has 129 * not been registered yet. Defer probing, and hope that 130 * the required CRTC is added later. 131 */ 132 if (encoder->possible_crtcs == 0) 133 return -EPROBE_DEFER; 134 135 hdmi->rst_ctrl = devm_reset_control_get(dev, "ctrl"); 136 if (IS_ERR(hdmi->rst_ctrl)) { 137 dev_err(dev, "Could not get ctrl reset control\n"); 138 return PTR_ERR(hdmi->rst_ctrl); 139 } 140 141 hdmi->clk_tmds = devm_clk_get(dev, "tmds"); 142 if (IS_ERR(hdmi->clk_tmds)) { 143 dev_err(dev, "Couldn't get the tmds clock\n"); 144 return PTR_ERR(hdmi->clk_tmds); 145 } 146 147 hdmi->regulator = devm_regulator_get(dev, "hvcc"); 148 if (IS_ERR(hdmi->regulator)) { 149 dev_err(dev, "Couldn't get regulator\n"); 150 return PTR_ERR(hdmi->regulator); 151 } 152 153 ret = regulator_enable(hdmi->regulator); 154 if (ret) { 155 dev_err(dev, "Failed to enable regulator\n"); 156 return ret; 157 } 158 159 ret = reset_control_deassert(hdmi->rst_ctrl); 160 if (ret) { 161 dev_err(dev, "Could not deassert ctrl reset control\n"); 162 goto err_disable_regulator; 163 } 164 165 ret = clk_prepare_enable(hdmi->clk_tmds); 166 if (ret) { 167 dev_err(dev, "Could not enable tmds clock\n"); 168 goto err_assert_ctrl_reset; 169 } 170 171 phy_node = of_parse_phandle(dev->of_node, "phys", 0); 172 if (!phy_node) { 173 dev_err(dev, "Can't found PHY phandle\n"); 174 goto err_disable_clk_tmds; 175 } 176 177 ret = sun8i_hdmi_phy_probe(hdmi, phy_node); 178 of_node_put(phy_node); 179 if (ret) { 180 dev_err(dev, "Couldn't get the HDMI PHY\n"); 181 goto err_disable_clk_tmds; 182 } 183 184 drm_encoder_helper_add(encoder, &sun8i_dw_hdmi_encoder_helper_funcs); 185 drm_encoder_init(drm, encoder, &sun8i_dw_hdmi_encoder_funcs, 186 DRM_MODE_ENCODER_TMDS, NULL); 187 188 sun8i_hdmi_phy_init(hdmi->phy); 189 190 plat_data->mode_valid = hdmi->quirks->mode_valid; 191 sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data); 192 193 platform_set_drvdata(pdev, hdmi); 194 195 hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data); 196 197 /* 198 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(), 199 * which would have called the encoder cleanup. Do it manually. 200 */ 201 if (IS_ERR(hdmi->hdmi)) { 202 ret = PTR_ERR(hdmi->hdmi); 203 goto cleanup_encoder; 204 } 205 206 return 0; 207 208 cleanup_encoder: 209 drm_encoder_cleanup(encoder); 210 sun8i_hdmi_phy_remove(hdmi); 211 err_disable_clk_tmds: 212 clk_disable_unprepare(hdmi->clk_tmds); 213 err_assert_ctrl_reset: 214 reset_control_assert(hdmi->rst_ctrl); 215 err_disable_regulator: 216 regulator_disable(hdmi->regulator); 217 218 return ret; 219 } 220 221 static void sun8i_dw_hdmi_unbind(struct device *dev, struct device *master, 222 void *data) 223 { 224 struct sun8i_dw_hdmi *hdmi = dev_get_drvdata(dev); 225 226 dw_hdmi_unbind(hdmi->hdmi); 227 sun8i_hdmi_phy_remove(hdmi); 228 clk_disable_unprepare(hdmi->clk_tmds); 229 reset_control_assert(hdmi->rst_ctrl); 230 regulator_disable(hdmi->regulator); 231 } 232 233 static const struct component_ops sun8i_dw_hdmi_ops = { 234 .bind = sun8i_dw_hdmi_bind, 235 .unbind = sun8i_dw_hdmi_unbind, 236 }; 237 238 static int sun8i_dw_hdmi_probe(struct platform_device *pdev) 239 { 240 return component_add(&pdev->dev, &sun8i_dw_hdmi_ops); 241 } 242 243 static int sun8i_dw_hdmi_remove(struct platform_device *pdev) 244 { 245 component_del(&pdev->dev, &sun8i_dw_hdmi_ops); 246 247 return 0; 248 } 249 250 static const struct sun8i_dw_hdmi_quirks sun8i_a83t_quirks = { 251 .mode_valid = sun8i_dw_hdmi_mode_valid_a83t, 252 .set_rate = true, 253 }; 254 255 static const struct sun8i_dw_hdmi_quirks sun50i_h6_quirks = { 256 .mode_valid = sun8i_dw_hdmi_mode_valid_h6, 257 }; 258 259 static const struct of_device_id sun8i_dw_hdmi_dt_ids[] = { 260 { 261 .compatible = "allwinner,sun8i-a83t-dw-hdmi", 262 .data = &sun8i_a83t_quirks, 263 }, 264 { 265 .compatible = "allwinner,sun50i-h6-dw-hdmi", 266 .data = &sun50i_h6_quirks, 267 }, 268 { /* sentinel */ }, 269 }; 270 MODULE_DEVICE_TABLE(of, sun8i_dw_hdmi_dt_ids); 271 272 static struct platform_driver sun8i_dw_hdmi_pltfm_driver = { 273 .probe = sun8i_dw_hdmi_probe, 274 .remove = sun8i_dw_hdmi_remove, 275 .driver = { 276 .name = "sun8i-dw-hdmi", 277 .of_match_table = sun8i_dw_hdmi_dt_ids, 278 }, 279 }; 280 module_platform_driver(sun8i_dw_hdmi_pltfm_driver); 281 282 MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>"); 283 MODULE_DESCRIPTION("Allwinner DW HDMI bridge"); 284 MODULE_LICENSE("GPL"); 285