1133add5bSMaxime Ripard // SPDX-License-Identifier: GPL-2.0+
2133add5bSMaxime Ripard /*
3133add5bSMaxime Ripard * Copyright (c) 2016 Allwinnertech Co., Ltd.
4133add5bSMaxime Ripard * Copyright (C) 2017-2018 Bootlin
5133add5bSMaxime Ripard *
6133add5bSMaxime Ripard * Maxime Ripard <maxime.ripard@bootlin.com>
7133add5bSMaxime Ripard */
8133add5bSMaxime Ripard
9133add5bSMaxime Ripard #include <linux/clk.h>
10133add5bSMaxime Ripard #include <linux/component.h>
11133add5bSMaxime Ripard #include <linux/crc-ccitt.h>
129c25a297SSam Ravnborg #include <linux/module.h>
13133add5bSMaxime Ripard #include <linux/of_address.h>
149c25a297SSam Ravnborg #include <linux/phy/phy-mipi-dphy.h>
159c25a297SSam Ravnborg #include <linux/phy/phy.h>
169c25a297SSam Ravnborg #include <linux/platform_device.h>
17133add5bSMaxime Ripard #include <linux/regmap.h>
181c056ad8SJagan Teki #include <linux/regulator/consumer.h>
19133add5bSMaxime Ripard #include <linux/reset.h>
20c51756d5SKees Cook #include <linux/slab.h>
21133add5bSMaxime Ripard
22133add5bSMaxime Ripard #include <drm/drm_atomic_helper.h>
23133add5bSMaxime Ripard #include <drm/drm_mipi_dsi.h>
24133add5bSMaxime Ripard #include <drm/drm_panel.h>
259c25a297SSam Ravnborg #include <drm/drm_print.h>
26fcd70cd3SDaniel Vetter #include <drm/drm_probe_helper.h>
27f9f3a38dSThomas Zimmermann #include <drm/drm_simple_kms_helper.h>
28133add5bSMaxime Ripard
291c1a7aa3SKonstantin Sudakov #include "sun4i_crtc.h"
301c1a7aa3SKonstantin Sudakov #include "sun4i_tcon.h"
31133add5bSMaxime Ripard #include "sun6i_mipi_dsi.h"
32133add5bSMaxime Ripard
33133add5bSMaxime Ripard #include <video/mipi_display.h>
34133add5bSMaxime Ripard
35133add5bSMaxime Ripard #define SUN6I_DSI_CTL_REG 0x000
36133add5bSMaxime Ripard #define SUN6I_DSI_CTL_EN BIT(0)
37133add5bSMaxime Ripard
38133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL_REG 0x00c
391c1a7aa3SKonstantin Sudakov #define SUN6I_DSI_BASIC_CTL_TRAIL_INV(n) (((n) & 0xf) << 4)
401c1a7aa3SKonstantin Sudakov #define SUN6I_DSI_BASIC_CTL_TRAIL_FILL BIT(3)
41133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL_HBP_DIS BIT(2)
42133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL_HSA_HSE_DIS BIT(1)
43133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL_VIDEO_BURST BIT(0)
44133add5bSMaxime Ripard
45133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL0_REG 0x010
46133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL0_HS_EOTP_EN BIT(18)
47133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL0_CRC_EN BIT(17)
48133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL0_ECC_EN BIT(16)
49133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL0_INST_ST BIT(0)
50133add5bSMaxime Ripard
51133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL1_REG 0x014
52133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL1_VIDEO_ST_DELAY(n) (((n) & 0x1fff) << 4)
53133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL1_VIDEO_FILL BIT(2)
54133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL1_VIDEO_PRECISION BIT(1)
55133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_CTL1_VIDEO_MODE BIT(0)
56133add5bSMaxime Ripard
57133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_SIZE0_REG 0x018
58133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_SIZE0_VBP(n) (((n) & 0xfff) << 16)
59133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_SIZE0_VSA(n) ((n) & 0xfff)
60133add5bSMaxime Ripard
61133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_SIZE1_REG 0x01c
62133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_SIZE1_VT(n) (((n) & 0xfff) << 16)
63133add5bSMaxime Ripard #define SUN6I_DSI_BASIC_SIZE1_VACT(n) ((n) & 0xfff)
64133add5bSMaxime Ripard
65133add5bSMaxime Ripard #define SUN6I_DSI_INST_FUNC_REG(n) (0x020 + (n) * 0x04)
66133add5bSMaxime Ripard #define SUN6I_DSI_INST_FUNC_INST_MODE(n) (((n) & 0xf) << 28)
67133add5bSMaxime Ripard #define SUN6I_DSI_INST_FUNC_ESCAPE_ENTRY(n) (((n) & 0xf) << 24)
68133add5bSMaxime Ripard #define SUN6I_DSI_INST_FUNC_TRANS_PACKET(n) (((n) & 0xf) << 20)
69133add5bSMaxime Ripard #define SUN6I_DSI_INST_FUNC_LANE_CEN BIT(4)
70133add5bSMaxime Ripard #define SUN6I_DSI_INST_FUNC_LANE_DEN(n) ((n) & 0xf)
71133add5bSMaxime Ripard
72133add5bSMaxime Ripard #define SUN6I_DSI_INST_LOOP_SEL_REG 0x040
73133add5bSMaxime Ripard
74133add5bSMaxime Ripard #define SUN6I_DSI_INST_LOOP_NUM_REG(n) (0x044 + (n) * 0x10)
75133add5bSMaxime Ripard #define SUN6I_DSI_INST_LOOP_NUM_N1(n) (((n) & 0xfff) << 16)
76133add5bSMaxime Ripard #define SUN6I_DSI_INST_LOOP_NUM_N0(n) ((n) & 0xfff)
77133add5bSMaxime Ripard
78133add5bSMaxime Ripard #define SUN6I_DSI_INST_JUMP_SEL_REG 0x048
79133add5bSMaxime Ripard
80133add5bSMaxime Ripard #define SUN6I_DSI_INST_JUMP_CFG_REG(n) (0x04c + (n) * 0x04)
81133add5bSMaxime Ripard #define SUN6I_DSI_INST_JUMP_CFG_TO(n) (((n) & 0xf) << 20)
82133add5bSMaxime Ripard #define SUN6I_DSI_INST_JUMP_CFG_POINT(n) (((n) & 0xf) << 16)
83133add5bSMaxime Ripard #define SUN6I_DSI_INST_JUMP_CFG_NUM(n) ((n) & 0xffff)
84133add5bSMaxime Ripard
85133add5bSMaxime Ripard #define SUN6I_DSI_TRANS_START_REG 0x060
86133add5bSMaxime Ripard
87133add5bSMaxime Ripard #define SUN6I_DSI_TRANS_ZERO_REG 0x078
88133add5bSMaxime Ripard
89133add5bSMaxime Ripard #define SUN6I_DSI_TCON_DRQ_REG 0x07c
90133add5bSMaxime Ripard #define SUN6I_DSI_TCON_DRQ_ENABLE_MODE BIT(28)
91133add5bSMaxime Ripard #define SUN6I_DSI_TCON_DRQ_SET(n) ((n) & 0x3ff)
92133add5bSMaxime Ripard
93133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_CTL0_REG 0x080
94133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_CTL0_PD_PLUG_DISABLE BIT(16)
95133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_CTL0_FORMAT(n) ((n) & 0xf)
96133add5bSMaxime Ripard
97133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_CTL1_REG 0x084
98133add5bSMaxime Ripard
99133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_PH_REG 0x090
100133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_PH_ECC(n) (((n) & 0xff) << 24)
101133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_PH_WC(n) (((n) & 0xffff) << 8)
102133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_PH_VC(n) (((n) & 3) << 6)
103133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_PH_DT(n) ((n) & 0x3f)
104133add5bSMaxime Ripard
105133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_PF0_REG 0x098
106133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_PF0_CRC_FORCE(n) ((n) & 0xffff)
107133add5bSMaxime Ripard
108133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_PF1_REG 0x09c
109133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_PF1_CRC_INIT_LINEN(n) (((n) & 0xffff) << 16)
110133add5bSMaxime Ripard #define SUN6I_DSI_PIXEL_PF1_CRC_INIT_LINE0(n) ((n) & 0xffff)
111133add5bSMaxime Ripard
112133add5bSMaxime Ripard #define SUN6I_DSI_SYNC_HSS_REG 0x0b0
113133add5bSMaxime Ripard
114133add5bSMaxime Ripard #define SUN6I_DSI_SYNC_HSE_REG 0x0b4
115133add5bSMaxime Ripard
116133add5bSMaxime Ripard #define SUN6I_DSI_SYNC_VSS_REG 0x0b8
117133add5bSMaxime Ripard
118133add5bSMaxime Ripard #define SUN6I_DSI_SYNC_VSE_REG 0x0bc
119133add5bSMaxime Ripard
120133add5bSMaxime Ripard #define SUN6I_DSI_BLK_HSA0_REG 0x0c0
121133add5bSMaxime Ripard
122133add5bSMaxime Ripard #define SUN6I_DSI_BLK_HSA1_REG 0x0c4
123133add5bSMaxime Ripard #define SUN6I_DSI_BLK_PF(n) (((n) & 0xffff) << 16)
124133add5bSMaxime Ripard #define SUN6I_DSI_BLK_PD(n) ((n) & 0xff)
125133add5bSMaxime Ripard
126133add5bSMaxime Ripard #define SUN6I_DSI_BLK_HBP0_REG 0x0c8
127133add5bSMaxime Ripard
128133add5bSMaxime Ripard #define SUN6I_DSI_BLK_HBP1_REG 0x0cc
129133add5bSMaxime Ripard
130133add5bSMaxime Ripard #define SUN6I_DSI_BLK_HFP0_REG 0x0d0
131133add5bSMaxime Ripard
132133add5bSMaxime Ripard #define SUN6I_DSI_BLK_HFP1_REG 0x0d4
133133add5bSMaxime Ripard
134133add5bSMaxime Ripard #define SUN6I_DSI_BLK_HBLK0_REG 0x0e0
135133add5bSMaxime Ripard
136133add5bSMaxime Ripard #define SUN6I_DSI_BLK_HBLK1_REG 0x0e4
137133add5bSMaxime Ripard
138133add5bSMaxime Ripard #define SUN6I_DSI_BLK_VBLK0_REG 0x0e8
139133add5bSMaxime Ripard
140133add5bSMaxime Ripard #define SUN6I_DSI_BLK_VBLK1_REG 0x0ec
141133add5bSMaxime Ripard
142133add5bSMaxime Ripard #define SUN6I_DSI_BURST_LINE_REG 0x0f0
143133add5bSMaxime Ripard #define SUN6I_DSI_BURST_LINE_SYNC_POINT(n) (((n) & 0xffff) << 16)
144133add5bSMaxime Ripard #define SUN6I_DSI_BURST_LINE_NUM(n) ((n) & 0xffff)
145133add5bSMaxime Ripard
146133add5bSMaxime Ripard #define SUN6I_DSI_BURST_DRQ_REG 0x0f4
147133add5bSMaxime Ripard #define SUN6I_DSI_BURST_DRQ_EDGE1(n) (((n) & 0xffff) << 16)
148133add5bSMaxime Ripard #define SUN6I_DSI_BURST_DRQ_EDGE0(n) ((n) & 0xffff)
149133add5bSMaxime Ripard
150133add5bSMaxime Ripard #define SUN6I_DSI_CMD_CTL_REG 0x200
151133add5bSMaxime Ripard #define SUN6I_DSI_CMD_CTL_RX_OVERFLOW BIT(26)
152133add5bSMaxime Ripard #define SUN6I_DSI_CMD_CTL_RX_FLAG BIT(25)
153133add5bSMaxime Ripard #define SUN6I_DSI_CMD_CTL_TX_FLAG BIT(9)
154133add5bSMaxime Ripard
155133add5bSMaxime Ripard #define SUN6I_DSI_CMD_RX_REG(n) (0x240 + (n) * 0x04)
156133add5bSMaxime Ripard
157133add5bSMaxime Ripard #define SUN6I_DSI_DEBUG_DATA_REG 0x2f8
158133add5bSMaxime Ripard
159133add5bSMaxime Ripard #define SUN6I_DSI_CMD_TX_REG(n) (0x300 + (n) * 0x04)
160133add5bSMaxime Ripard
1611c1a7aa3SKonstantin Sudakov #define SUN6I_DSI_SYNC_POINT 40
1621c1a7aa3SKonstantin Sudakov
163133add5bSMaxime Ripard enum sun6i_dsi_start_inst {
164133add5bSMaxime Ripard DSI_START_LPRX,
165133add5bSMaxime Ripard DSI_START_LPTX,
166133add5bSMaxime Ripard DSI_START_HSC,
167133add5bSMaxime Ripard DSI_START_HSD,
168133add5bSMaxime Ripard };
169133add5bSMaxime Ripard
170133add5bSMaxime Ripard enum sun6i_dsi_inst_id {
171133add5bSMaxime Ripard DSI_INST_ID_LP11 = 0,
172133add5bSMaxime Ripard DSI_INST_ID_TBA,
173133add5bSMaxime Ripard DSI_INST_ID_HSC,
174133add5bSMaxime Ripard DSI_INST_ID_HSD,
175133add5bSMaxime Ripard DSI_INST_ID_LPDT,
176133add5bSMaxime Ripard DSI_INST_ID_HSCEXIT,
177133add5bSMaxime Ripard DSI_INST_ID_NOP,
178133add5bSMaxime Ripard DSI_INST_ID_DLY,
179133add5bSMaxime Ripard DSI_INST_ID_END = 15,
180133add5bSMaxime Ripard };
181133add5bSMaxime Ripard
182133add5bSMaxime Ripard enum sun6i_dsi_inst_mode {
183133add5bSMaxime Ripard DSI_INST_MODE_STOP = 0,
184133add5bSMaxime Ripard DSI_INST_MODE_TBA,
185133add5bSMaxime Ripard DSI_INST_MODE_HS,
186133add5bSMaxime Ripard DSI_INST_MODE_ESCAPE,
187133add5bSMaxime Ripard DSI_INST_MODE_HSCEXIT,
188133add5bSMaxime Ripard DSI_INST_MODE_NOP,
189133add5bSMaxime Ripard };
190133add5bSMaxime Ripard
191133add5bSMaxime Ripard enum sun6i_dsi_inst_escape {
192133add5bSMaxime Ripard DSI_INST_ESCA_LPDT = 0,
193133add5bSMaxime Ripard DSI_INST_ESCA_ULPS,
194133add5bSMaxime Ripard DSI_INST_ESCA_UN1,
195133add5bSMaxime Ripard DSI_INST_ESCA_UN2,
196133add5bSMaxime Ripard DSI_INST_ESCA_RESET,
197133add5bSMaxime Ripard DSI_INST_ESCA_UN3,
198133add5bSMaxime Ripard DSI_INST_ESCA_UN4,
199133add5bSMaxime Ripard DSI_INST_ESCA_UN5,
200133add5bSMaxime Ripard };
201133add5bSMaxime Ripard
202133add5bSMaxime Ripard enum sun6i_dsi_inst_packet {
203133add5bSMaxime Ripard DSI_INST_PACK_PIXEL = 0,
204133add5bSMaxime Ripard DSI_INST_PACK_COMMAND,
205133add5bSMaxime Ripard };
206133add5bSMaxime Ripard
207133add5bSMaxime Ripard static const u32 sun6i_dsi_ecc_array[] = {
208133add5bSMaxime Ripard [0] = (BIT(0) | BIT(1) | BIT(2) | BIT(4) | BIT(5) | BIT(7) | BIT(10) |
209133add5bSMaxime Ripard BIT(11) | BIT(13) | BIT(16) | BIT(20) | BIT(21) | BIT(22) |
210133add5bSMaxime Ripard BIT(23)),
211133add5bSMaxime Ripard [1] = (BIT(0) | BIT(1) | BIT(3) | BIT(4) | BIT(6) | BIT(8) | BIT(10) |
212133add5bSMaxime Ripard BIT(12) | BIT(14) | BIT(17) | BIT(20) | BIT(21) | BIT(22) |
213133add5bSMaxime Ripard BIT(23)),
214133add5bSMaxime Ripard [2] = (BIT(0) | BIT(2) | BIT(3) | BIT(5) | BIT(6) | BIT(9) | BIT(11) |
215133add5bSMaxime Ripard BIT(12) | BIT(15) | BIT(18) | BIT(20) | BIT(21) | BIT(22)),
216133add5bSMaxime Ripard [3] = (BIT(1) | BIT(2) | BIT(3) | BIT(7) | BIT(8) | BIT(9) | BIT(13) |
217133add5bSMaxime Ripard BIT(14) | BIT(15) | BIT(19) | BIT(20) | BIT(21) | BIT(23)),
218133add5bSMaxime Ripard [4] = (BIT(4) | BIT(5) | BIT(6) | BIT(7) | BIT(8) | BIT(9) | BIT(16) |
219133add5bSMaxime Ripard BIT(17) | BIT(18) | BIT(19) | BIT(20) | BIT(22) | BIT(23)),
220133add5bSMaxime Ripard [5] = (BIT(10) | BIT(11) | BIT(12) | BIT(13) | BIT(14) | BIT(15) |
221133add5bSMaxime Ripard BIT(16) | BIT(17) | BIT(18) | BIT(19) | BIT(21) | BIT(22) |
222133add5bSMaxime Ripard BIT(23)),
223133add5bSMaxime Ripard };
224133add5bSMaxime Ripard
sun6i_dsi_ecc_compute(unsigned int data)225133add5bSMaxime Ripard static u32 sun6i_dsi_ecc_compute(unsigned int data)
226133add5bSMaxime Ripard {
227133add5bSMaxime Ripard int i;
228133add5bSMaxime Ripard u8 ecc = 0;
229133add5bSMaxime Ripard
230133add5bSMaxime Ripard for (i = 0; i < ARRAY_SIZE(sun6i_dsi_ecc_array); i++) {
231133add5bSMaxime Ripard u32 field = sun6i_dsi_ecc_array[i];
232133add5bSMaxime Ripard bool init = false;
233133add5bSMaxime Ripard u8 val = 0;
234133add5bSMaxime Ripard int j;
235133add5bSMaxime Ripard
236133add5bSMaxime Ripard for (j = 0; j < 24; j++) {
237133add5bSMaxime Ripard if (!(BIT(j) & field))
238133add5bSMaxime Ripard continue;
239133add5bSMaxime Ripard
240133add5bSMaxime Ripard if (!init) {
241133add5bSMaxime Ripard val = (BIT(j) & data) ? 1 : 0;
242133add5bSMaxime Ripard init = true;
243133add5bSMaxime Ripard } else {
244133add5bSMaxime Ripard val ^= (BIT(j) & data) ? 1 : 0;
245133add5bSMaxime Ripard }
246133add5bSMaxime Ripard }
247133add5bSMaxime Ripard
248133add5bSMaxime Ripard ecc |= val << i;
249133add5bSMaxime Ripard }
250133add5bSMaxime Ripard
251133add5bSMaxime Ripard return ecc;
252133add5bSMaxime Ripard }
253133add5bSMaxime Ripard
sun6i_dsi_crc_compute(u8 const * buffer,size_t len)254133add5bSMaxime Ripard static u16 sun6i_dsi_crc_compute(u8 const *buffer, size_t len)
255133add5bSMaxime Ripard {
256133add5bSMaxime Ripard return crc_ccitt(0xffff, buffer, len);
257133add5bSMaxime Ripard }
258133add5bSMaxime Ripard
sun6i_dsi_crc_repeat(u8 pd,u8 * buffer,size_t len)259c51756d5SKees Cook static u16 sun6i_dsi_crc_repeat(u8 pd, u8 *buffer, size_t len)
260133add5bSMaxime Ripard {
261133add5bSMaxime Ripard memset(buffer, pd, len);
262133add5bSMaxime Ripard
263133add5bSMaxime Ripard return sun6i_dsi_crc_compute(buffer, len);
264133add5bSMaxime Ripard }
265133add5bSMaxime Ripard
sun6i_dsi_build_sync_pkt(u8 dt,u8 vc,u8 d0,u8 d1)266133add5bSMaxime Ripard static u32 sun6i_dsi_build_sync_pkt(u8 dt, u8 vc, u8 d0, u8 d1)
267133add5bSMaxime Ripard {
268133add5bSMaxime Ripard u32 val = dt & 0x3f;
269133add5bSMaxime Ripard
270133add5bSMaxime Ripard val |= (vc & 3) << 6;
271133add5bSMaxime Ripard val |= (d0 & 0xff) << 8;
272133add5bSMaxime Ripard val |= (d1 & 0xff) << 16;
273133add5bSMaxime Ripard val |= sun6i_dsi_ecc_compute(val) << 24;
274133add5bSMaxime Ripard
275133add5bSMaxime Ripard return val;
276133add5bSMaxime Ripard }
277133add5bSMaxime Ripard
sun6i_dsi_build_blk0_pkt(u8 vc,u16 wc)278133add5bSMaxime Ripard static u32 sun6i_dsi_build_blk0_pkt(u8 vc, u16 wc)
279133add5bSMaxime Ripard {
280133add5bSMaxime Ripard return sun6i_dsi_build_sync_pkt(MIPI_DSI_BLANKING_PACKET, vc,
281133add5bSMaxime Ripard wc & 0xff, wc >> 8);
282133add5bSMaxime Ripard }
283133add5bSMaxime Ripard
sun6i_dsi_build_blk1_pkt(u16 pd,u8 * buffer,size_t len)284c51756d5SKees Cook static u32 sun6i_dsi_build_blk1_pkt(u16 pd, u8 *buffer, size_t len)
285133add5bSMaxime Ripard {
286133add5bSMaxime Ripard u32 val = SUN6I_DSI_BLK_PD(pd);
287133add5bSMaxime Ripard
288c51756d5SKees Cook return val | SUN6I_DSI_BLK_PF(sun6i_dsi_crc_repeat(pd, buffer, len));
289133add5bSMaxime Ripard }
290133add5bSMaxime Ripard
sun6i_dsi_inst_abort(struct sun6i_dsi * dsi)291133add5bSMaxime Ripard static void sun6i_dsi_inst_abort(struct sun6i_dsi *dsi)
292133add5bSMaxime Ripard {
293133add5bSMaxime Ripard regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG,
294133add5bSMaxime Ripard SUN6I_DSI_BASIC_CTL0_INST_ST, 0);
295133add5bSMaxime Ripard }
296133add5bSMaxime Ripard
sun6i_dsi_inst_commit(struct sun6i_dsi * dsi)297133add5bSMaxime Ripard static void sun6i_dsi_inst_commit(struct sun6i_dsi *dsi)
298133add5bSMaxime Ripard {
299133add5bSMaxime Ripard regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG,
300133add5bSMaxime Ripard SUN6I_DSI_BASIC_CTL0_INST_ST,
301133add5bSMaxime Ripard SUN6I_DSI_BASIC_CTL0_INST_ST);
302133add5bSMaxime Ripard }
303133add5bSMaxime Ripard
sun6i_dsi_inst_wait_for_completion(struct sun6i_dsi * dsi)304133add5bSMaxime Ripard static int sun6i_dsi_inst_wait_for_completion(struct sun6i_dsi *dsi)
305133add5bSMaxime Ripard {
306133add5bSMaxime Ripard u32 val;
307133add5bSMaxime Ripard
308133add5bSMaxime Ripard return regmap_read_poll_timeout(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG,
309133add5bSMaxime Ripard val,
310133add5bSMaxime Ripard !(val & SUN6I_DSI_BASIC_CTL0_INST_ST),
311133add5bSMaxime Ripard 100, 5000);
312133add5bSMaxime Ripard }
313133add5bSMaxime Ripard
sun6i_dsi_inst_setup(struct sun6i_dsi * dsi,enum sun6i_dsi_inst_id id,enum sun6i_dsi_inst_mode mode,bool clock,u8 data,enum sun6i_dsi_inst_packet packet,enum sun6i_dsi_inst_escape escape)314133add5bSMaxime Ripard static void sun6i_dsi_inst_setup(struct sun6i_dsi *dsi,
315133add5bSMaxime Ripard enum sun6i_dsi_inst_id id,
316133add5bSMaxime Ripard enum sun6i_dsi_inst_mode mode,
317133add5bSMaxime Ripard bool clock, u8 data,
318133add5bSMaxime Ripard enum sun6i_dsi_inst_packet packet,
319133add5bSMaxime Ripard enum sun6i_dsi_inst_escape escape)
320133add5bSMaxime Ripard {
321133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_INST_FUNC_REG(id),
322133add5bSMaxime Ripard SUN6I_DSI_INST_FUNC_INST_MODE(mode) |
323133add5bSMaxime Ripard SUN6I_DSI_INST_FUNC_ESCAPE_ENTRY(escape) |
324133add5bSMaxime Ripard SUN6I_DSI_INST_FUNC_TRANS_PACKET(packet) |
325133add5bSMaxime Ripard (clock ? SUN6I_DSI_INST_FUNC_LANE_CEN : 0) |
326133add5bSMaxime Ripard SUN6I_DSI_INST_FUNC_LANE_DEN(data));
327133add5bSMaxime Ripard }
328133add5bSMaxime Ripard
sun6i_dsi_inst_init(struct sun6i_dsi * dsi,struct mipi_dsi_device * device)329133add5bSMaxime Ripard static void sun6i_dsi_inst_init(struct sun6i_dsi *dsi,
330133add5bSMaxime Ripard struct mipi_dsi_device *device)
331133add5bSMaxime Ripard {
332133add5bSMaxime Ripard u8 lanes_mask = GENMASK(device->lanes - 1, 0);
333133add5bSMaxime Ripard
334133add5bSMaxime Ripard sun6i_dsi_inst_setup(dsi, DSI_INST_ID_LP11, DSI_INST_MODE_STOP,
335133add5bSMaxime Ripard true, lanes_mask, 0, 0);
336133add5bSMaxime Ripard
337133add5bSMaxime Ripard sun6i_dsi_inst_setup(dsi, DSI_INST_ID_TBA, DSI_INST_MODE_TBA,
338133add5bSMaxime Ripard false, 1, 0, 0);
339133add5bSMaxime Ripard
340133add5bSMaxime Ripard sun6i_dsi_inst_setup(dsi, DSI_INST_ID_HSC, DSI_INST_MODE_HS,
341133add5bSMaxime Ripard true, 0, DSI_INST_PACK_PIXEL, 0);
342133add5bSMaxime Ripard
343133add5bSMaxime Ripard sun6i_dsi_inst_setup(dsi, DSI_INST_ID_HSD, DSI_INST_MODE_HS,
344133add5bSMaxime Ripard false, lanes_mask, DSI_INST_PACK_PIXEL, 0);
345133add5bSMaxime Ripard
346133add5bSMaxime Ripard sun6i_dsi_inst_setup(dsi, DSI_INST_ID_LPDT, DSI_INST_MODE_ESCAPE,
347133add5bSMaxime Ripard false, 1, DSI_INST_PACK_COMMAND,
348133add5bSMaxime Ripard DSI_INST_ESCA_LPDT);
349133add5bSMaxime Ripard
350133add5bSMaxime Ripard sun6i_dsi_inst_setup(dsi, DSI_INST_ID_HSCEXIT, DSI_INST_MODE_HSCEXIT,
351133add5bSMaxime Ripard true, 0, 0, 0);
352133add5bSMaxime Ripard
353133add5bSMaxime Ripard sun6i_dsi_inst_setup(dsi, DSI_INST_ID_NOP, DSI_INST_MODE_STOP,
354133add5bSMaxime Ripard false, lanes_mask, 0, 0);
355133add5bSMaxime Ripard
356133add5bSMaxime Ripard sun6i_dsi_inst_setup(dsi, DSI_INST_ID_DLY, DSI_INST_MODE_NOP,
357133add5bSMaxime Ripard true, lanes_mask, 0, 0);
358133add5bSMaxime Ripard
359133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_INST_JUMP_CFG_REG(0),
360133add5bSMaxime Ripard SUN6I_DSI_INST_JUMP_CFG_POINT(DSI_INST_ID_NOP) |
361133add5bSMaxime Ripard SUN6I_DSI_INST_JUMP_CFG_TO(DSI_INST_ID_HSCEXIT) |
362133add5bSMaxime Ripard SUN6I_DSI_INST_JUMP_CFG_NUM(1));
363133add5bSMaxime Ripard };
364133add5bSMaxime Ripard
sun6i_dsi_get_video_start_delay(struct sun6i_dsi * dsi,struct drm_display_mode * mode)365133add5bSMaxime Ripard static u16 sun6i_dsi_get_video_start_delay(struct sun6i_dsi *dsi,
366133add5bSMaxime Ripard struct drm_display_mode *mode)
367133add5bSMaxime Ripard {
3689a197c86SJagan Teki u16 delay = mode->vtotal - (mode->vsync_start - mode->vdisplay) + 1;
369da676c6aSMaxime Ripard
370efa31801SMaxime Ripard if (delay > mode->vtotal)
371efa31801SMaxime Ripard delay = delay % mode->vtotal;
372efa31801SMaxime Ripard
373efa31801SMaxime Ripard return max_t(u16, delay, 1);
374133add5bSMaxime Ripard }
375133add5bSMaxime Ripard
sun6i_dsi_get_line_num(struct sun6i_dsi * dsi,struct drm_display_mode * mode)3761c1a7aa3SKonstantin Sudakov static u16 sun6i_dsi_get_line_num(struct sun6i_dsi *dsi,
3771c1a7aa3SKonstantin Sudakov struct drm_display_mode *mode)
3781c1a7aa3SKonstantin Sudakov {
3791c1a7aa3SKonstantin Sudakov struct mipi_dsi_device *device = dsi->device;
3801c1a7aa3SKonstantin Sudakov unsigned int Bpp = mipi_dsi_pixel_format_to_bpp(device->format) / 8;
3811c1a7aa3SKonstantin Sudakov
3821c1a7aa3SKonstantin Sudakov return mode->htotal * Bpp / device->lanes;
3831c1a7aa3SKonstantin Sudakov }
3841c1a7aa3SKonstantin Sudakov
sun6i_dsi_get_drq_edge0(struct sun6i_dsi * dsi,struct drm_display_mode * mode,u16 line_num,u16 edge1)3851c1a7aa3SKonstantin Sudakov static u16 sun6i_dsi_get_drq_edge0(struct sun6i_dsi *dsi,
3861c1a7aa3SKonstantin Sudakov struct drm_display_mode *mode,
3871c1a7aa3SKonstantin Sudakov u16 line_num, u16 edge1)
3881c1a7aa3SKonstantin Sudakov {
3891c1a7aa3SKonstantin Sudakov u16 edge0 = edge1;
3901c1a7aa3SKonstantin Sudakov
3911c1a7aa3SKonstantin Sudakov edge0 += (mode->hdisplay + 40) * SUN6I_DSI_TCON_DIV / 8;
3921c1a7aa3SKonstantin Sudakov
3931c1a7aa3SKonstantin Sudakov if (edge0 > line_num)
3941c1a7aa3SKonstantin Sudakov return edge0 - line_num;
3951c1a7aa3SKonstantin Sudakov
3961c1a7aa3SKonstantin Sudakov return 1;
3971c1a7aa3SKonstantin Sudakov }
3981c1a7aa3SKonstantin Sudakov
sun6i_dsi_get_drq_edge1(struct sun6i_dsi * dsi,struct drm_display_mode * mode,u16 line_num)3991c1a7aa3SKonstantin Sudakov static u16 sun6i_dsi_get_drq_edge1(struct sun6i_dsi *dsi,
4001c1a7aa3SKonstantin Sudakov struct drm_display_mode *mode,
4011c1a7aa3SKonstantin Sudakov u16 line_num)
4021c1a7aa3SKonstantin Sudakov {
4031c1a7aa3SKonstantin Sudakov struct mipi_dsi_device *device = dsi->device;
4041c1a7aa3SKonstantin Sudakov unsigned int Bpp = mipi_dsi_pixel_format_to_bpp(device->format) / 8;
4051c1a7aa3SKonstantin Sudakov unsigned int hbp = mode->htotal - mode->hsync_end;
4061c1a7aa3SKonstantin Sudakov u16 edge1;
4071c1a7aa3SKonstantin Sudakov
4081c1a7aa3SKonstantin Sudakov edge1 = SUN6I_DSI_SYNC_POINT;
4091c1a7aa3SKonstantin Sudakov edge1 += (mode->hdisplay + hbp + 20) * Bpp / device->lanes;
4101c1a7aa3SKonstantin Sudakov
4111c1a7aa3SKonstantin Sudakov if (edge1 > line_num)
4121c1a7aa3SKonstantin Sudakov return line_num;
4131c1a7aa3SKonstantin Sudakov
4141c1a7aa3SKonstantin Sudakov return edge1;
4151c1a7aa3SKonstantin Sudakov }
4161c1a7aa3SKonstantin Sudakov
sun6i_dsi_setup_burst(struct sun6i_dsi * dsi,struct drm_display_mode * mode)417133add5bSMaxime Ripard static void sun6i_dsi_setup_burst(struct sun6i_dsi *dsi,
418133add5bSMaxime Ripard struct drm_display_mode *mode)
419133add5bSMaxime Ripard {
420133add5bSMaxime Ripard struct mipi_dsi_device *device = dsi->device;
421133add5bSMaxime Ripard u32 val = 0;
422133add5bSMaxime Ripard
4231c1a7aa3SKonstantin Sudakov if (device->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) {
4241c1a7aa3SKonstantin Sudakov u16 line_num = sun6i_dsi_get_line_num(dsi, mode);
4251c1a7aa3SKonstantin Sudakov u16 edge0, edge1;
4261c1a7aa3SKonstantin Sudakov
4271c1a7aa3SKonstantin Sudakov edge1 = sun6i_dsi_get_drq_edge1(dsi, mode, line_num);
4281c1a7aa3SKonstantin Sudakov edge0 = sun6i_dsi_get_drq_edge0(dsi, mode, line_num, edge1);
4291c1a7aa3SKonstantin Sudakov
4301c1a7aa3SKonstantin Sudakov regmap_write(dsi->regs, SUN6I_DSI_BURST_DRQ_REG,
4311c1a7aa3SKonstantin Sudakov SUN6I_DSI_BURST_DRQ_EDGE0(edge0) |
4321c1a7aa3SKonstantin Sudakov SUN6I_DSI_BURST_DRQ_EDGE1(edge1));
4331c1a7aa3SKonstantin Sudakov
4341c1a7aa3SKonstantin Sudakov regmap_write(dsi->regs, SUN6I_DSI_BURST_LINE_REG,
4351c1a7aa3SKonstantin Sudakov SUN6I_DSI_BURST_LINE_NUM(line_num) |
4361c1a7aa3SKonstantin Sudakov SUN6I_DSI_BURST_LINE_SYNC_POINT(SUN6I_DSI_SYNC_POINT));
4371c1a7aa3SKonstantin Sudakov
4381c1a7aa3SKonstantin Sudakov val = SUN6I_DSI_TCON_DRQ_ENABLE_MODE;
4397ac62699SJagan Teki } else if ((mode->hsync_start - mode->hdisplay) > 20) {
440133add5bSMaxime Ripard /* Maaaaaagic */
4417ac62699SJagan Teki u16 drq = (mode->hsync_start - mode->hdisplay) - 20;
442133add5bSMaxime Ripard
443133add5bSMaxime Ripard drq *= mipi_dsi_pixel_format_to_bpp(device->format);
444133add5bSMaxime Ripard drq /= 32;
445133add5bSMaxime Ripard
446133add5bSMaxime Ripard val = (SUN6I_DSI_TCON_DRQ_ENABLE_MODE |
447133add5bSMaxime Ripard SUN6I_DSI_TCON_DRQ_SET(drq));
448133add5bSMaxime Ripard }
449133add5bSMaxime Ripard
450133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_TCON_DRQ_REG, val);
451133add5bSMaxime Ripard }
452133add5bSMaxime Ripard
sun6i_dsi_setup_inst_loop(struct sun6i_dsi * dsi,struct drm_display_mode * mode)453133add5bSMaxime Ripard static void sun6i_dsi_setup_inst_loop(struct sun6i_dsi *dsi,
454133add5bSMaxime Ripard struct drm_display_mode *mode)
455133add5bSMaxime Ripard {
4561c1a7aa3SKonstantin Sudakov struct mipi_dsi_device *device = dsi->device;
457133add5bSMaxime Ripard u16 delay = 50 - 1;
458133add5bSMaxime Ripard
4591c1a7aa3SKonstantin Sudakov if (device->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) {
46051a0d1a9SJagan Teki u32 hsync_porch = (mode->htotal - mode->hdisplay) * 150;
46151a0d1a9SJagan Teki
46251a0d1a9SJagan Teki delay = (hsync_porch / ((mode->clock / 1000) * 8));
4631c1a7aa3SKonstantin Sudakov delay -= 50;
4641c1a7aa3SKonstantin Sudakov }
4651c1a7aa3SKonstantin Sudakov
4661c1a7aa3SKonstantin Sudakov regmap_write(dsi->regs, SUN6I_DSI_INST_LOOP_SEL_REG,
4671c1a7aa3SKonstantin Sudakov 2 << (4 * DSI_INST_ID_LP11) |
4681c1a7aa3SKonstantin Sudakov 3 << (4 * DSI_INST_ID_DLY));
4691c1a7aa3SKonstantin Sudakov
470133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_INST_LOOP_NUM_REG(0),
471133add5bSMaxime Ripard SUN6I_DSI_INST_LOOP_NUM_N0(50 - 1) |
472133add5bSMaxime Ripard SUN6I_DSI_INST_LOOP_NUM_N1(delay));
473133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_INST_LOOP_NUM_REG(1),
474133add5bSMaxime Ripard SUN6I_DSI_INST_LOOP_NUM_N0(50 - 1) |
475133add5bSMaxime Ripard SUN6I_DSI_INST_LOOP_NUM_N1(delay));
476133add5bSMaxime Ripard }
477133add5bSMaxime Ripard
sun6i_dsi_setup_format(struct sun6i_dsi * dsi,struct drm_display_mode * mode)478133add5bSMaxime Ripard static void sun6i_dsi_setup_format(struct sun6i_dsi *dsi,
479133add5bSMaxime Ripard struct drm_display_mode *mode)
480133add5bSMaxime Ripard {
481133add5bSMaxime Ripard struct mipi_dsi_device *device = dsi->device;
482133add5bSMaxime Ripard u32 val = SUN6I_DSI_PIXEL_PH_VC(device->channel);
483133add5bSMaxime Ripard u8 dt, fmt;
484133add5bSMaxime Ripard u16 wc;
485133add5bSMaxime Ripard
486133add5bSMaxime Ripard /*
487133add5bSMaxime Ripard * TODO: The format defines are only valid in video mode and
488133add5bSMaxime Ripard * change in command mode.
489133add5bSMaxime Ripard */
490133add5bSMaxime Ripard switch (device->format) {
491133add5bSMaxime Ripard case MIPI_DSI_FMT_RGB888:
492133add5bSMaxime Ripard dt = MIPI_DSI_PACKED_PIXEL_STREAM_24;
493133add5bSMaxime Ripard fmt = 8;
494133add5bSMaxime Ripard break;
495133add5bSMaxime Ripard case MIPI_DSI_FMT_RGB666:
496133add5bSMaxime Ripard dt = MIPI_DSI_PIXEL_STREAM_3BYTE_18;
497133add5bSMaxime Ripard fmt = 9;
498133add5bSMaxime Ripard break;
499133add5bSMaxime Ripard case MIPI_DSI_FMT_RGB666_PACKED:
500133add5bSMaxime Ripard dt = MIPI_DSI_PACKED_PIXEL_STREAM_18;
501133add5bSMaxime Ripard fmt = 10;
502133add5bSMaxime Ripard break;
503133add5bSMaxime Ripard case MIPI_DSI_FMT_RGB565:
504133add5bSMaxime Ripard dt = MIPI_DSI_PACKED_PIXEL_STREAM_16;
505133add5bSMaxime Ripard fmt = 11;
506133add5bSMaxime Ripard break;
507133add5bSMaxime Ripard default:
508133add5bSMaxime Ripard return;
509133add5bSMaxime Ripard }
510133add5bSMaxime Ripard val |= SUN6I_DSI_PIXEL_PH_DT(dt);
511133add5bSMaxime Ripard
512133add5bSMaxime Ripard wc = mode->hdisplay * mipi_dsi_pixel_format_to_bpp(device->format) / 8;
513133add5bSMaxime Ripard val |= SUN6I_DSI_PIXEL_PH_WC(wc);
514133add5bSMaxime Ripard val |= SUN6I_DSI_PIXEL_PH_ECC(sun6i_dsi_ecc_compute(val));
515133add5bSMaxime Ripard
516133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_PIXEL_PH_REG, val);
517133add5bSMaxime Ripard
518133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_PIXEL_PF0_REG,
519133add5bSMaxime Ripard SUN6I_DSI_PIXEL_PF0_CRC_FORCE(0xffff));
520133add5bSMaxime Ripard
521133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_PIXEL_PF1_REG,
522133add5bSMaxime Ripard SUN6I_DSI_PIXEL_PF1_CRC_INIT_LINE0(0xffff) |
523133add5bSMaxime Ripard SUN6I_DSI_PIXEL_PF1_CRC_INIT_LINEN(0xffff));
524133add5bSMaxime Ripard
525133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_PIXEL_CTL0_REG,
526133add5bSMaxime Ripard SUN6I_DSI_PIXEL_CTL0_PD_PLUG_DISABLE |
527133add5bSMaxime Ripard SUN6I_DSI_PIXEL_CTL0_FORMAT(fmt));
528133add5bSMaxime Ripard }
529133add5bSMaxime Ripard
sun6i_dsi_setup_timings(struct sun6i_dsi * dsi,struct drm_display_mode * mode)530133add5bSMaxime Ripard static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi,
531133add5bSMaxime Ripard struct drm_display_mode *mode)
532133add5bSMaxime Ripard {
533133add5bSMaxime Ripard struct mipi_dsi_device *device = dsi->device;
53482a1356aSSamuel Holland int Bpp = mipi_dsi_pixel_format_to_bpp(device->format) / 8;
5351c1a7aa3SKonstantin Sudakov u16 hbp = 0, hfp = 0, hsa = 0, hblk = 0, vblk = 0;
5361c1a7aa3SKonstantin Sudakov u32 basic_ctl = 0;
537c51756d5SKees Cook size_t bytes;
538c51756d5SKees Cook u8 *buffer;
539c51756d5SKees Cook
540c51756d5SKees Cook /* Do all timing calculations up front to allocate buffer space */
541c51756d5SKees Cook
5421c1a7aa3SKonstantin Sudakov if (device->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) {
5431c1a7aa3SKonstantin Sudakov hblk = mode->hdisplay * Bpp;
5441c1a7aa3SKonstantin Sudakov basic_ctl = SUN6I_DSI_BASIC_CTL_VIDEO_BURST |
5451c1a7aa3SKonstantin Sudakov SUN6I_DSI_BASIC_CTL_HSA_HSE_DIS |
5461c1a7aa3SKonstantin Sudakov SUN6I_DSI_BASIC_CTL_HBP_DIS;
5471c1a7aa3SKonstantin Sudakov
5481c1a7aa3SKonstantin Sudakov if (device->lanes == 4)
5491c1a7aa3SKonstantin Sudakov basic_ctl |= SUN6I_DSI_BASIC_CTL_TRAIL_FILL |
5501c1a7aa3SKonstantin Sudakov SUN6I_DSI_BASIC_CTL_TRAIL_INV(0xc);
5511c1a7aa3SKonstantin Sudakov } else {
552c51756d5SKees Cook /*
5531c1a7aa3SKonstantin Sudakov * A sync period is composed of a blanking packet (4
5541c1a7aa3SKonstantin Sudakov * bytes + payload + 2 bytes) and a sync event packet
5551c1a7aa3SKonstantin Sudakov * (4 bytes). Its minimal size is therefore 10 bytes
556c51756d5SKees Cook */
557c51756d5SKees Cook #define HSA_PACKET_OVERHEAD 10
55882a1356aSSamuel Holland hsa = max(HSA_PACKET_OVERHEAD,
559c51756d5SKees Cook (mode->hsync_end - mode->hsync_start) * Bpp - HSA_PACKET_OVERHEAD);
560c51756d5SKees Cook
561c51756d5SKees Cook /*
5621c1a7aa3SKonstantin Sudakov * The backporch is set using a blanking packet (4
5631c1a7aa3SKonstantin Sudakov * bytes + payload + 2 bytes). Its minimal size is
5641c1a7aa3SKonstantin Sudakov * therefore 6 bytes
565c51756d5SKees Cook */
566c51756d5SKees Cook #define HBP_PACKET_OVERHEAD 6
56782a1356aSSamuel Holland hbp = max(HBP_PACKET_OVERHEAD,
5682cfdc24dSMaxime Ripard (mode->htotal - mode->hsync_end) * Bpp - HBP_PACKET_OVERHEAD);
569c51756d5SKees Cook
570c51756d5SKees Cook /*
57181fafb94SIcenowy Zheng * The frontporch is set using a sync event (4 bytes)
57281fafb94SIcenowy Zheng * and two blanking packets (each one is 4 bytes +
57381fafb94SIcenowy Zheng * payload + 2 bytes). Its minimal size is therefore
57481fafb94SIcenowy Zheng * 16 bytes
575c51756d5SKees Cook */
57681fafb94SIcenowy Zheng #define HFP_PACKET_OVERHEAD 16
57782a1356aSSamuel Holland hfp = max(HFP_PACKET_OVERHEAD,
5782cfdc24dSMaxime Ripard (mode->hsync_start - mode->hdisplay) * Bpp - HFP_PACKET_OVERHEAD);
579c51756d5SKees Cook
580c51756d5SKees Cook /*
5811c1a7aa3SKonstantin Sudakov * The blanking is set using a sync event (4 bytes)
5821c1a7aa3SKonstantin Sudakov * and a blanking packet (4 bytes + payload + 2
5831c1a7aa3SKonstantin Sudakov * bytes). Its minimal size is therefore 10 bytes.
584c51756d5SKees Cook */
58562e7511aSMaxime Ripard #define HBLK_PACKET_OVERHEAD 10
58682a1356aSSamuel Holland hblk = max(HBLK_PACKET_OVERHEAD,
5871c1a7aa3SKonstantin Sudakov (mode->htotal - (mode->hsync_end - mode->hsync_start)) * Bpp -
5881c1a7aa3SKonstantin Sudakov HBLK_PACKET_OVERHEAD);
589c51756d5SKees Cook
590c51756d5SKees Cook /*
591c51756d5SKees Cook * And I'm not entirely sure what vblk is about. The driver in
592c51756d5SKees Cook * Allwinner BSP is using a rather convoluted calculation
593c51756d5SKees Cook * there only for 4 lanes. However, using 0 (the !4 lanes
594c51756d5SKees Cook * case) even with a 4 lanes screen seems to work...
595c51756d5SKees Cook */
596c51756d5SKees Cook vblk = 0;
5971c1a7aa3SKonstantin Sudakov }
598c51756d5SKees Cook
599c51756d5SKees Cook /* How many bytes do we need to send all payloads? */
600c51756d5SKees Cook bytes = max_t(size_t, max(max(hfp, hblk), max(hsa, hbp)), vblk);
601c51756d5SKees Cook buffer = kmalloc(bytes, GFP_KERNEL);
602c51756d5SKees Cook if (WARN_ON(!buffer))
603c51756d5SKees Cook return;
604133add5bSMaxime Ripard
6051c1a7aa3SKonstantin Sudakov regmap_write(dsi->regs, SUN6I_DSI_BASIC_CTL_REG, basic_ctl);
606133add5bSMaxime Ripard
607133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_SYNC_HSS_REG,
608133add5bSMaxime Ripard sun6i_dsi_build_sync_pkt(MIPI_DSI_H_SYNC_START,
609133add5bSMaxime Ripard device->channel,
610133add5bSMaxime Ripard 0, 0));
611133add5bSMaxime Ripard
612133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_SYNC_HSE_REG,
613133add5bSMaxime Ripard sun6i_dsi_build_sync_pkt(MIPI_DSI_H_SYNC_END,
614133add5bSMaxime Ripard device->channel,
615133add5bSMaxime Ripard 0, 0));
616133add5bSMaxime Ripard
617133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_SYNC_VSS_REG,
618133add5bSMaxime Ripard sun6i_dsi_build_sync_pkt(MIPI_DSI_V_SYNC_START,
619133add5bSMaxime Ripard device->channel,
620133add5bSMaxime Ripard 0, 0));
621133add5bSMaxime Ripard
622133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_SYNC_VSE_REG,
623133add5bSMaxime Ripard sun6i_dsi_build_sync_pkt(MIPI_DSI_V_SYNC_END,
624133add5bSMaxime Ripard device->channel,
625133add5bSMaxime Ripard 0, 0));
626133add5bSMaxime Ripard
627133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_BASIC_SIZE0_REG,
628133add5bSMaxime Ripard SUN6I_DSI_BASIC_SIZE0_VSA(mode->vsync_end -
629133add5bSMaxime Ripard mode->vsync_start) |
6302cfdc24dSMaxime Ripard SUN6I_DSI_BASIC_SIZE0_VBP(mode->vtotal -
6312cfdc24dSMaxime Ripard mode->vsync_end));
632133add5bSMaxime Ripard
633133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_BASIC_SIZE1_REG,
634133add5bSMaxime Ripard SUN6I_DSI_BASIC_SIZE1_VACT(mode->vdisplay) |
635133add5bSMaxime Ripard SUN6I_DSI_BASIC_SIZE1_VT(mode->vtotal));
636133add5bSMaxime Ripard
637c51756d5SKees Cook /* sync */
638133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_BLK_HSA0_REG,
639133add5bSMaxime Ripard sun6i_dsi_build_blk0_pkt(device->channel, hsa));
640133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_BLK_HSA1_REG,
641c51756d5SKees Cook sun6i_dsi_build_blk1_pkt(0, buffer, hsa));
642133add5bSMaxime Ripard
643c51756d5SKees Cook /* backporch */
644133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_BLK_HBP0_REG,
645133add5bSMaxime Ripard sun6i_dsi_build_blk0_pkt(device->channel, hbp));
646133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_BLK_HBP1_REG,
647c51756d5SKees Cook sun6i_dsi_build_blk1_pkt(0, buffer, hbp));
648133add5bSMaxime Ripard
649c51756d5SKees Cook /* frontporch */
650133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_BLK_HFP0_REG,
651133add5bSMaxime Ripard sun6i_dsi_build_blk0_pkt(device->channel, hfp));
652133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_BLK_HFP1_REG,
653c51756d5SKees Cook sun6i_dsi_build_blk1_pkt(0, buffer, hfp));
654133add5bSMaxime Ripard
655c51756d5SKees Cook /* hblk */
656133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_BLK_HBLK0_REG,
657133add5bSMaxime Ripard sun6i_dsi_build_blk0_pkt(device->channel, hblk));
658133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_BLK_HBLK1_REG,
659c51756d5SKees Cook sun6i_dsi_build_blk1_pkt(0, buffer, hblk));
660133add5bSMaxime Ripard
661c51756d5SKees Cook /* vblk */
662133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_BLK_VBLK0_REG,
663133add5bSMaxime Ripard sun6i_dsi_build_blk0_pkt(device->channel, vblk));
664133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_BLK_VBLK1_REG,
665c51756d5SKees Cook sun6i_dsi_build_blk1_pkt(0, buffer, vblk));
666c51756d5SKees Cook
667c51756d5SKees Cook kfree(buffer);
668133add5bSMaxime Ripard }
669133add5bSMaxime Ripard
sun6i_dsi_start(struct sun6i_dsi * dsi,enum sun6i_dsi_start_inst func)670133add5bSMaxime Ripard static int sun6i_dsi_start(struct sun6i_dsi *dsi,
671133add5bSMaxime Ripard enum sun6i_dsi_start_inst func)
672133add5bSMaxime Ripard {
673133add5bSMaxime Ripard switch (func) {
674133add5bSMaxime Ripard case DSI_START_LPTX:
675133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_INST_JUMP_SEL_REG,
676133add5bSMaxime Ripard DSI_INST_ID_LPDT << (4 * DSI_INST_ID_LP11) |
677133add5bSMaxime Ripard DSI_INST_ID_END << (4 * DSI_INST_ID_LPDT));
678133add5bSMaxime Ripard break;
679133add5bSMaxime Ripard case DSI_START_LPRX:
680133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_INST_JUMP_SEL_REG,
681133add5bSMaxime Ripard DSI_INST_ID_LPDT << (4 * DSI_INST_ID_LP11) |
682133add5bSMaxime Ripard DSI_INST_ID_DLY << (4 * DSI_INST_ID_LPDT) |
683133add5bSMaxime Ripard DSI_INST_ID_TBA << (4 * DSI_INST_ID_DLY) |
684133add5bSMaxime Ripard DSI_INST_ID_END << (4 * DSI_INST_ID_TBA));
685133add5bSMaxime Ripard break;
686133add5bSMaxime Ripard case DSI_START_HSC:
687133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_INST_JUMP_SEL_REG,
688133add5bSMaxime Ripard DSI_INST_ID_HSC << (4 * DSI_INST_ID_LP11) |
689133add5bSMaxime Ripard DSI_INST_ID_END << (4 * DSI_INST_ID_HSC));
690133add5bSMaxime Ripard break;
691133add5bSMaxime Ripard case DSI_START_HSD:
692133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_INST_JUMP_SEL_REG,
693133add5bSMaxime Ripard DSI_INST_ID_NOP << (4 * DSI_INST_ID_LP11) |
694133add5bSMaxime Ripard DSI_INST_ID_HSD << (4 * DSI_INST_ID_NOP) |
695133add5bSMaxime Ripard DSI_INST_ID_DLY << (4 * DSI_INST_ID_HSD) |
696133add5bSMaxime Ripard DSI_INST_ID_NOP << (4 * DSI_INST_ID_DLY) |
697133add5bSMaxime Ripard DSI_INST_ID_END << (4 * DSI_INST_ID_HSCEXIT));
698133add5bSMaxime Ripard break;
699133add5bSMaxime Ripard default:
700133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_INST_JUMP_SEL_REG,
701133add5bSMaxime Ripard DSI_INST_ID_END << (4 * DSI_INST_ID_LP11));
702133add5bSMaxime Ripard break;
703133add5bSMaxime Ripard }
704133add5bSMaxime Ripard
705133add5bSMaxime Ripard sun6i_dsi_inst_abort(dsi);
706133add5bSMaxime Ripard sun6i_dsi_inst_commit(dsi);
707133add5bSMaxime Ripard
708133add5bSMaxime Ripard if (func == DSI_START_HSC)
709133add5bSMaxime Ripard regmap_write_bits(dsi->regs,
710133add5bSMaxime Ripard SUN6I_DSI_INST_FUNC_REG(DSI_INST_ID_LP11),
711133add5bSMaxime Ripard SUN6I_DSI_INST_FUNC_LANE_CEN, 0);
712133add5bSMaxime Ripard
713133add5bSMaxime Ripard return 0;
714133add5bSMaxime Ripard }
715133add5bSMaxime Ripard
sun6i_dsi_encoder_enable(struct drm_encoder * encoder)716133add5bSMaxime Ripard static void sun6i_dsi_encoder_enable(struct drm_encoder *encoder)
717133add5bSMaxime Ripard {
718133add5bSMaxime Ripard struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
719133add5bSMaxime Ripard struct sun6i_dsi *dsi = encoder_to_sun6i_dsi(encoder);
720133add5bSMaxime Ripard struct mipi_dsi_device *device = dsi->device;
7213a3a71f9SArnd Bergmann union phy_configure_opts opts = { };
722bb3b6fcbSMaxime Ripard struct phy_configure_opts_mipi_dphy *cfg = &opts.mipi_dphy;
723133add5bSMaxime Ripard u16 delay;
724215be713SSamuel Holland int err;
725133add5bSMaxime Ripard
726133add5bSMaxime Ripard DRM_DEBUG_DRIVER("Enabling DSI output\n");
727133add5bSMaxime Ripard
728215be713SSamuel Holland err = regulator_enable(dsi->regulator);
729215be713SSamuel Holland if (err)
730215be713SSamuel Holland dev_warn(dsi->dev, "failed to enable VCC-DSI supply: %d\n", err);
731215be713SSamuel Holland
732215be713SSamuel Holland reset_control_deassert(dsi->reset);
733215be713SSamuel Holland clk_prepare_enable(dsi->mod_clk);
734215be713SSamuel Holland
735215be713SSamuel Holland /*
736215be713SSamuel Holland * Enable the DSI block.
737215be713SSamuel Holland */
738215be713SSamuel Holland regmap_write(dsi->regs, SUN6I_DSI_CTL_REG, SUN6I_DSI_CTL_EN);
739215be713SSamuel Holland
740215be713SSamuel Holland regmap_write(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG,
741215be713SSamuel Holland SUN6I_DSI_BASIC_CTL0_ECC_EN | SUN6I_DSI_BASIC_CTL0_CRC_EN);
742215be713SSamuel Holland
743215be713SSamuel Holland regmap_write(dsi->regs, SUN6I_DSI_TRANS_START_REG, 10);
744215be713SSamuel Holland regmap_write(dsi->regs, SUN6I_DSI_TRANS_ZERO_REG, 0);
745215be713SSamuel Holland
746215be713SSamuel Holland sun6i_dsi_inst_init(dsi, dsi->device);
747215be713SSamuel Holland
748215be713SSamuel Holland regmap_write(dsi->regs, SUN6I_DSI_DEBUG_DATA_REG, 0xff);
749133add5bSMaxime Ripard
750133add5bSMaxime Ripard delay = sun6i_dsi_get_video_start_delay(dsi, mode);
751133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_BASIC_CTL1_REG,
752133add5bSMaxime Ripard SUN6I_DSI_BASIC_CTL1_VIDEO_ST_DELAY(delay) |
753133add5bSMaxime Ripard SUN6I_DSI_BASIC_CTL1_VIDEO_FILL |
754133add5bSMaxime Ripard SUN6I_DSI_BASIC_CTL1_VIDEO_PRECISION |
755133add5bSMaxime Ripard SUN6I_DSI_BASIC_CTL1_VIDEO_MODE);
756133add5bSMaxime Ripard
757133add5bSMaxime Ripard sun6i_dsi_setup_burst(dsi, mode);
758133add5bSMaxime Ripard sun6i_dsi_setup_inst_loop(dsi, mode);
759133add5bSMaxime Ripard sun6i_dsi_setup_format(dsi, mode);
760133add5bSMaxime Ripard sun6i_dsi_setup_timings(dsi, mode);
761133add5bSMaxime Ripard
762bb3b6fcbSMaxime Ripard phy_init(dsi->dphy);
763bb3b6fcbSMaxime Ripard
764bb3b6fcbSMaxime Ripard phy_mipi_dphy_get_default_config(mode->clock * 1000,
765bb3b6fcbSMaxime Ripard mipi_dsi_pixel_format_to_bpp(device->format),
766bb3b6fcbSMaxime Ripard device->lanes, cfg);
767bb3b6fcbSMaxime Ripard
768bb3b6fcbSMaxime Ripard phy_set_mode(dsi->dphy, PHY_MODE_MIPI_DPHY);
769bb3b6fcbSMaxime Ripard phy_configure(dsi->dphy, &opts);
770bb3b6fcbSMaxime Ripard phy_power_on(dsi->dphy);
771133add5bSMaxime Ripard
7720e4e3fb4SSamuel Holland if (dsi->panel)
773133add5bSMaxime Ripard drm_panel_prepare(dsi->panel);
774133add5bSMaxime Ripard
775133add5bSMaxime Ripard /*
776133add5bSMaxime Ripard * FIXME: This should be moved after the switch to HS mode.
777133add5bSMaxime Ripard *
778133add5bSMaxime Ripard * Unfortunately, once in HS mode, it seems like we're not
779133add5bSMaxime Ripard * able to send DCS commands anymore, which would prevent any
780133add5bSMaxime Ripard * panel to send any DCS command as part as their enable
781133add5bSMaxime Ripard * method, which is quite common.
782133add5bSMaxime Ripard *
783133add5bSMaxime Ripard * I haven't seen any artifact due to that sub-optimal
784133add5bSMaxime Ripard * ordering on the panels I've tested it with, so I guess this
785133add5bSMaxime Ripard * will do for now, until that IP is better understood.
786133add5bSMaxime Ripard */
7870e4e3fb4SSamuel Holland if (dsi->panel)
788133add5bSMaxime Ripard drm_panel_enable(dsi->panel);
789133add5bSMaxime Ripard
790133add5bSMaxime Ripard sun6i_dsi_start(dsi, DSI_START_HSC);
791133add5bSMaxime Ripard
792133add5bSMaxime Ripard udelay(1000);
793133add5bSMaxime Ripard
794133add5bSMaxime Ripard sun6i_dsi_start(dsi, DSI_START_HSD);
795133add5bSMaxime Ripard }
796133add5bSMaxime Ripard
sun6i_dsi_encoder_disable(struct drm_encoder * encoder)797133add5bSMaxime Ripard static void sun6i_dsi_encoder_disable(struct drm_encoder *encoder)
798133add5bSMaxime Ripard {
799133add5bSMaxime Ripard struct sun6i_dsi *dsi = encoder_to_sun6i_dsi(encoder);
800133add5bSMaxime Ripard
801133add5bSMaxime Ripard DRM_DEBUG_DRIVER("Disabling DSI output\n");
802133add5bSMaxime Ripard
8030e4e3fb4SSamuel Holland if (dsi->panel) {
804133add5bSMaxime Ripard drm_panel_disable(dsi->panel);
805133add5bSMaxime Ripard drm_panel_unprepare(dsi->panel);
806133add5bSMaxime Ripard }
807133add5bSMaxime Ripard
808bb3b6fcbSMaxime Ripard phy_power_off(dsi->dphy);
809bb3b6fcbSMaxime Ripard phy_exit(dsi->dphy);
810133add5bSMaxime Ripard
811215be713SSamuel Holland clk_disable_unprepare(dsi->mod_clk);
812215be713SSamuel Holland reset_control_assert(dsi->reset);
813215be713SSamuel Holland regulator_disable(dsi->regulator);
814133add5bSMaxime Ripard }
815133add5bSMaxime Ripard
sun6i_dsi_get_modes(struct drm_connector * connector)816133add5bSMaxime Ripard static int sun6i_dsi_get_modes(struct drm_connector *connector)
817133add5bSMaxime Ripard {
818133add5bSMaxime Ripard struct sun6i_dsi *dsi = connector_to_sun6i_dsi(connector);
819133add5bSMaxime Ripard
82006c4a9c2SSam Ravnborg return drm_panel_get_modes(dsi->panel, connector);
821133add5bSMaxime Ripard }
822133add5bSMaxime Ripard
823f13478c9SRikard Falkeborn static const struct drm_connector_helper_funcs sun6i_dsi_connector_helper_funcs = {
824133add5bSMaxime Ripard .get_modes = sun6i_dsi_get_modes,
825133add5bSMaxime Ripard };
826133add5bSMaxime Ripard
827133add5bSMaxime Ripard static enum drm_connector_status
sun6i_dsi_connector_detect(struct drm_connector * connector,bool force)828133add5bSMaxime Ripard sun6i_dsi_connector_detect(struct drm_connector *connector, bool force)
829133add5bSMaxime Ripard {
8301a2703bdSSamuel Holland struct sun6i_dsi *dsi = connector_to_sun6i_dsi(connector);
8311a2703bdSSamuel Holland
8321a2703bdSSamuel Holland return dsi->panel ? connector_status_connected :
8331a2703bdSSamuel Holland connector_status_disconnected;
834133add5bSMaxime Ripard }
835133add5bSMaxime Ripard
836133add5bSMaxime Ripard static const struct drm_connector_funcs sun6i_dsi_connector_funcs = {
837133add5bSMaxime Ripard .detect = sun6i_dsi_connector_detect,
838133add5bSMaxime Ripard .fill_modes = drm_helper_probe_single_connector_modes,
839133add5bSMaxime Ripard .destroy = drm_connector_cleanup,
840133add5bSMaxime Ripard .reset = drm_atomic_helper_connector_reset,
841133add5bSMaxime Ripard .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
842133add5bSMaxime Ripard .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
843133add5bSMaxime Ripard };
844133add5bSMaxime Ripard
845133add5bSMaxime Ripard static const struct drm_encoder_helper_funcs sun6i_dsi_enc_helper_funcs = {
846133add5bSMaxime Ripard .disable = sun6i_dsi_encoder_disable,
847133add5bSMaxime Ripard .enable = sun6i_dsi_encoder_enable,
848133add5bSMaxime Ripard };
849133add5bSMaxime Ripard
sun6i_dsi_dcs_build_pkt_hdr(struct sun6i_dsi * dsi,const struct mipi_dsi_msg * msg)850133add5bSMaxime Ripard static u32 sun6i_dsi_dcs_build_pkt_hdr(struct sun6i_dsi *dsi,
851133add5bSMaxime Ripard const struct mipi_dsi_msg *msg)
852133add5bSMaxime Ripard {
853133add5bSMaxime Ripard u32 pkt = msg->type;
854133add5bSMaxime Ripard
855133add5bSMaxime Ripard if (msg->type == MIPI_DSI_DCS_LONG_WRITE) {
8564340ec45SIcenowy Zheng pkt |= ((msg->tx_len) & 0xffff) << 8;
8574340ec45SIcenowy Zheng pkt |= (((msg->tx_len) >> 8) & 0xffff) << 16;
858133add5bSMaxime Ripard } else {
859133add5bSMaxime Ripard pkt |= (((u8 *)msg->tx_buf)[0] << 8);
860133add5bSMaxime Ripard if (msg->tx_len > 1)
861133add5bSMaxime Ripard pkt |= (((u8 *)msg->tx_buf)[1] << 16);
862133add5bSMaxime Ripard }
863133add5bSMaxime Ripard
864133add5bSMaxime Ripard pkt |= sun6i_dsi_ecc_compute(pkt) << 24;
865133add5bSMaxime Ripard
866133add5bSMaxime Ripard return pkt;
867133add5bSMaxime Ripard }
868133add5bSMaxime Ripard
sun6i_dsi_dcs_write_short(struct sun6i_dsi * dsi,const struct mipi_dsi_msg * msg)869133add5bSMaxime Ripard static int sun6i_dsi_dcs_write_short(struct sun6i_dsi *dsi,
870133add5bSMaxime Ripard const struct mipi_dsi_msg *msg)
871133add5bSMaxime Ripard {
872133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(0),
873133add5bSMaxime Ripard sun6i_dsi_dcs_build_pkt_hdr(dsi, msg));
874133add5bSMaxime Ripard regmap_write_bits(dsi->regs, SUN6I_DSI_CMD_CTL_REG,
875133add5bSMaxime Ripard 0xff, (4 - 1));
876133add5bSMaxime Ripard
877133add5bSMaxime Ripard sun6i_dsi_start(dsi, DSI_START_LPTX);
878133add5bSMaxime Ripard
879133add5bSMaxime Ripard return msg->tx_len;
880133add5bSMaxime Ripard }
881133add5bSMaxime Ripard
sun6i_dsi_dcs_write_long(struct sun6i_dsi * dsi,const struct mipi_dsi_msg * msg)882133add5bSMaxime Ripard static int sun6i_dsi_dcs_write_long(struct sun6i_dsi *dsi,
883133add5bSMaxime Ripard const struct mipi_dsi_msg *msg)
884133add5bSMaxime Ripard {
885133add5bSMaxime Ripard int ret, len = 0;
886133add5bSMaxime Ripard u8 *bounce;
887133add5bSMaxime Ripard u16 crc;
888133add5bSMaxime Ripard
889133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(0),
890133add5bSMaxime Ripard sun6i_dsi_dcs_build_pkt_hdr(dsi, msg));
891133add5bSMaxime Ripard
892fd90e380SOndrej Jirman bounce = kzalloc(ALIGN(msg->tx_len + sizeof(crc), 4), GFP_KERNEL);
893133add5bSMaxime Ripard if (!bounce)
894133add5bSMaxime Ripard return -ENOMEM;
895133add5bSMaxime Ripard
896133add5bSMaxime Ripard memcpy(bounce, msg->tx_buf, msg->tx_len);
897133add5bSMaxime Ripard len += msg->tx_len;
898133add5bSMaxime Ripard
899133add5bSMaxime Ripard crc = sun6i_dsi_crc_compute(bounce, msg->tx_len);
900133add5bSMaxime Ripard memcpy((u8 *)bounce + msg->tx_len, &crc, sizeof(crc));
901133add5bSMaxime Ripard len += sizeof(crc);
902133add5bSMaxime Ripard
903fd90e380SOndrej Jirman regmap_bulk_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(1), bounce, DIV_ROUND_UP(len, 4));
904133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_CMD_CTL_REG, len + 4 - 1);
905133add5bSMaxime Ripard kfree(bounce);
906133add5bSMaxime Ripard
907133add5bSMaxime Ripard sun6i_dsi_start(dsi, DSI_START_LPTX);
908133add5bSMaxime Ripard
909133add5bSMaxime Ripard ret = sun6i_dsi_inst_wait_for_completion(dsi);
910133add5bSMaxime Ripard if (ret < 0) {
911133add5bSMaxime Ripard sun6i_dsi_inst_abort(dsi);
912133add5bSMaxime Ripard return ret;
913133add5bSMaxime Ripard }
914133add5bSMaxime Ripard
915133add5bSMaxime Ripard /*
916133add5bSMaxime Ripard * TODO: There's some bits (reg 0x200, bits 8/9) that
917133add5bSMaxime Ripard * apparently can be used to check whether the data have been
918133add5bSMaxime Ripard * sent, but I couldn't get it to work reliably.
919133add5bSMaxime Ripard */
920133add5bSMaxime Ripard return msg->tx_len;
921133add5bSMaxime Ripard }
922133add5bSMaxime Ripard
sun6i_dsi_dcs_read(struct sun6i_dsi * dsi,const struct mipi_dsi_msg * msg)923133add5bSMaxime Ripard static int sun6i_dsi_dcs_read(struct sun6i_dsi *dsi,
924133add5bSMaxime Ripard const struct mipi_dsi_msg *msg)
925133add5bSMaxime Ripard {
926133add5bSMaxime Ripard u32 val;
927133add5bSMaxime Ripard int ret;
928133add5bSMaxime Ripard u8 byte0;
929133add5bSMaxime Ripard
930133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(0),
931133add5bSMaxime Ripard sun6i_dsi_dcs_build_pkt_hdr(dsi, msg));
932133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_CMD_CTL_REG,
933133add5bSMaxime Ripard (4 - 1));
934133add5bSMaxime Ripard
935133add5bSMaxime Ripard sun6i_dsi_start(dsi, DSI_START_LPRX);
936133add5bSMaxime Ripard
937133add5bSMaxime Ripard ret = sun6i_dsi_inst_wait_for_completion(dsi);
938133add5bSMaxime Ripard if (ret < 0) {
939133add5bSMaxime Ripard sun6i_dsi_inst_abort(dsi);
940133add5bSMaxime Ripard return ret;
941133add5bSMaxime Ripard }
942133add5bSMaxime Ripard
943133add5bSMaxime Ripard /*
944133add5bSMaxime Ripard * TODO: There's some bits (reg 0x200, bits 24/25) that
945133add5bSMaxime Ripard * apparently can be used to check whether the data have been
946133add5bSMaxime Ripard * received, but I couldn't get it to work reliably.
947133add5bSMaxime Ripard */
948133add5bSMaxime Ripard regmap_read(dsi->regs, SUN6I_DSI_CMD_CTL_REG, &val);
949133add5bSMaxime Ripard if (val & SUN6I_DSI_CMD_CTL_RX_OVERFLOW)
950133add5bSMaxime Ripard return -EIO;
951133add5bSMaxime Ripard
952133add5bSMaxime Ripard regmap_read(dsi->regs, SUN6I_DSI_CMD_RX_REG(0), &val);
953133add5bSMaxime Ripard byte0 = val & 0xff;
954133add5bSMaxime Ripard if (byte0 == MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT)
955133add5bSMaxime Ripard return -EIO;
956133add5bSMaxime Ripard
957133add5bSMaxime Ripard ((u8 *)msg->rx_buf)[0] = (val >> 8);
958133add5bSMaxime Ripard
959133add5bSMaxime Ripard return 1;
960133add5bSMaxime Ripard }
961133add5bSMaxime Ripard
sun6i_dsi_attach(struct mipi_dsi_host * host,struct mipi_dsi_device * device)962133add5bSMaxime Ripard static int sun6i_dsi_attach(struct mipi_dsi_host *host,
963133add5bSMaxime Ripard struct mipi_dsi_device *device)
964133add5bSMaxime Ripard {
965133add5bSMaxime Ripard struct sun6i_dsi *dsi = host_to_sun6i_dsi(host);
9660e4e3fb4SSamuel Holland struct drm_panel *panel = of_drm_find_panel(device->dev.of_node);
967133add5bSMaxime Ripard
9680e4e3fb4SSamuel Holland if (IS_ERR(panel))
9690e4e3fb4SSamuel Holland return PTR_ERR(panel);
97080579bf3SSamuel Holland if (!dsi->drm || !dsi->drm->registered)
9711a2703bdSSamuel Holland return -EPROBE_DEFER;
9720e4e3fb4SSamuel Holland
9730e4e3fb4SSamuel Holland dsi->panel = panel;
974133add5bSMaxime Ripard dsi->device = device;
975133add5bSMaxime Ripard
9761a2703bdSSamuel Holland drm_kms_helper_hotplug_event(dsi->drm);
9771a2703bdSSamuel Holland
978133add5bSMaxime Ripard dev_info(host->dev, "Attached device %s\n", device->name);
979133add5bSMaxime Ripard
980133add5bSMaxime Ripard return 0;
981133add5bSMaxime Ripard }
982133add5bSMaxime Ripard
sun6i_dsi_detach(struct mipi_dsi_host * host,struct mipi_dsi_device * device)983133add5bSMaxime Ripard static int sun6i_dsi_detach(struct mipi_dsi_host *host,
984133add5bSMaxime Ripard struct mipi_dsi_device *device)
985133add5bSMaxime Ripard {
986133add5bSMaxime Ripard struct sun6i_dsi *dsi = host_to_sun6i_dsi(host);
987133add5bSMaxime Ripard
988133add5bSMaxime Ripard dsi->panel = NULL;
989133add5bSMaxime Ripard dsi->device = NULL;
990133add5bSMaxime Ripard
9911a2703bdSSamuel Holland drm_kms_helper_hotplug_event(dsi->drm);
9921a2703bdSSamuel Holland
993133add5bSMaxime Ripard return 0;
994133add5bSMaxime Ripard }
995133add5bSMaxime Ripard
sun6i_dsi_transfer(struct mipi_dsi_host * host,const struct mipi_dsi_msg * msg)996133add5bSMaxime Ripard static ssize_t sun6i_dsi_transfer(struct mipi_dsi_host *host,
997133add5bSMaxime Ripard const struct mipi_dsi_msg *msg)
998133add5bSMaxime Ripard {
999133add5bSMaxime Ripard struct sun6i_dsi *dsi = host_to_sun6i_dsi(host);
1000133add5bSMaxime Ripard int ret;
1001133add5bSMaxime Ripard
1002133add5bSMaxime Ripard ret = sun6i_dsi_inst_wait_for_completion(dsi);
1003133add5bSMaxime Ripard if (ret < 0)
1004133add5bSMaxime Ripard sun6i_dsi_inst_abort(dsi);
1005133add5bSMaxime Ripard
1006133add5bSMaxime Ripard regmap_write(dsi->regs, SUN6I_DSI_CMD_CTL_REG,
1007133add5bSMaxime Ripard SUN6I_DSI_CMD_CTL_RX_OVERFLOW |
1008133add5bSMaxime Ripard SUN6I_DSI_CMD_CTL_RX_FLAG |
1009133add5bSMaxime Ripard SUN6I_DSI_CMD_CTL_TX_FLAG);
1010133add5bSMaxime Ripard
1011133add5bSMaxime Ripard switch (msg->type) {
1012133add5bSMaxime Ripard case MIPI_DSI_DCS_SHORT_WRITE:
1013133add5bSMaxime Ripard case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
101486d804f4SJagan Teki case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
1015133add5bSMaxime Ripard ret = sun6i_dsi_dcs_write_short(dsi, msg);
1016133add5bSMaxime Ripard break;
1017133add5bSMaxime Ripard
1018133add5bSMaxime Ripard case MIPI_DSI_DCS_LONG_WRITE:
1019133add5bSMaxime Ripard ret = sun6i_dsi_dcs_write_long(dsi, msg);
1020133add5bSMaxime Ripard break;
1021133add5bSMaxime Ripard
1022133add5bSMaxime Ripard case MIPI_DSI_DCS_READ:
1023133add5bSMaxime Ripard if (msg->rx_len == 1) {
1024133add5bSMaxime Ripard ret = sun6i_dsi_dcs_read(dsi, msg);
1025133add5bSMaxime Ripard break;
1026133add5bSMaxime Ripard }
1027df561f66SGustavo A. R. Silva fallthrough;
1028133add5bSMaxime Ripard
1029133add5bSMaxime Ripard default:
1030133add5bSMaxime Ripard ret = -EINVAL;
1031133add5bSMaxime Ripard }
1032133add5bSMaxime Ripard
1033133add5bSMaxime Ripard return ret;
1034133add5bSMaxime Ripard }
1035133add5bSMaxime Ripard
1036133add5bSMaxime Ripard static const struct mipi_dsi_host_ops sun6i_dsi_host_ops = {
1037133add5bSMaxime Ripard .attach = sun6i_dsi_attach,
1038133add5bSMaxime Ripard .detach = sun6i_dsi_detach,
1039133add5bSMaxime Ripard .transfer = sun6i_dsi_transfer,
1040133add5bSMaxime Ripard };
1041133add5bSMaxime Ripard
1042133add5bSMaxime Ripard static const struct regmap_config sun6i_dsi_regmap_config = {
1043133add5bSMaxime Ripard .reg_bits = 32,
1044133add5bSMaxime Ripard .val_bits = 32,
1045133add5bSMaxime Ripard .reg_stride = 4,
1046133add5bSMaxime Ripard .max_register = SUN6I_DSI_CMD_TX_REG(255),
1047133add5bSMaxime Ripard .name = "mipi-dsi",
1048133add5bSMaxime Ripard };
1049133add5bSMaxime Ripard
sun6i_dsi_bind(struct device * dev,struct device * master,void * data)1050133add5bSMaxime Ripard static int sun6i_dsi_bind(struct device *dev, struct device *master,
1051133add5bSMaxime Ripard void *data)
1052133add5bSMaxime Ripard {
1053133add5bSMaxime Ripard struct drm_device *drm = data;
1054133add5bSMaxime Ripard struct sun6i_dsi *dsi = dev_get_drvdata(dev);
1055133add5bSMaxime Ripard int ret;
1056133add5bSMaxime Ripard
1057133add5bSMaxime Ripard drm_encoder_helper_add(&dsi->encoder,
1058133add5bSMaxime Ripard &sun6i_dsi_enc_helper_funcs);
1059f9f3a38dSThomas Zimmermann ret = drm_simple_encoder_init(drm, &dsi->encoder,
1060f9f3a38dSThomas Zimmermann DRM_MODE_ENCODER_DSI);
1061133add5bSMaxime Ripard if (ret) {
1062133add5bSMaxime Ripard dev_err(dsi->dev, "Couldn't initialise the DSI encoder\n");
1063133add5bSMaxime Ripard return ret;
1064133add5bSMaxime Ripard }
1065133add5bSMaxime Ripard dsi->encoder.possible_crtcs = BIT(0);
1066133add5bSMaxime Ripard
1067133add5bSMaxime Ripard drm_connector_helper_add(&dsi->connector,
1068133add5bSMaxime Ripard &sun6i_dsi_connector_helper_funcs);
1069133add5bSMaxime Ripard ret = drm_connector_init(drm, &dsi->connector,
1070133add5bSMaxime Ripard &sun6i_dsi_connector_funcs,
1071133add5bSMaxime Ripard DRM_MODE_CONNECTOR_DSI);
1072133add5bSMaxime Ripard if (ret) {
1073133add5bSMaxime Ripard dev_err(dsi->dev,
1074133add5bSMaxime Ripard "Couldn't initialise the DSI connector\n");
1075133add5bSMaxime Ripard goto err_cleanup_connector;
1076133add5bSMaxime Ripard }
1077133add5bSMaxime Ripard
1078cde4c44dSDaniel Vetter drm_connector_attach_encoder(&dsi->connector, &dsi->encoder);
10791a2703bdSSamuel Holland
10801a2703bdSSamuel Holland dsi->drm = drm;
1081133add5bSMaxime Ripard
1082133add5bSMaxime Ripard return 0;
1083133add5bSMaxime Ripard
1084133add5bSMaxime Ripard err_cleanup_connector:
1085133add5bSMaxime Ripard drm_encoder_cleanup(&dsi->encoder);
1086133add5bSMaxime Ripard return ret;
1087133add5bSMaxime Ripard }
1088133add5bSMaxime Ripard
sun6i_dsi_unbind(struct device * dev,struct device * master,void * data)1089133add5bSMaxime Ripard static void sun6i_dsi_unbind(struct device *dev, struct device *master,
1090133add5bSMaxime Ripard void *data)
1091133add5bSMaxime Ripard {
1092133add5bSMaxime Ripard struct sun6i_dsi *dsi = dev_get_drvdata(dev);
1093133add5bSMaxime Ripard
10941a2703bdSSamuel Holland dsi->drm = NULL;
1095133add5bSMaxime Ripard }
1096133add5bSMaxime Ripard
1097133add5bSMaxime Ripard static const struct component_ops sun6i_dsi_ops = {
1098133add5bSMaxime Ripard .bind = sun6i_dsi_bind,
1099133add5bSMaxime Ripard .unbind = sun6i_dsi_unbind,
1100133add5bSMaxime Ripard };
1101133add5bSMaxime Ripard
sun6i_dsi_probe(struct platform_device * pdev)1102133add5bSMaxime Ripard static int sun6i_dsi_probe(struct platform_device *pdev)
1103133add5bSMaxime Ripard {
11041fa734a8SSamuel Holland const struct sun6i_dsi_variant *variant;
1105133add5bSMaxime Ripard struct device *dev = &pdev->dev;
1106133add5bSMaxime Ripard struct sun6i_dsi *dsi;
1107133add5bSMaxime Ripard void __iomem *base;
1108133add5bSMaxime Ripard int ret;
1109133add5bSMaxime Ripard
11101fa734a8SSamuel Holland variant = device_get_match_data(dev);
11111fa734a8SSamuel Holland if (!variant)
11121fa734a8SSamuel Holland return -EINVAL;
11131fa734a8SSamuel Holland
1114133add5bSMaxime Ripard dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL);
1115133add5bSMaxime Ripard if (!dsi)
1116133add5bSMaxime Ripard return -ENOMEM;
1117133add5bSMaxime Ripard dev_set_drvdata(dev, dsi);
1118133add5bSMaxime Ripard dsi->dev = dev;
1119133add5bSMaxime Ripard dsi->host.ops = &sun6i_dsi_host_ops;
1120133add5bSMaxime Ripard dsi->host.dev = dev;
11211fa734a8SSamuel Holland dsi->variant = variant;
112266dbdc7cSJagan Teki
1123f5df171fSCai Huoqing base = devm_platform_ioremap_resource(pdev, 0);
1124133add5bSMaxime Ripard if (IS_ERR(base)) {
1125133add5bSMaxime Ripard dev_err(dev, "Couldn't map the DSI encoder registers\n");
1126133add5bSMaxime Ripard return PTR_ERR(base);
1127133add5bSMaxime Ripard }
1128133add5bSMaxime Ripard
11291c056ad8SJagan Teki dsi->regulator = devm_regulator_get(dev, "vcc-dsi");
1130b41e24a5SCai Huoqing if (IS_ERR(dsi->regulator))
1131b41e24a5SCai Huoqing return dev_err_probe(dev, PTR_ERR(dsi->regulator),
1132b41e24a5SCai Huoqing "Couldn't get VCC-DSI supply\n");
11331c056ad8SJagan Teki
1134133add5bSMaxime Ripard dsi->reset = devm_reset_control_get_shared(dev, NULL);
1135133add5bSMaxime Ripard if (IS_ERR(dsi->reset)) {
1136133add5bSMaxime Ripard dev_err(dev, "Couldn't get our reset line\n");
1137133add5bSMaxime Ripard return PTR_ERR(dsi->reset);
1138133add5bSMaxime Ripard }
1139133add5bSMaxime Ripard
114066dbdc7cSJagan Teki dsi->regs = devm_regmap_init_mmio(dev, base, &sun6i_dsi_regmap_config);
114166dbdc7cSJagan Teki if (IS_ERR(dsi->regs)) {
114266dbdc7cSJagan Teki dev_err(dev, "Couldn't init regmap\n");
114366dbdc7cSJagan Teki return PTR_ERR(dsi->regs);
114466dbdc7cSJagan Teki }
114566dbdc7cSJagan Teki
11461fa734a8SSamuel Holland dsi->bus_clk = devm_clk_get(dev, variant->has_mod_clk ? "bus" : NULL);
1147b41e24a5SCai Huoqing if (IS_ERR(dsi->bus_clk))
1148b41e24a5SCai Huoqing return dev_err_probe(dev, PTR_ERR(dsi->bus_clk),
1149b41e24a5SCai Huoqing "Couldn't get the DSI bus clock\n");
115066dbdc7cSJagan Teki
115166dbdc7cSJagan Teki ret = regmap_mmio_attach_clk(dsi->regs, dsi->bus_clk);
115266dbdc7cSJagan Teki if (ret)
115366dbdc7cSJagan Teki return ret;
115466dbdc7cSJagan Teki
11551fa734a8SSamuel Holland if (variant->has_mod_clk) {
1156133add5bSMaxime Ripard dsi->mod_clk = devm_clk_get(dev, "mod");
1157133add5bSMaxime Ripard if (IS_ERR(dsi->mod_clk)) {
1158133add5bSMaxime Ripard dev_err(dev, "Couldn't get the DSI mod clock\n");
115966dbdc7cSJagan Teki ret = PTR_ERR(dsi->mod_clk);
116066dbdc7cSJagan Teki goto err_attach_clk;
1161133add5bSMaxime Ripard }
1162133add5bSMaxime Ripard
1163133add5bSMaxime Ripard /*
11641fa734a8SSamuel Holland * In order to operate properly, the module clock on the
11651fa734a8SSamuel Holland * A31 variant always seems to be set to 297MHz.
1166133add5bSMaxime Ripard */
11671fa734a8SSamuel Holland if (variant->set_mod_clk)
1168133add5bSMaxime Ripard clk_set_rate_exclusive(dsi->mod_clk, 297000000);
11691fa734a8SSamuel Holland }
1170133add5bSMaxime Ripard
1171bb3b6fcbSMaxime Ripard dsi->dphy = devm_phy_get(dev, "dphy");
1172bb3b6fcbSMaxime Ripard if (IS_ERR(dsi->dphy)) {
1173133add5bSMaxime Ripard dev_err(dev, "Couldn't get the MIPI D-PHY\n");
11741c7c62a3SMaxime Ripard ret = PTR_ERR(dsi->dphy);
1175133add5bSMaxime Ripard goto err_unprotect_clk;
1176133add5bSMaxime Ripard }
1177133add5bSMaxime Ripard
1178133add5bSMaxime Ripard ret = mipi_dsi_host_register(&dsi->host);
1179133add5bSMaxime Ripard if (ret) {
1180133add5bSMaxime Ripard dev_err(dev, "Couldn't register MIPI-DSI host\n");
1181215be713SSamuel Holland goto err_unprotect_clk;
1182133add5bSMaxime Ripard }
1183133add5bSMaxime Ripard
1184133add5bSMaxime Ripard ret = component_add(&pdev->dev, &sun6i_dsi_ops);
1185133add5bSMaxime Ripard if (ret) {
1186133add5bSMaxime Ripard dev_err(dev, "Couldn't register our component\n");
1187133add5bSMaxime Ripard goto err_remove_dsi_host;
1188133add5bSMaxime Ripard }
1189133add5bSMaxime Ripard
1190133add5bSMaxime Ripard return 0;
1191133add5bSMaxime Ripard
1192133add5bSMaxime Ripard err_remove_dsi_host:
1193133add5bSMaxime Ripard mipi_dsi_host_unregister(&dsi->host);
1194133add5bSMaxime Ripard err_unprotect_clk:
11951fa734a8SSamuel Holland if (dsi->variant->has_mod_clk && dsi->variant->set_mod_clk)
1196133add5bSMaxime Ripard clk_rate_exclusive_put(dsi->mod_clk);
119766dbdc7cSJagan Teki err_attach_clk:
119866dbdc7cSJagan Teki regmap_mmio_detach_clk(dsi->regs);
119937f67d39SDan Carpenter
1200133add5bSMaxime Ripard return ret;
1201133add5bSMaxime Ripard }
1202133add5bSMaxime Ripard
sun6i_dsi_remove(struct platform_device * pdev)1203*d665e3c9SUwe Kleine-König static void sun6i_dsi_remove(struct platform_device *pdev)
1204133add5bSMaxime Ripard {
1205133add5bSMaxime Ripard struct device *dev = &pdev->dev;
1206133add5bSMaxime Ripard struct sun6i_dsi *dsi = dev_get_drvdata(dev);
1207133add5bSMaxime Ripard
1208133add5bSMaxime Ripard component_del(&pdev->dev, &sun6i_dsi_ops);
1209133add5bSMaxime Ripard mipi_dsi_host_unregister(&dsi->host);
12101fa734a8SSamuel Holland if (dsi->variant->has_mod_clk && dsi->variant->set_mod_clk)
1211133add5bSMaxime Ripard clk_rate_exclusive_put(dsi->mod_clk);
1212133add5bSMaxime Ripard
121366dbdc7cSJagan Teki regmap_mmio_detach_clk(dsi->regs);
1214133add5bSMaxime Ripard }
1215133add5bSMaxime Ripard
12161fa734a8SSamuel Holland static const struct sun6i_dsi_variant sun6i_a31_mipi_dsi_variant = {
12171fa734a8SSamuel Holland .has_mod_clk = true,
12181fa734a8SSamuel Holland .set_mod_clk = true,
12191fa734a8SSamuel Holland };
12201fa734a8SSamuel Holland
12211fa734a8SSamuel Holland static const struct sun6i_dsi_variant sun50i_a64_mipi_dsi_variant = {
12221fa734a8SSamuel Holland };
12231fa734a8SSamuel Holland
12244b71e269SSamuel Holland static const struct sun6i_dsi_variant sun50i_a100_mipi_dsi_variant = {
12254b71e269SSamuel Holland .has_mod_clk = true,
12264b71e269SSamuel Holland };
12274b71e269SSamuel Holland
1228133add5bSMaxime Ripard static const struct of_device_id sun6i_dsi_of_table[] = {
12291fa734a8SSamuel Holland {
12301fa734a8SSamuel Holland .compatible = "allwinner,sun6i-a31-mipi-dsi",
12311fa734a8SSamuel Holland .data = &sun6i_a31_mipi_dsi_variant,
12321fa734a8SSamuel Holland },
12331fa734a8SSamuel Holland {
12341fa734a8SSamuel Holland .compatible = "allwinner,sun50i-a64-mipi-dsi",
12351fa734a8SSamuel Holland .data = &sun50i_a64_mipi_dsi_variant,
12361fa734a8SSamuel Holland },
12374b71e269SSamuel Holland {
12384b71e269SSamuel Holland .compatible = "allwinner,sun50i-a100-mipi-dsi",
12394b71e269SSamuel Holland .data = &sun50i_a100_mipi_dsi_variant,
12404b71e269SSamuel Holland },
1241133add5bSMaxime Ripard { }
1242133add5bSMaxime Ripard };
1243133add5bSMaxime Ripard MODULE_DEVICE_TABLE(of, sun6i_dsi_of_table);
1244133add5bSMaxime Ripard
1245133add5bSMaxime Ripard static struct platform_driver sun6i_dsi_platform_driver = {
1246133add5bSMaxime Ripard .probe = sun6i_dsi_probe,
1247*d665e3c9SUwe Kleine-König .remove_new = sun6i_dsi_remove,
1248133add5bSMaxime Ripard .driver = {
1249133add5bSMaxime Ripard .name = "sun6i-mipi-dsi",
1250133add5bSMaxime Ripard .of_match_table = sun6i_dsi_of_table,
1251133add5bSMaxime Ripard },
1252133add5bSMaxime Ripard };
1253133add5bSMaxime Ripard module_platform_driver(sun6i_dsi_platform_driver);
1254133add5bSMaxime Ripard
1255133add5bSMaxime Ripard MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
1256133add5bSMaxime Ripard MODULE_DESCRIPTION("Allwinner A31 DSI Driver");
1257133add5bSMaxime Ripard MODULE_LICENSE("GPL");
1258