1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2015 Free Electrons 4 * Copyright (C) 2015 NextThing Co 5 * 6 * Maxime Ripard <maxime.ripard@free-electrons.com> 7 */ 8 9 #include <linux/clk.h> 10 #include <linux/component.h> 11 #include <linux/module.h> 12 #include <linux/of_address.h> 13 #include <linux/platform_device.h> 14 #include <linux/regmap.h> 15 #include <linux/reset.h> 16 17 #include <drm/drm_atomic.h> 18 #include <drm/drm_atomic_helper.h> 19 #include <drm/drm_of.h> 20 #include <drm/drm_panel.h> 21 #include <drm/drm_print.h> 22 #include <drm/drm_probe_helper.h> 23 #include <drm/drm_simple_kms_helper.h> 24 25 #include "sun4i_crtc.h" 26 #include "sun4i_drv.h" 27 #include "sunxi_engine.h" 28 29 #define SUN4I_TVE_EN_REG 0x000 30 #define SUN4I_TVE_EN_DAC_MAP_MASK GENMASK(19, 4) 31 #define SUN4I_TVE_EN_DAC_MAP(dac, out) (((out) & 0xf) << (dac + 1) * 4) 32 #define SUN4I_TVE_EN_ENABLE BIT(0) 33 34 #define SUN4I_TVE_CFG0_REG 0x004 35 #define SUN4I_TVE_CFG0_DAC_CONTROL_54M BIT(26) 36 #define SUN4I_TVE_CFG0_CORE_DATAPATH_54M BIT(25) 37 #define SUN4I_TVE_CFG0_CORE_CONTROL_54M BIT(24) 38 #define SUN4I_TVE_CFG0_YC_EN BIT(17) 39 #define SUN4I_TVE_CFG0_COMP_EN BIT(16) 40 #define SUN4I_TVE_CFG0_RES(x) ((x) & 0xf) 41 #define SUN4I_TVE_CFG0_RES_480i SUN4I_TVE_CFG0_RES(0) 42 #define SUN4I_TVE_CFG0_RES_576i SUN4I_TVE_CFG0_RES(1) 43 44 #define SUN4I_TVE_DAC0_REG 0x008 45 #define SUN4I_TVE_DAC0_CLOCK_INVERT BIT(24) 46 #define SUN4I_TVE_DAC0_LUMA(x) (((x) & 3) << 20) 47 #define SUN4I_TVE_DAC0_LUMA_0_4 SUN4I_TVE_DAC0_LUMA(3) 48 #define SUN4I_TVE_DAC0_CHROMA(x) (((x) & 3) << 18) 49 #define SUN4I_TVE_DAC0_CHROMA_0_75 SUN4I_TVE_DAC0_CHROMA(3) 50 #define SUN4I_TVE_DAC0_INTERNAL_DAC(x) (((x) & 3) << 16) 51 #define SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS SUN4I_TVE_DAC0_INTERNAL_DAC(3) 52 #define SUN4I_TVE_DAC0_DAC_EN(dac) BIT(dac) 53 54 #define SUN4I_TVE_NOTCH_REG 0x00c 55 #define SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(dac, x) ((4 - (x)) << (dac * 3)) 56 57 #define SUN4I_TVE_CHROMA_FREQ_REG 0x010 58 59 #define SUN4I_TVE_PORCH_REG 0x014 60 #define SUN4I_TVE_PORCH_BACK(x) ((x) << 16) 61 #define SUN4I_TVE_PORCH_FRONT(x) (x) 62 63 #define SUN4I_TVE_LINE_REG 0x01c 64 #define SUN4I_TVE_LINE_FIRST(x) ((x) << 16) 65 #define SUN4I_TVE_LINE_NUMBER(x) (x) 66 67 #define SUN4I_TVE_LEVEL_REG 0x020 68 #define SUN4I_TVE_LEVEL_BLANK(x) ((x) << 16) 69 #define SUN4I_TVE_LEVEL_BLACK(x) (x) 70 71 #define SUN4I_TVE_DAC1_REG 0x024 72 #define SUN4I_TVE_DAC1_AMPLITUDE(dac, x) ((x) << (dac * 8)) 73 74 #define SUN4I_TVE_DETECT_STA_REG 0x038 75 #define SUN4I_TVE_DETECT_STA_DAC(dac) BIT((dac * 8)) 76 #define SUN4I_TVE_DETECT_STA_UNCONNECTED 0 77 #define SUN4I_TVE_DETECT_STA_CONNECTED 1 78 #define SUN4I_TVE_DETECT_STA_GROUND 2 79 80 #define SUN4I_TVE_CB_CR_LVL_REG 0x10c 81 #define SUN4I_TVE_CB_CR_LVL_CR_BURST(x) ((x) << 8) 82 #define SUN4I_TVE_CB_CR_LVL_CB_BURST(x) (x) 83 84 #define SUN4I_TVE_TINT_BURST_PHASE_REG 0x110 85 #define SUN4I_TVE_TINT_BURST_PHASE_CHROMA(x) (x) 86 87 #define SUN4I_TVE_BURST_WIDTH_REG 0x114 88 #define SUN4I_TVE_BURST_WIDTH_BREEZEWAY(x) ((x) << 16) 89 #define SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(x) ((x) << 8) 90 #define SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(x) (x) 91 92 #define SUN4I_TVE_CB_CR_GAIN_REG 0x118 93 #define SUN4I_TVE_CB_CR_GAIN_CR(x) ((x) << 8) 94 #define SUN4I_TVE_CB_CR_GAIN_CB(x) (x) 95 96 #define SUN4I_TVE_SYNC_VBI_REG 0x11c 97 #define SUN4I_TVE_SYNC_VBI_SYNC(x) ((x) << 16) 98 #define SUN4I_TVE_SYNC_VBI_VBLANK(x) (x) 99 100 #define SUN4I_TVE_ACTIVE_LINE_REG 0x124 101 #define SUN4I_TVE_ACTIVE_LINE(x) (x) 102 103 #define SUN4I_TVE_CHROMA_REG 0x128 104 #define SUN4I_TVE_CHROMA_COMP_GAIN(x) ((x) & 3) 105 #define SUN4I_TVE_CHROMA_COMP_GAIN_50 SUN4I_TVE_CHROMA_COMP_GAIN(2) 106 107 #define SUN4I_TVE_12C_REG 0x12c 108 #define SUN4I_TVE_12C_NOTCH_WIDTH_WIDE BIT(8) 109 #define SUN4I_TVE_12C_COMP_YUV_EN BIT(0) 110 111 #define SUN4I_TVE_RESYNC_REG 0x130 112 #define SUN4I_TVE_RESYNC_FIELD BIT(31) 113 #define SUN4I_TVE_RESYNC_LINE(x) ((x) << 16) 114 #define SUN4I_TVE_RESYNC_PIXEL(x) (x) 115 116 #define SUN4I_TVE_SLAVE_REG 0x134 117 118 #define SUN4I_TVE_WSS_DATA2_REG 0x244 119 120 struct color_gains { 121 u16 cb; 122 u16 cr; 123 }; 124 125 struct burst_levels { 126 u16 cb; 127 u16 cr; 128 }; 129 130 struct video_levels { 131 u16 black; 132 u16 blank; 133 }; 134 135 struct resync_parameters { 136 bool field; 137 u16 line; 138 u16 pixel; 139 }; 140 141 struct tv_mode { 142 char *name; 143 144 u32 mode; 145 u32 chroma_freq; 146 u16 back_porch; 147 u16 front_porch; 148 u16 line_number; 149 u16 vblank_level; 150 151 u32 hdisplay; 152 u16 hfront_porch; 153 u16 hsync_len; 154 u16 hback_porch; 155 156 u32 vdisplay; 157 u16 vfront_porch; 158 u16 vsync_len; 159 u16 vback_porch; 160 161 bool yc_en; 162 bool dac3_en; 163 bool dac_bit25_en; 164 165 const struct color_gains *color_gains; 166 const struct burst_levels *burst_levels; 167 const struct video_levels *video_levels; 168 const struct resync_parameters *resync_params; 169 }; 170 171 struct sun4i_tv { 172 struct drm_connector connector; 173 struct drm_encoder encoder; 174 175 struct clk *clk; 176 struct regmap *regs; 177 struct reset_control *reset; 178 179 struct sun4i_drv *drv; 180 }; 181 182 static const struct video_levels ntsc_video_levels = { 183 .black = 282, .blank = 240, 184 }; 185 186 static const struct video_levels pal_video_levels = { 187 .black = 252, .blank = 252, 188 }; 189 190 static const struct burst_levels ntsc_burst_levels = { 191 .cb = 79, .cr = 0, 192 }; 193 194 static const struct burst_levels pal_burst_levels = { 195 .cb = 40, .cr = 40, 196 }; 197 198 static const struct color_gains ntsc_color_gains = { 199 .cb = 160, .cr = 160, 200 }; 201 202 static const struct color_gains pal_color_gains = { 203 .cb = 224, .cr = 224, 204 }; 205 206 static const struct resync_parameters ntsc_resync_parameters = { 207 .field = false, .line = 14, .pixel = 12, 208 }; 209 210 static const struct resync_parameters pal_resync_parameters = { 211 .field = true, .line = 13, .pixel = 12, 212 }; 213 214 static const struct tv_mode tv_modes[] = { 215 { 216 .name = "NTSC", 217 .mode = SUN4I_TVE_CFG0_RES_480i, 218 .chroma_freq = 0x21f07c1f, 219 .yc_en = true, 220 .dac3_en = true, 221 .dac_bit25_en = true, 222 223 .back_porch = 118, 224 .front_porch = 32, 225 .line_number = 525, 226 227 .hdisplay = 720, 228 .hfront_porch = 18, 229 .hsync_len = 2, 230 .hback_porch = 118, 231 232 .vdisplay = 480, 233 .vfront_porch = 26, 234 .vsync_len = 2, 235 .vback_porch = 17, 236 237 .vblank_level = 240, 238 239 .color_gains = &ntsc_color_gains, 240 .burst_levels = &ntsc_burst_levels, 241 .video_levels = &ntsc_video_levels, 242 .resync_params = &ntsc_resync_parameters, 243 }, 244 { 245 .name = "PAL", 246 .mode = SUN4I_TVE_CFG0_RES_576i, 247 .chroma_freq = 0x2a098acb, 248 249 .back_porch = 138, 250 .front_porch = 24, 251 .line_number = 625, 252 253 .hdisplay = 720, 254 .hfront_porch = 3, 255 .hsync_len = 2, 256 .hback_porch = 139, 257 258 .vdisplay = 576, 259 .vfront_porch = 28, 260 .vsync_len = 2, 261 .vback_porch = 19, 262 263 .vblank_level = 252, 264 265 .color_gains = &pal_color_gains, 266 .burst_levels = &pal_burst_levels, 267 .video_levels = &pal_video_levels, 268 .resync_params = &pal_resync_parameters, 269 }, 270 }; 271 272 static inline struct sun4i_tv * 273 drm_encoder_to_sun4i_tv(struct drm_encoder *encoder) 274 { 275 return container_of(encoder, struct sun4i_tv, 276 encoder); 277 } 278 279 /* 280 * FIXME: If only the drm_display_mode private field was usable, this 281 * could go away... 282 * 283 * So far, it doesn't seem to be preserved when the mode is passed by 284 * to mode_set for some reason. 285 */ 286 static const struct tv_mode *sun4i_tv_find_tv_by_mode(const struct drm_display_mode *mode) 287 { 288 int i; 289 290 /* First try to identify the mode by name */ 291 for (i = 0; i < ARRAY_SIZE(tv_modes); i++) { 292 const struct tv_mode *tv_mode = &tv_modes[i]; 293 294 DRM_DEBUG_DRIVER("Comparing mode %s vs %s", 295 mode->name, tv_mode->name); 296 297 if (!strcmp(mode->name, tv_mode->name)) 298 return tv_mode; 299 } 300 301 /* Then by number of lines */ 302 for (i = 0; i < ARRAY_SIZE(tv_modes); i++) { 303 const struct tv_mode *tv_mode = &tv_modes[i]; 304 305 DRM_DEBUG_DRIVER("Comparing mode %s vs %s (X: %d vs %d)", 306 mode->name, tv_mode->name, 307 mode->vdisplay, tv_mode->vdisplay); 308 309 if (mode->vdisplay == tv_mode->vdisplay) 310 return tv_mode; 311 } 312 313 return NULL; 314 } 315 316 static void sun4i_tv_mode_to_drm_mode(const struct tv_mode *tv_mode, 317 struct drm_display_mode *mode) 318 { 319 DRM_DEBUG_DRIVER("Creating mode %s\n", mode->name); 320 321 mode->type = DRM_MODE_TYPE_DRIVER; 322 mode->clock = 13500; 323 mode->flags = DRM_MODE_FLAG_INTERLACE; 324 325 mode->hdisplay = tv_mode->hdisplay; 326 mode->hsync_start = mode->hdisplay + tv_mode->hfront_porch; 327 mode->hsync_end = mode->hsync_start + tv_mode->hsync_len; 328 mode->htotal = mode->hsync_end + tv_mode->hback_porch; 329 330 mode->vdisplay = tv_mode->vdisplay; 331 mode->vsync_start = mode->vdisplay + tv_mode->vfront_porch; 332 mode->vsync_end = mode->vsync_start + tv_mode->vsync_len; 333 mode->vtotal = mode->vsync_end + tv_mode->vback_porch; 334 } 335 336 static void sun4i_tv_disable(struct drm_encoder *encoder, 337 struct drm_atomic_state *state) 338 { 339 struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder); 340 struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); 341 342 DRM_DEBUG_DRIVER("Disabling the TV Output\n"); 343 344 regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, 345 SUN4I_TVE_EN_ENABLE, 346 0); 347 348 sunxi_engine_disable_color_correction(crtc->engine); 349 } 350 351 static void sun4i_tv_enable(struct drm_encoder *encoder, 352 struct drm_atomic_state *state) 353 { 354 struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder); 355 struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); 356 struct drm_crtc_state *crtc_state = 357 drm_atomic_get_new_crtc_state(state, encoder->crtc); 358 struct drm_display_mode *mode = &crtc_state->mode; 359 const struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode); 360 361 DRM_DEBUG_DRIVER("Enabling the TV Output\n"); 362 363 /* Enable and map the DAC to the output */ 364 regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, 365 SUN4I_TVE_EN_DAC_MAP_MASK, 366 SUN4I_TVE_EN_DAC_MAP(0, 1) | 367 SUN4I_TVE_EN_DAC_MAP(1, 2) | 368 SUN4I_TVE_EN_DAC_MAP(2, 3) | 369 SUN4I_TVE_EN_DAC_MAP(3, 4)); 370 371 /* Set PAL settings */ 372 regmap_write(tv->regs, SUN4I_TVE_CFG0_REG, 373 tv_mode->mode | 374 (tv_mode->yc_en ? SUN4I_TVE_CFG0_YC_EN : 0) | 375 SUN4I_TVE_CFG0_COMP_EN | 376 SUN4I_TVE_CFG0_DAC_CONTROL_54M | 377 SUN4I_TVE_CFG0_CORE_DATAPATH_54M | 378 SUN4I_TVE_CFG0_CORE_CONTROL_54M); 379 380 /* Configure the DAC for a composite output */ 381 regmap_write(tv->regs, SUN4I_TVE_DAC0_REG, 382 SUN4I_TVE_DAC0_DAC_EN(0) | 383 (tv_mode->dac3_en ? SUN4I_TVE_DAC0_DAC_EN(3) : 0) | 384 SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS | 385 SUN4I_TVE_DAC0_CHROMA_0_75 | 386 SUN4I_TVE_DAC0_LUMA_0_4 | 387 SUN4I_TVE_DAC0_CLOCK_INVERT | 388 (tv_mode->dac_bit25_en ? BIT(25) : 0) | 389 BIT(30)); 390 391 /* Configure the sample delay between DAC0 and the other DAC */ 392 regmap_write(tv->regs, SUN4I_TVE_NOTCH_REG, 393 SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(1, 0) | 394 SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(2, 0)); 395 396 regmap_write(tv->regs, SUN4I_TVE_CHROMA_FREQ_REG, 397 tv_mode->chroma_freq); 398 399 /* Set the front and back porch */ 400 regmap_write(tv->regs, SUN4I_TVE_PORCH_REG, 401 SUN4I_TVE_PORCH_BACK(tv_mode->back_porch) | 402 SUN4I_TVE_PORCH_FRONT(tv_mode->front_porch)); 403 404 /* Set the lines setup */ 405 regmap_write(tv->regs, SUN4I_TVE_LINE_REG, 406 SUN4I_TVE_LINE_FIRST(22) | 407 SUN4I_TVE_LINE_NUMBER(tv_mode->line_number)); 408 409 regmap_write(tv->regs, SUN4I_TVE_LEVEL_REG, 410 SUN4I_TVE_LEVEL_BLANK(tv_mode->video_levels->blank) | 411 SUN4I_TVE_LEVEL_BLACK(tv_mode->video_levels->black)); 412 413 regmap_write(tv->regs, SUN4I_TVE_DAC1_REG, 414 SUN4I_TVE_DAC1_AMPLITUDE(0, 0x18) | 415 SUN4I_TVE_DAC1_AMPLITUDE(1, 0x18) | 416 SUN4I_TVE_DAC1_AMPLITUDE(2, 0x18) | 417 SUN4I_TVE_DAC1_AMPLITUDE(3, 0x18)); 418 419 regmap_write(tv->regs, SUN4I_TVE_CB_CR_LVL_REG, 420 SUN4I_TVE_CB_CR_LVL_CB_BURST(tv_mode->burst_levels->cb) | 421 SUN4I_TVE_CB_CR_LVL_CR_BURST(tv_mode->burst_levels->cr)); 422 423 /* Set burst width for a composite output */ 424 regmap_write(tv->regs, SUN4I_TVE_BURST_WIDTH_REG, 425 SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(126) | 426 SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(68) | 427 SUN4I_TVE_BURST_WIDTH_BREEZEWAY(22)); 428 429 regmap_write(tv->regs, SUN4I_TVE_CB_CR_GAIN_REG, 430 SUN4I_TVE_CB_CR_GAIN_CB(tv_mode->color_gains->cb) | 431 SUN4I_TVE_CB_CR_GAIN_CR(tv_mode->color_gains->cr)); 432 433 regmap_write(tv->regs, SUN4I_TVE_SYNC_VBI_REG, 434 SUN4I_TVE_SYNC_VBI_SYNC(0x10) | 435 SUN4I_TVE_SYNC_VBI_VBLANK(tv_mode->vblank_level)); 436 437 regmap_write(tv->regs, SUN4I_TVE_ACTIVE_LINE_REG, 438 SUN4I_TVE_ACTIVE_LINE(1440)); 439 440 /* Set composite chroma gain to 50 % */ 441 regmap_write(tv->regs, SUN4I_TVE_CHROMA_REG, 442 SUN4I_TVE_CHROMA_COMP_GAIN_50); 443 444 regmap_write(tv->regs, SUN4I_TVE_12C_REG, 445 SUN4I_TVE_12C_COMP_YUV_EN | 446 SUN4I_TVE_12C_NOTCH_WIDTH_WIDE); 447 448 regmap_write(tv->regs, SUN4I_TVE_RESYNC_REG, 449 SUN4I_TVE_RESYNC_PIXEL(tv_mode->resync_params->pixel) | 450 SUN4I_TVE_RESYNC_LINE(tv_mode->resync_params->line) | 451 (tv_mode->resync_params->field ? 452 SUN4I_TVE_RESYNC_FIELD : 0)); 453 454 regmap_write(tv->regs, SUN4I_TVE_SLAVE_REG, 0); 455 456 sunxi_engine_apply_color_correction(crtc->engine); 457 458 regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, 459 SUN4I_TVE_EN_ENABLE, 460 SUN4I_TVE_EN_ENABLE); 461 } 462 463 static const struct drm_encoder_helper_funcs sun4i_tv_helper_funcs = { 464 .atomic_disable = sun4i_tv_disable, 465 .atomic_enable = sun4i_tv_enable, 466 }; 467 468 static int sun4i_tv_comp_get_modes(struct drm_connector *connector) 469 { 470 int i; 471 472 for (i = 0; i < ARRAY_SIZE(tv_modes); i++) { 473 struct drm_display_mode *mode; 474 const struct tv_mode *tv_mode = &tv_modes[i]; 475 476 mode = drm_mode_create(connector->dev); 477 if (!mode) { 478 DRM_ERROR("Failed to create a new display mode\n"); 479 return 0; 480 } 481 482 strcpy(mode->name, tv_mode->name); 483 484 sun4i_tv_mode_to_drm_mode(tv_mode, mode); 485 drm_mode_probed_add(connector, mode); 486 } 487 488 return i; 489 } 490 491 static const struct drm_connector_helper_funcs sun4i_tv_comp_connector_helper_funcs = { 492 .get_modes = sun4i_tv_comp_get_modes, 493 }; 494 495 static const struct drm_connector_funcs sun4i_tv_comp_connector_funcs = { 496 .fill_modes = drm_helper_probe_single_connector_modes, 497 .destroy = drm_connector_cleanup, 498 .reset = drm_atomic_helper_connector_reset, 499 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 500 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 501 }; 502 503 static const struct regmap_config sun4i_tv_regmap_config = { 504 .reg_bits = 32, 505 .val_bits = 32, 506 .reg_stride = 4, 507 .max_register = SUN4I_TVE_WSS_DATA2_REG, 508 .name = "tv-encoder", 509 }; 510 511 static int sun4i_tv_bind(struct device *dev, struct device *master, 512 void *data) 513 { 514 struct platform_device *pdev = to_platform_device(dev); 515 struct drm_device *drm = data; 516 struct sun4i_drv *drv = drm->dev_private; 517 struct sun4i_tv *tv; 518 void __iomem *regs; 519 int ret; 520 521 tv = devm_kzalloc(dev, sizeof(*tv), GFP_KERNEL); 522 if (!tv) 523 return -ENOMEM; 524 tv->drv = drv; 525 dev_set_drvdata(dev, tv); 526 527 regs = devm_platform_ioremap_resource(pdev, 0); 528 if (IS_ERR(regs)) { 529 dev_err(dev, "Couldn't map the TV encoder registers\n"); 530 return PTR_ERR(regs); 531 } 532 533 tv->regs = devm_regmap_init_mmio(dev, regs, 534 &sun4i_tv_regmap_config); 535 if (IS_ERR(tv->regs)) { 536 dev_err(dev, "Couldn't create the TV encoder regmap\n"); 537 return PTR_ERR(tv->regs); 538 } 539 540 tv->reset = devm_reset_control_get(dev, NULL); 541 if (IS_ERR(tv->reset)) { 542 dev_err(dev, "Couldn't get our reset line\n"); 543 return PTR_ERR(tv->reset); 544 } 545 546 ret = reset_control_deassert(tv->reset); 547 if (ret) { 548 dev_err(dev, "Couldn't deassert our reset line\n"); 549 return ret; 550 } 551 552 tv->clk = devm_clk_get(dev, NULL); 553 if (IS_ERR(tv->clk)) { 554 dev_err(dev, "Couldn't get the TV encoder clock\n"); 555 ret = PTR_ERR(tv->clk); 556 goto err_assert_reset; 557 } 558 clk_prepare_enable(tv->clk); 559 560 drm_encoder_helper_add(&tv->encoder, 561 &sun4i_tv_helper_funcs); 562 ret = drm_simple_encoder_init(drm, &tv->encoder, 563 DRM_MODE_ENCODER_TVDAC); 564 if (ret) { 565 dev_err(dev, "Couldn't initialise the TV encoder\n"); 566 goto err_disable_clk; 567 } 568 569 tv->encoder.possible_crtcs = drm_of_find_possible_crtcs(drm, 570 dev->of_node); 571 if (!tv->encoder.possible_crtcs) { 572 ret = -EPROBE_DEFER; 573 goto err_disable_clk; 574 } 575 576 drm_connector_helper_add(&tv->connector, 577 &sun4i_tv_comp_connector_helper_funcs); 578 ret = drm_connector_init(drm, &tv->connector, 579 &sun4i_tv_comp_connector_funcs, 580 DRM_MODE_CONNECTOR_Composite); 581 if (ret) { 582 dev_err(dev, 583 "Couldn't initialise the Composite connector\n"); 584 goto err_cleanup_encoder; 585 } 586 tv->connector.interlace_allowed = true; 587 588 drm_connector_attach_encoder(&tv->connector, &tv->encoder); 589 590 return 0; 591 592 err_cleanup_encoder: 593 drm_encoder_cleanup(&tv->encoder); 594 err_disable_clk: 595 clk_disable_unprepare(tv->clk); 596 err_assert_reset: 597 reset_control_assert(tv->reset); 598 return ret; 599 } 600 601 static void sun4i_tv_unbind(struct device *dev, struct device *master, 602 void *data) 603 { 604 struct sun4i_tv *tv = dev_get_drvdata(dev); 605 606 drm_connector_cleanup(&tv->connector); 607 drm_encoder_cleanup(&tv->encoder); 608 clk_disable_unprepare(tv->clk); 609 reset_control_assert(tv->reset); 610 } 611 612 static const struct component_ops sun4i_tv_ops = { 613 .bind = sun4i_tv_bind, 614 .unbind = sun4i_tv_unbind, 615 }; 616 617 static int sun4i_tv_probe(struct platform_device *pdev) 618 { 619 return component_add(&pdev->dev, &sun4i_tv_ops); 620 } 621 622 static int sun4i_tv_remove(struct platform_device *pdev) 623 { 624 component_del(&pdev->dev, &sun4i_tv_ops); 625 626 return 0; 627 } 628 629 static const struct of_device_id sun4i_tv_of_table[] = { 630 { .compatible = "allwinner,sun4i-a10-tv-encoder" }, 631 { } 632 }; 633 MODULE_DEVICE_TABLE(of, sun4i_tv_of_table); 634 635 static struct platform_driver sun4i_tv_platform_driver = { 636 .probe = sun4i_tv_probe, 637 .remove = sun4i_tv_remove, 638 .driver = { 639 .name = "sun4i-tve", 640 .of_match_table = sun4i_tv_of_table, 641 }, 642 }; 643 module_platform_driver(sun4i_tv_platform_driver); 644 645 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); 646 MODULE_DESCRIPTION("Allwinner A10 TV Encoder Driver"); 647 MODULE_LICENSE("GPL"); 648