xref: /openbmc/linux/drivers/gpu/drm/sun4i/sun4i_tv.c (revision 58fc7f73)
1 /*
2  * Copyright (C) 2015 Free Electrons
3  * Copyright (C) 2015 NextThing Co
4  *
5  * Maxime Ripard <maxime.ripard@free-electrons.com>
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  */
12 
13 #include <linux/clk.h>
14 #include <linux/component.h>
15 #include <linux/of_address.h>
16 #include <linux/regmap.h>
17 #include <linux/reset.h>
18 
19 #include <drm/drmP.h>
20 #include <drm/drm_atomic_helper.h>
21 #include <drm/drm_crtc_helper.h>
22 #include <drm/drm_of.h>
23 #include <drm/drm_panel.h>
24 
25 #include "sun4i_crtc.h"
26 #include "sun4i_drv.h"
27 #include "sun4i_tcon.h"
28 #include "sunxi_engine.h"
29 
30 #define SUN4I_TVE_EN_REG		0x000
31 #define SUN4I_TVE_EN_DAC_MAP_MASK		GENMASK(19, 4)
32 #define SUN4I_TVE_EN_DAC_MAP(dac, out)		(((out) & 0xf) << (dac + 1) * 4)
33 #define SUN4I_TVE_EN_ENABLE			BIT(0)
34 
35 #define SUN4I_TVE_CFG0_REG		0x004
36 #define SUN4I_TVE_CFG0_DAC_CONTROL_54M		BIT(26)
37 #define SUN4I_TVE_CFG0_CORE_DATAPATH_54M	BIT(25)
38 #define SUN4I_TVE_CFG0_CORE_CONTROL_54M		BIT(24)
39 #define SUN4I_TVE_CFG0_YC_EN			BIT(17)
40 #define SUN4I_TVE_CFG0_COMP_EN			BIT(16)
41 #define SUN4I_TVE_CFG0_RES(x)			((x) & 0xf)
42 #define SUN4I_TVE_CFG0_RES_480i			SUN4I_TVE_CFG0_RES(0)
43 #define SUN4I_TVE_CFG0_RES_576i			SUN4I_TVE_CFG0_RES(1)
44 
45 #define SUN4I_TVE_DAC0_REG		0x008
46 #define SUN4I_TVE_DAC0_CLOCK_INVERT		BIT(24)
47 #define SUN4I_TVE_DAC0_LUMA(x)			(((x) & 3) << 20)
48 #define SUN4I_TVE_DAC0_LUMA_0_4			SUN4I_TVE_DAC0_LUMA(3)
49 #define SUN4I_TVE_DAC0_CHROMA(x)		(((x) & 3) << 18)
50 #define SUN4I_TVE_DAC0_CHROMA_0_75		SUN4I_TVE_DAC0_CHROMA(3)
51 #define SUN4I_TVE_DAC0_INTERNAL_DAC(x)		(((x) & 3) << 16)
52 #define SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS	SUN4I_TVE_DAC0_INTERNAL_DAC(3)
53 #define SUN4I_TVE_DAC0_DAC_EN(dac)		BIT(dac)
54 
55 #define SUN4I_TVE_NOTCH_REG		0x00c
56 #define SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(dac, x)	((4 - (x)) << (dac * 3))
57 
58 #define SUN4I_TVE_CHROMA_FREQ_REG	0x010
59 
60 #define SUN4I_TVE_PORCH_REG		0x014
61 #define SUN4I_TVE_PORCH_BACK(x)			((x) << 16)
62 #define SUN4I_TVE_PORCH_FRONT(x)		(x)
63 
64 #define SUN4I_TVE_LINE_REG		0x01c
65 #define SUN4I_TVE_LINE_FIRST(x)			((x) << 16)
66 #define SUN4I_TVE_LINE_NUMBER(x)		(x)
67 
68 #define SUN4I_TVE_LEVEL_REG		0x020
69 #define SUN4I_TVE_LEVEL_BLANK(x)		((x) << 16)
70 #define SUN4I_TVE_LEVEL_BLACK(x)		(x)
71 
72 #define SUN4I_TVE_DAC1_REG		0x024
73 #define SUN4I_TVE_DAC1_AMPLITUDE(dac, x)	((x) << (dac * 8))
74 
75 #define SUN4I_TVE_DETECT_STA_REG	0x038
76 #define SUN4I_TVE_DETECT_STA_DAC(dac)		BIT((dac * 8))
77 #define SUN4I_TVE_DETECT_STA_UNCONNECTED		0
78 #define SUN4I_TVE_DETECT_STA_CONNECTED			1
79 #define SUN4I_TVE_DETECT_STA_GROUND			2
80 
81 #define SUN4I_TVE_CB_CR_LVL_REG		0x10c
82 #define SUN4I_TVE_CB_CR_LVL_CR_BURST(x)		((x) << 8)
83 #define SUN4I_TVE_CB_CR_LVL_CB_BURST(x)		(x)
84 
85 #define SUN4I_TVE_TINT_BURST_PHASE_REG	0x110
86 #define SUN4I_TVE_TINT_BURST_PHASE_CHROMA(x)	(x)
87 
88 #define SUN4I_TVE_BURST_WIDTH_REG	0x114
89 #define SUN4I_TVE_BURST_WIDTH_BREEZEWAY(x)	((x) << 16)
90 #define SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(x)	((x) << 8)
91 #define SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(x)	(x)
92 
93 #define SUN4I_TVE_CB_CR_GAIN_REG	0x118
94 #define SUN4I_TVE_CB_CR_GAIN_CR(x)		((x) << 8)
95 #define SUN4I_TVE_CB_CR_GAIN_CB(x)		(x)
96 
97 #define SUN4I_TVE_SYNC_VBI_REG		0x11c
98 #define SUN4I_TVE_SYNC_VBI_SYNC(x)		((x) << 16)
99 #define SUN4I_TVE_SYNC_VBI_VBLANK(x)		(x)
100 
101 #define SUN4I_TVE_ACTIVE_LINE_REG	0x124
102 #define SUN4I_TVE_ACTIVE_LINE(x)		(x)
103 
104 #define SUN4I_TVE_CHROMA_REG		0x128
105 #define SUN4I_TVE_CHROMA_COMP_GAIN(x)		((x) & 3)
106 #define SUN4I_TVE_CHROMA_COMP_GAIN_50		SUN4I_TVE_CHROMA_COMP_GAIN(2)
107 
108 #define SUN4I_TVE_12C_REG		0x12c
109 #define SUN4I_TVE_12C_NOTCH_WIDTH_WIDE		BIT(8)
110 #define SUN4I_TVE_12C_COMP_YUV_EN		BIT(0)
111 
112 #define SUN4I_TVE_RESYNC_REG		0x130
113 #define SUN4I_TVE_RESYNC_FIELD			BIT(31)
114 #define SUN4I_TVE_RESYNC_LINE(x)		((x) << 16)
115 #define SUN4I_TVE_RESYNC_PIXEL(x)		(x)
116 
117 #define SUN4I_TVE_SLAVE_REG		0x134
118 
119 #define SUN4I_TVE_WSS_DATA2_REG		0x244
120 
121 struct color_gains {
122 	u16	cb;
123 	u16	cr;
124 };
125 
126 struct burst_levels {
127 	u16	cb;
128 	u16	cr;
129 };
130 
131 struct video_levels {
132 	u16	black;
133 	u16	blank;
134 };
135 
136 struct resync_parameters {
137 	bool	field;
138 	u16	line;
139 	u16	pixel;
140 };
141 
142 struct tv_mode {
143 	char		*name;
144 
145 	u32		mode;
146 	u32		chroma_freq;
147 	u16		back_porch;
148 	u16		front_porch;
149 	u16		line_number;
150 	u16		vblank_level;
151 
152 	u32		hdisplay;
153 	u16		hfront_porch;
154 	u16		hsync_len;
155 	u16		hback_porch;
156 
157 	u32		vdisplay;
158 	u16		vfront_porch;
159 	u16		vsync_len;
160 	u16		vback_porch;
161 
162 	bool		yc_en;
163 	bool		dac3_en;
164 	bool		dac_bit25_en;
165 
166 	const struct color_gains	*color_gains;
167 	const struct burst_levels	*burst_levels;
168 	const struct video_levels	*video_levels;
169 	const struct resync_parameters	*resync_params;
170 };
171 
172 struct sun4i_tv {
173 	struct drm_connector	connector;
174 	struct drm_encoder	encoder;
175 
176 	struct clk		*clk;
177 	struct regmap		*regs;
178 	struct reset_control	*reset;
179 
180 	struct sun4i_drv	*drv;
181 };
182 
183 static const struct video_levels ntsc_video_levels = {
184 	.black = 282,	.blank = 240,
185 };
186 
187 static const struct video_levels pal_video_levels = {
188 	.black = 252,	.blank = 252,
189 };
190 
191 static const struct burst_levels ntsc_burst_levels = {
192 	.cb = 79,	.cr = 0,
193 };
194 
195 static const struct burst_levels pal_burst_levels = {
196 	.cb = 40,	.cr = 40,
197 };
198 
199 static const struct color_gains ntsc_color_gains = {
200 	.cb = 160,	.cr = 160,
201 };
202 
203 static const struct color_gains pal_color_gains = {
204 	.cb = 224,	.cr = 224,
205 };
206 
207 static const struct resync_parameters ntsc_resync_parameters = {
208 	.field = false,	.line = 14,	.pixel = 12,
209 };
210 
211 static const struct resync_parameters pal_resync_parameters = {
212 	.field = true,	.line = 13,	.pixel = 12,
213 };
214 
215 static const struct tv_mode tv_modes[] = {
216 	{
217 		.name		= "NTSC",
218 		.mode		= SUN4I_TVE_CFG0_RES_480i,
219 		.chroma_freq	= 0x21f07c1f,
220 		.yc_en		= true,
221 		.dac3_en	= true,
222 		.dac_bit25_en	= true,
223 
224 		.back_porch	= 118,
225 		.front_porch	= 32,
226 		.line_number	= 525,
227 
228 		.hdisplay	= 720,
229 		.hfront_porch	= 18,
230 		.hsync_len	= 2,
231 		.hback_porch	= 118,
232 
233 		.vdisplay	= 480,
234 		.vfront_porch	= 26,
235 		.vsync_len	= 2,
236 		.vback_porch	= 17,
237 
238 		.vblank_level	= 240,
239 
240 		.color_gains	= &ntsc_color_gains,
241 		.burst_levels	= &ntsc_burst_levels,
242 		.video_levels	= &ntsc_video_levels,
243 		.resync_params	= &ntsc_resync_parameters,
244 	},
245 	{
246 		.name		= "PAL",
247 		.mode		= SUN4I_TVE_CFG0_RES_576i,
248 		.chroma_freq	= 0x2a098acb,
249 
250 		.back_porch	= 138,
251 		.front_porch	= 24,
252 		.line_number	= 625,
253 
254 		.hdisplay	= 720,
255 		.hfront_porch	= 3,
256 		.hsync_len	= 2,
257 		.hback_porch	= 139,
258 
259 		.vdisplay	= 576,
260 		.vfront_porch	= 28,
261 		.vsync_len	= 2,
262 		.vback_porch	= 19,
263 
264 		.vblank_level	= 252,
265 
266 		.color_gains	= &pal_color_gains,
267 		.burst_levels	= &pal_burst_levels,
268 		.video_levels	= &pal_video_levels,
269 		.resync_params	= &pal_resync_parameters,
270 	},
271 };
272 
273 static inline struct sun4i_tv *
274 drm_encoder_to_sun4i_tv(struct drm_encoder *encoder)
275 {
276 	return container_of(encoder, struct sun4i_tv,
277 			    encoder);
278 }
279 
280 static inline struct sun4i_tv *
281 drm_connector_to_sun4i_tv(struct drm_connector *connector)
282 {
283 	return container_of(connector, struct sun4i_tv,
284 			    connector);
285 }
286 
287 /*
288  * FIXME: If only the drm_display_mode private field was usable, this
289  * could go away...
290  *
291  * So far, it doesn't seem to be preserved when the mode is passed by
292  * to mode_set for some reason.
293  */
294 static const struct tv_mode *sun4i_tv_find_tv_by_mode(const struct drm_display_mode *mode)
295 {
296 	int i;
297 
298 	/* First try to identify the mode by name */
299 	for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
300 		const struct tv_mode *tv_mode = &tv_modes[i];
301 
302 		DRM_DEBUG_DRIVER("Comparing mode %s vs %s",
303 				 mode->name, tv_mode->name);
304 
305 		if (!strcmp(mode->name, tv_mode->name))
306 			return tv_mode;
307 	}
308 
309 	/* Then by number of lines */
310 	for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
311 		const struct tv_mode *tv_mode = &tv_modes[i];
312 
313 		DRM_DEBUG_DRIVER("Comparing mode %s vs %s (X: %d vs %d)",
314 				 mode->name, tv_mode->name,
315 				 mode->vdisplay, tv_mode->vdisplay);
316 
317 		if (mode->vdisplay == tv_mode->vdisplay)
318 			return tv_mode;
319 	}
320 
321 	return NULL;
322 }
323 
324 static void sun4i_tv_mode_to_drm_mode(const struct tv_mode *tv_mode,
325 				      struct drm_display_mode *mode)
326 {
327 	DRM_DEBUG_DRIVER("Creating mode %s\n", mode->name);
328 
329 	mode->type = DRM_MODE_TYPE_DRIVER;
330 	mode->clock = 13500;
331 	mode->flags = DRM_MODE_FLAG_INTERLACE;
332 
333 	mode->hdisplay = tv_mode->hdisplay;
334 	mode->hsync_start = mode->hdisplay + tv_mode->hfront_porch;
335 	mode->hsync_end = mode->hsync_start + tv_mode->hsync_len;
336 	mode->htotal = mode->hsync_end  + tv_mode->hback_porch;
337 
338 	mode->vdisplay = tv_mode->vdisplay;
339 	mode->vsync_start = mode->vdisplay + tv_mode->vfront_porch;
340 	mode->vsync_end = mode->vsync_start + tv_mode->vsync_len;
341 	mode->vtotal = mode->vsync_end  + tv_mode->vback_porch;
342 }
343 
344 static void sun4i_tv_disable(struct drm_encoder *encoder)
345 {
346 	struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
347 	struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc);
348 	struct sun4i_tcon *tcon = crtc->tcon;
349 
350 	DRM_DEBUG_DRIVER("Disabling the TV Output\n");
351 
352 	sun4i_tcon_channel_disable(tcon, 1);
353 
354 	regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
355 			   SUN4I_TVE_EN_ENABLE,
356 			   0);
357 
358 	sunxi_engine_disable_color_correction(crtc->engine);
359 }
360 
361 static void sun4i_tv_enable(struct drm_encoder *encoder)
362 {
363 	struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
364 	struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc);
365 	struct sun4i_tcon *tcon = crtc->tcon;
366 
367 	DRM_DEBUG_DRIVER("Enabling the TV Output\n");
368 
369 	sunxi_engine_apply_color_correction(crtc->engine);
370 
371 	regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
372 			   SUN4I_TVE_EN_ENABLE,
373 			   SUN4I_TVE_EN_ENABLE);
374 
375 	sun4i_tcon_channel_enable(tcon, 1);
376 }
377 
378 static void sun4i_tv_mode_set(struct drm_encoder *encoder,
379 			      struct drm_display_mode *mode,
380 			      struct drm_display_mode *adjusted_mode)
381 {
382 	struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
383 	struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc);
384 	struct sun4i_tcon *tcon = crtc->tcon;
385 	const struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode);
386 
387 	sun4i_tcon1_mode_set(tcon, mode);
388 	sun4i_tcon_set_mux(tcon, 1, encoder);
389 
390 	/* Enable and map the DAC to the output */
391 	regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
392 			   SUN4I_TVE_EN_DAC_MAP_MASK,
393 			   SUN4I_TVE_EN_DAC_MAP(0, 1) |
394 			   SUN4I_TVE_EN_DAC_MAP(1, 2) |
395 			   SUN4I_TVE_EN_DAC_MAP(2, 3) |
396 			   SUN4I_TVE_EN_DAC_MAP(3, 4));
397 
398 	/* Set PAL settings */
399 	regmap_write(tv->regs, SUN4I_TVE_CFG0_REG,
400 		     tv_mode->mode |
401 		     (tv_mode->yc_en ? SUN4I_TVE_CFG0_YC_EN : 0) |
402 		     SUN4I_TVE_CFG0_COMP_EN |
403 		     SUN4I_TVE_CFG0_DAC_CONTROL_54M |
404 		     SUN4I_TVE_CFG0_CORE_DATAPATH_54M |
405 		     SUN4I_TVE_CFG0_CORE_CONTROL_54M);
406 
407 	/* Configure the DAC for a composite output */
408 	regmap_write(tv->regs, SUN4I_TVE_DAC0_REG,
409 		     SUN4I_TVE_DAC0_DAC_EN(0) |
410 		     (tv_mode->dac3_en ? SUN4I_TVE_DAC0_DAC_EN(3) : 0) |
411 		     SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS |
412 		     SUN4I_TVE_DAC0_CHROMA_0_75 |
413 		     SUN4I_TVE_DAC0_LUMA_0_4 |
414 		     SUN4I_TVE_DAC0_CLOCK_INVERT |
415 		     (tv_mode->dac_bit25_en ? BIT(25) : 0) |
416 		     BIT(30));
417 
418 	/* Configure the sample delay between DAC0 and the other DAC */
419 	regmap_write(tv->regs, SUN4I_TVE_NOTCH_REG,
420 		     SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(1, 0) |
421 		     SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(2, 0));
422 
423 	regmap_write(tv->regs, SUN4I_TVE_CHROMA_FREQ_REG,
424 		     tv_mode->chroma_freq);
425 
426 	/* Set the front and back porch */
427 	regmap_write(tv->regs, SUN4I_TVE_PORCH_REG,
428 		     SUN4I_TVE_PORCH_BACK(tv_mode->back_porch) |
429 		     SUN4I_TVE_PORCH_FRONT(tv_mode->front_porch));
430 
431 	/* Set the lines setup */
432 	regmap_write(tv->regs, SUN4I_TVE_LINE_REG,
433 		     SUN4I_TVE_LINE_FIRST(22) |
434 		     SUN4I_TVE_LINE_NUMBER(tv_mode->line_number));
435 
436 	regmap_write(tv->regs, SUN4I_TVE_LEVEL_REG,
437 		     SUN4I_TVE_LEVEL_BLANK(tv_mode->video_levels->blank) |
438 		     SUN4I_TVE_LEVEL_BLACK(tv_mode->video_levels->black));
439 
440 	regmap_write(tv->regs, SUN4I_TVE_DAC1_REG,
441 		     SUN4I_TVE_DAC1_AMPLITUDE(0, 0x18) |
442 		     SUN4I_TVE_DAC1_AMPLITUDE(1, 0x18) |
443 		     SUN4I_TVE_DAC1_AMPLITUDE(2, 0x18) |
444 		     SUN4I_TVE_DAC1_AMPLITUDE(3, 0x18));
445 
446 	regmap_write(tv->regs, SUN4I_TVE_CB_CR_LVL_REG,
447 		     SUN4I_TVE_CB_CR_LVL_CB_BURST(tv_mode->burst_levels->cb) |
448 		     SUN4I_TVE_CB_CR_LVL_CR_BURST(tv_mode->burst_levels->cr));
449 
450 	/* Set burst width for a composite output */
451 	regmap_write(tv->regs, SUN4I_TVE_BURST_WIDTH_REG,
452 		     SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(126) |
453 		     SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(68) |
454 		     SUN4I_TVE_BURST_WIDTH_BREEZEWAY(22));
455 
456 	regmap_write(tv->regs, SUN4I_TVE_CB_CR_GAIN_REG,
457 		     SUN4I_TVE_CB_CR_GAIN_CB(tv_mode->color_gains->cb) |
458 		     SUN4I_TVE_CB_CR_GAIN_CR(tv_mode->color_gains->cr));
459 
460 	regmap_write(tv->regs, SUN4I_TVE_SYNC_VBI_REG,
461 		     SUN4I_TVE_SYNC_VBI_SYNC(0x10) |
462 		     SUN4I_TVE_SYNC_VBI_VBLANK(tv_mode->vblank_level));
463 
464 	regmap_write(tv->regs, SUN4I_TVE_ACTIVE_LINE_REG,
465 		     SUN4I_TVE_ACTIVE_LINE(1440));
466 
467 	/* Set composite chroma gain to 50 % */
468 	regmap_write(tv->regs, SUN4I_TVE_CHROMA_REG,
469 		     SUN4I_TVE_CHROMA_COMP_GAIN_50);
470 
471 	regmap_write(tv->regs, SUN4I_TVE_12C_REG,
472 		     SUN4I_TVE_12C_COMP_YUV_EN |
473 		     SUN4I_TVE_12C_NOTCH_WIDTH_WIDE);
474 
475 	regmap_write(tv->regs, SUN4I_TVE_RESYNC_REG,
476 		     SUN4I_TVE_RESYNC_PIXEL(tv_mode->resync_params->pixel) |
477 		     SUN4I_TVE_RESYNC_LINE(tv_mode->resync_params->line) |
478 		     (tv_mode->resync_params->field ?
479 		      SUN4I_TVE_RESYNC_FIELD : 0));
480 
481 	regmap_write(tv->regs, SUN4I_TVE_SLAVE_REG, 0);
482 }
483 
484 static struct drm_encoder_helper_funcs sun4i_tv_helper_funcs = {
485 	.disable	= sun4i_tv_disable,
486 	.enable		= sun4i_tv_enable,
487 	.mode_set	= sun4i_tv_mode_set,
488 };
489 
490 static void sun4i_tv_destroy(struct drm_encoder *encoder)
491 {
492 	drm_encoder_cleanup(encoder);
493 }
494 
495 static struct drm_encoder_funcs sun4i_tv_funcs = {
496 	.destroy	= sun4i_tv_destroy,
497 };
498 
499 static int sun4i_tv_comp_get_modes(struct drm_connector *connector)
500 {
501 	int i;
502 
503 	for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
504 		struct drm_display_mode *mode;
505 		const struct tv_mode *tv_mode = &tv_modes[i];
506 
507 		mode = drm_mode_create(connector->dev);
508 		if (!mode) {
509 			DRM_ERROR("Failed to create a new display mode\n");
510 			return 0;
511 		}
512 
513 		strcpy(mode->name, tv_mode->name);
514 
515 		sun4i_tv_mode_to_drm_mode(tv_mode, mode);
516 		drm_mode_probed_add(connector, mode);
517 	}
518 
519 	return i;
520 }
521 
522 static int sun4i_tv_comp_mode_valid(struct drm_connector *connector,
523 				    struct drm_display_mode *mode)
524 {
525 	/* TODO */
526 	return MODE_OK;
527 }
528 
529 static struct drm_connector_helper_funcs sun4i_tv_comp_connector_helper_funcs = {
530 	.get_modes	= sun4i_tv_comp_get_modes,
531 	.mode_valid	= sun4i_tv_comp_mode_valid,
532 };
533 
534 static void
535 sun4i_tv_comp_connector_destroy(struct drm_connector *connector)
536 {
537 	drm_connector_cleanup(connector);
538 }
539 
540 static const struct drm_connector_funcs sun4i_tv_comp_connector_funcs = {
541 	.fill_modes		= drm_helper_probe_single_connector_modes,
542 	.destroy		= sun4i_tv_comp_connector_destroy,
543 	.reset			= drm_atomic_helper_connector_reset,
544 	.atomic_duplicate_state	= drm_atomic_helper_connector_duplicate_state,
545 	.atomic_destroy_state	= drm_atomic_helper_connector_destroy_state,
546 };
547 
548 static struct regmap_config sun4i_tv_regmap_config = {
549 	.reg_bits	= 32,
550 	.val_bits	= 32,
551 	.reg_stride	= 4,
552 	.max_register	= SUN4I_TVE_WSS_DATA2_REG,
553 	.name		= "tv-encoder",
554 };
555 
556 static int sun4i_tv_bind(struct device *dev, struct device *master,
557 			 void *data)
558 {
559 	struct platform_device *pdev = to_platform_device(dev);
560 	struct drm_device *drm = data;
561 	struct sun4i_drv *drv = drm->dev_private;
562 	struct sun4i_tv *tv;
563 	struct resource *res;
564 	void __iomem *regs;
565 	int ret;
566 
567 	tv = devm_kzalloc(dev, sizeof(*tv), GFP_KERNEL);
568 	if (!tv)
569 		return -ENOMEM;
570 	tv->drv = drv;
571 	dev_set_drvdata(dev, tv);
572 
573 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
574 	regs = devm_ioremap_resource(dev, res);
575 	if (IS_ERR(regs)) {
576 		dev_err(dev, "Couldn't map the TV encoder registers\n");
577 		return PTR_ERR(regs);
578 	}
579 
580 	tv->regs = devm_regmap_init_mmio(dev, regs,
581 					 &sun4i_tv_regmap_config);
582 	if (IS_ERR(tv->regs)) {
583 		dev_err(dev, "Couldn't create the TV encoder regmap\n");
584 		return PTR_ERR(tv->regs);
585 	}
586 
587 	tv->reset = devm_reset_control_get(dev, NULL);
588 	if (IS_ERR(tv->reset)) {
589 		dev_err(dev, "Couldn't get our reset line\n");
590 		return PTR_ERR(tv->reset);
591 	}
592 
593 	ret = reset_control_deassert(tv->reset);
594 	if (ret) {
595 		dev_err(dev, "Couldn't deassert our reset line\n");
596 		return ret;
597 	}
598 
599 	tv->clk = devm_clk_get(dev, NULL);
600 	if (IS_ERR(tv->clk)) {
601 		dev_err(dev, "Couldn't get the TV encoder clock\n");
602 		ret = PTR_ERR(tv->clk);
603 		goto err_assert_reset;
604 	}
605 	clk_prepare_enable(tv->clk);
606 
607 	drm_encoder_helper_add(&tv->encoder,
608 			       &sun4i_tv_helper_funcs);
609 	ret = drm_encoder_init(drm,
610 			       &tv->encoder,
611 			       &sun4i_tv_funcs,
612 			       DRM_MODE_ENCODER_TVDAC,
613 			       NULL);
614 	if (ret) {
615 		dev_err(dev, "Couldn't initialise the TV encoder\n");
616 		goto err_disable_clk;
617 	}
618 
619 	tv->encoder.possible_crtcs = drm_of_find_possible_crtcs(drm,
620 								dev->of_node);
621 	if (!tv->encoder.possible_crtcs) {
622 		ret = -EPROBE_DEFER;
623 		goto err_disable_clk;
624 	}
625 
626 	drm_connector_helper_add(&tv->connector,
627 				 &sun4i_tv_comp_connector_helper_funcs);
628 	ret = drm_connector_init(drm, &tv->connector,
629 				 &sun4i_tv_comp_connector_funcs,
630 				 DRM_MODE_CONNECTOR_Composite);
631 	if (ret) {
632 		dev_err(dev,
633 			"Couldn't initialise the Composite connector\n");
634 		goto err_cleanup_connector;
635 	}
636 	tv->connector.interlace_allowed = true;
637 
638 	drm_mode_connector_attach_encoder(&tv->connector, &tv->encoder);
639 
640 	return 0;
641 
642 err_cleanup_connector:
643 	drm_encoder_cleanup(&tv->encoder);
644 err_disable_clk:
645 	clk_disable_unprepare(tv->clk);
646 err_assert_reset:
647 	reset_control_assert(tv->reset);
648 	return ret;
649 }
650 
651 static void sun4i_tv_unbind(struct device *dev, struct device *master,
652 			    void *data)
653 {
654 	struct sun4i_tv *tv = dev_get_drvdata(dev);
655 
656 	drm_connector_cleanup(&tv->connector);
657 	drm_encoder_cleanup(&tv->encoder);
658 	clk_disable_unprepare(tv->clk);
659 }
660 
661 static const struct component_ops sun4i_tv_ops = {
662 	.bind	= sun4i_tv_bind,
663 	.unbind	= sun4i_tv_unbind,
664 };
665 
666 static int sun4i_tv_probe(struct platform_device *pdev)
667 {
668 	return component_add(&pdev->dev, &sun4i_tv_ops);
669 }
670 
671 static int sun4i_tv_remove(struct platform_device *pdev)
672 {
673 	component_del(&pdev->dev, &sun4i_tv_ops);
674 
675 	return 0;
676 }
677 
678 static const struct of_device_id sun4i_tv_of_table[] = {
679 	{ .compatible = "allwinner,sun4i-a10-tv-encoder" },
680 	{ }
681 };
682 MODULE_DEVICE_TABLE(of, sun4i_tv_of_table);
683 
684 static struct platform_driver sun4i_tv_platform_driver = {
685 	.probe		= sun4i_tv_probe,
686 	.remove		= sun4i_tv_remove,
687 	.driver		= {
688 		.name		= "sun4i-tve",
689 		.of_match_table	= sun4i_tv_of_table,
690 	},
691 };
692 module_platform_driver(sun4i_tv_platform_driver);
693 
694 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
695 MODULE_DESCRIPTION("Allwinner A10 TV Encoder Driver");
696 MODULE_LICENSE("GPL");
697