1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2015 Free Electrons 4 * Copyright (C) 2015 NextThing Co 5 * 6 * Maxime Ripard <maxime.ripard@free-electrons.com> 7 */ 8 9 #include <linux/clk-provider.h> 10 #include <linux/ioport.h> 11 #include <linux/of_address.h> 12 #include <linux/of_graph.h> 13 #include <linux/of_irq.h> 14 #include <linux/regmap.h> 15 16 #include <video/videomode.h> 17 18 #include <drm/drm_atomic.h> 19 #include <drm/drm_atomic_helper.h> 20 #include <drm/drm_crtc.h> 21 #include <drm/drm_modes.h> 22 #include <drm/drm_print.h> 23 #include <drm/drm_probe_helper.h> 24 #include <drm/drm_vblank.h> 25 26 #include "sun4i_backend.h" 27 #include "sun4i_crtc.h" 28 #include "sun4i_drv.h" 29 #include "sunxi_engine.h" 30 #include "sun4i_tcon.h" 31 32 /* 33 * While this isn't really working in the DRM theory, in practice we 34 * can only ever have one encoder per TCON since we have a mux in our 35 * TCON. 36 */ 37 static struct drm_encoder *sun4i_crtc_get_encoder(struct drm_crtc *crtc) 38 { 39 struct drm_encoder *encoder; 40 41 drm_for_each_encoder(encoder, crtc->dev) 42 if (encoder->crtc == crtc) 43 return encoder; 44 45 return NULL; 46 } 47 48 static int sun4i_crtc_atomic_check(struct drm_crtc *crtc, 49 struct drm_atomic_state *state) 50 { 51 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 52 crtc); 53 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); 54 struct sunxi_engine *engine = scrtc->engine; 55 int ret = 0; 56 57 if (engine && engine->ops && engine->ops->atomic_check) 58 ret = engine->ops->atomic_check(engine, crtc_state); 59 60 return ret; 61 } 62 63 static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc, 64 struct drm_atomic_state *state) 65 { 66 struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, 67 crtc); 68 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); 69 struct drm_device *dev = crtc->dev; 70 struct sunxi_engine *engine = scrtc->engine; 71 unsigned long flags; 72 73 if (crtc->state->event) { 74 WARN_ON(drm_crtc_vblank_get(crtc) != 0); 75 76 spin_lock_irqsave(&dev->event_lock, flags); 77 scrtc->event = crtc->state->event; 78 spin_unlock_irqrestore(&dev->event_lock, flags); 79 crtc->state->event = NULL; 80 } 81 82 if (engine->ops->atomic_begin) 83 engine->ops->atomic_begin(engine, old_state); 84 } 85 86 static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc, 87 struct drm_atomic_state *state) 88 { 89 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); 90 struct drm_pending_vblank_event *event = crtc->state->event; 91 92 DRM_DEBUG_DRIVER("Committing plane changes\n"); 93 94 sunxi_engine_commit(scrtc->engine); 95 96 if (event) { 97 crtc->state->event = NULL; 98 99 spin_lock_irq(&crtc->dev->event_lock); 100 if (drm_crtc_vblank_get(crtc) == 0) 101 drm_crtc_arm_vblank_event(crtc, event); 102 else 103 drm_crtc_send_vblank_event(crtc, event); 104 spin_unlock_irq(&crtc->dev->event_lock); 105 } 106 } 107 108 static void sun4i_crtc_atomic_disable(struct drm_crtc *crtc, 109 struct drm_atomic_state *state) 110 { 111 struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc); 112 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); 113 114 DRM_DEBUG_DRIVER("Disabling the CRTC\n"); 115 116 drm_crtc_vblank_off(crtc); 117 118 sun4i_tcon_set_status(scrtc->tcon, encoder, false); 119 120 if (crtc->state->event && !crtc->state->active) { 121 spin_lock_irq(&crtc->dev->event_lock); 122 drm_crtc_send_vblank_event(crtc, crtc->state->event); 123 spin_unlock_irq(&crtc->dev->event_lock); 124 125 crtc->state->event = NULL; 126 } 127 } 128 129 static void sun4i_crtc_atomic_enable(struct drm_crtc *crtc, 130 struct drm_atomic_state *state) 131 { 132 struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc); 133 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); 134 135 DRM_DEBUG_DRIVER("Enabling the CRTC\n"); 136 137 sun4i_tcon_set_status(scrtc->tcon, encoder, true); 138 139 drm_crtc_vblank_on(crtc); 140 } 141 142 static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc) 143 { 144 struct drm_display_mode *mode = &crtc->state->adjusted_mode; 145 struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc); 146 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); 147 148 sun4i_tcon_mode_set(scrtc->tcon, encoder, mode); 149 } 150 151 static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = { 152 .atomic_check = sun4i_crtc_atomic_check, 153 .atomic_begin = sun4i_crtc_atomic_begin, 154 .atomic_flush = sun4i_crtc_atomic_flush, 155 .atomic_enable = sun4i_crtc_atomic_enable, 156 .atomic_disable = sun4i_crtc_atomic_disable, 157 .mode_set_nofb = sun4i_crtc_mode_set_nofb, 158 }; 159 160 static int sun4i_crtc_enable_vblank(struct drm_crtc *crtc) 161 { 162 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); 163 164 DRM_DEBUG_DRIVER("Enabling VBLANK on crtc %p\n", crtc); 165 166 sun4i_tcon_enable_vblank(scrtc->tcon, true); 167 168 return 0; 169 } 170 171 static void sun4i_crtc_disable_vblank(struct drm_crtc *crtc) 172 { 173 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); 174 175 DRM_DEBUG_DRIVER("Disabling VBLANK on crtc %p\n", crtc); 176 177 sun4i_tcon_enable_vblank(scrtc->tcon, false); 178 } 179 180 static const struct drm_crtc_funcs sun4i_crtc_funcs = { 181 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, 182 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, 183 .destroy = drm_crtc_cleanup, 184 .page_flip = drm_atomic_helper_page_flip, 185 .reset = drm_atomic_helper_crtc_reset, 186 .set_config = drm_atomic_helper_set_config, 187 .enable_vblank = sun4i_crtc_enable_vblank, 188 .disable_vblank = sun4i_crtc_disable_vblank, 189 }; 190 191 struct sun4i_crtc *sun4i_crtc_init(struct drm_device *drm, 192 struct sunxi_engine *engine, 193 struct sun4i_tcon *tcon) 194 { 195 struct sun4i_crtc *scrtc; 196 struct drm_plane **planes; 197 struct drm_plane *primary = NULL, *cursor = NULL; 198 int ret, i; 199 200 scrtc = devm_kzalloc(drm->dev, sizeof(*scrtc), GFP_KERNEL); 201 if (!scrtc) 202 return ERR_PTR(-ENOMEM); 203 scrtc->engine = engine; 204 scrtc->tcon = tcon; 205 206 /* Create our layers */ 207 planes = sunxi_engine_layers_init(drm, engine); 208 if (IS_ERR(planes)) { 209 dev_err(drm->dev, "Couldn't create the planes\n"); 210 return NULL; 211 } 212 213 /* find primary and cursor planes for drm_crtc_init_with_planes */ 214 for (i = 0; planes[i]; i++) { 215 struct drm_plane *plane = planes[i]; 216 217 switch (plane->type) { 218 case DRM_PLANE_TYPE_PRIMARY: 219 primary = plane; 220 break; 221 case DRM_PLANE_TYPE_CURSOR: 222 cursor = plane; 223 break; 224 default: 225 break; 226 } 227 } 228 229 ret = drm_crtc_init_with_planes(drm, &scrtc->crtc, 230 primary, 231 cursor, 232 &sun4i_crtc_funcs, 233 NULL); 234 if (ret) { 235 dev_err(drm->dev, "Couldn't init DRM CRTC\n"); 236 return ERR_PTR(ret); 237 } 238 239 drm_crtc_helper_add(&scrtc->crtc, &sun4i_crtc_helper_funcs); 240 241 /* Set crtc.port to output port node of the tcon */ 242 scrtc->crtc.port = of_graph_get_port_by_id(scrtc->tcon->dev->of_node, 243 1); 244 245 /* Set possible_crtcs to this crtc for overlay planes */ 246 for (i = 0; planes[i]; i++) { 247 uint32_t possible_crtcs = drm_crtc_mask(&scrtc->crtc); 248 struct drm_plane *plane = planes[i]; 249 250 if (plane->type == DRM_PLANE_TYPE_OVERLAY) 251 plane->possible_crtcs = possible_crtcs; 252 } 253 254 return scrtc; 255 } 256