xref: /openbmc/linux/drivers/gpu/drm/sun4i/sun4i_crtc.c (revision 407e7517)
1 /*
2  * Copyright (C) 2015 Free Electrons
3  * Copyright (C) 2015 NextThing Co
4  *
5  * Maxime Ripard <maxime.ripard@free-electrons.com>
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  */
12 
13 #include <drm/drmP.h>
14 #include <drm/drm_atomic_helper.h>
15 #include <drm/drm_crtc.h>
16 #include <drm/drm_crtc_helper.h>
17 #include <drm/drm_modes.h>
18 
19 #include <linux/clk-provider.h>
20 #include <linux/ioport.h>
21 #include <linux/of_address.h>
22 #include <linux/of_graph.h>
23 #include <linux/of_irq.h>
24 #include <linux/regmap.h>
25 
26 #include <video/videomode.h>
27 
28 #include "sun4i_backend.h"
29 #include "sun4i_crtc.h"
30 #include "sun4i_drv.h"
31 #include "sunxi_engine.h"
32 #include "sun4i_tcon.h"
33 
34 /*
35  * While this isn't really working in the DRM theory, in practice we
36  * can only ever have one encoder per TCON since we have a mux in our
37  * TCON.
38  */
39 static struct drm_encoder *sun4i_crtc_get_encoder(struct drm_crtc *crtc)
40 {
41 	struct drm_encoder *encoder;
42 
43 	drm_for_each_encoder(encoder, crtc->dev)
44 		if (encoder->crtc == crtc)
45 			return encoder;
46 
47 	return NULL;
48 }
49 
50 static int sun4i_crtc_atomic_check(struct drm_crtc *crtc,
51 				    struct drm_crtc_state *state)
52 {
53 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
54 	struct sunxi_engine *engine = scrtc->engine;
55 	int ret = 0;
56 
57 	if (engine && engine->ops && engine->ops->atomic_check)
58 		ret = engine->ops->atomic_check(engine, state);
59 
60 	return ret;
61 }
62 
63 static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc,
64 				    struct drm_crtc_state *old_state)
65 {
66 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
67 	struct drm_device *dev = crtc->dev;
68 	struct sunxi_engine *engine = scrtc->engine;
69 	unsigned long flags;
70 
71 	if (crtc->state->event) {
72 		WARN_ON(drm_crtc_vblank_get(crtc) != 0);
73 
74 		spin_lock_irqsave(&dev->event_lock, flags);
75 		scrtc->event = crtc->state->event;
76 		spin_unlock_irqrestore(&dev->event_lock, flags);
77 		crtc->state->event = NULL;
78 	}
79 
80 	if (engine->ops->atomic_begin)
81 		engine->ops->atomic_begin(engine, old_state);
82 }
83 
84 static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc,
85 				    struct drm_crtc_state *old_state)
86 {
87 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
88 	struct drm_pending_vblank_event *event = crtc->state->event;
89 
90 	DRM_DEBUG_DRIVER("Committing plane changes\n");
91 
92 	sunxi_engine_commit(scrtc->engine);
93 
94 	if (event) {
95 		crtc->state->event = NULL;
96 
97 		spin_lock_irq(&crtc->dev->event_lock);
98 		if (drm_crtc_vblank_get(crtc) == 0)
99 			drm_crtc_arm_vblank_event(crtc, event);
100 		else
101 			drm_crtc_send_vblank_event(crtc, event);
102 		spin_unlock_irq(&crtc->dev->event_lock);
103 	}
104 }
105 
106 static void sun4i_crtc_atomic_disable(struct drm_crtc *crtc,
107 				      struct drm_crtc_state *old_state)
108 {
109 	struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
110 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
111 
112 	DRM_DEBUG_DRIVER("Disabling the CRTC\n");
113 
114 	sun4i_tcon_set_status(scrtc->tcon, encoder, false);
115 
116 	if (crtc->state->event && !crtc->state->active) {
117 		spin_lock_irq(&crtc->dev->event_lock);
118 		drm_crtc_send_vblank_event(crtc, crtc->state->event);
119 		spin_unlock_irq(&crtc->dev->event_lock);
120 
121 		crtc->state->event = NULL;
122 	}
123 }
124 
125 static void sun4i_crtc_atomic_enable(struct drm_crtc *crtc,
126 				     struct drm_crtc_state *old_state)
127 {
128 	struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
129 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
130 
131 	DRM_DEBUG_DRIVER("Enabling the CRTC\n");
132 
133 	sun4i_tcon_set_status(scrtc->tcon, encoder, true);
134 }
135 
136 static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc)
137 {
138 	struct drm_display_mode *mode = &crtc->state->adjusted_mode;
139 	struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
140 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
141 
142 	sun4i_tcon_mode_set(scrtc->tcon, encoder, mode);
143 }
144 
145 static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = {
146 	.atomic_check	= sun4i_crtc_atomic_check,
147 	.atomic_begin	= sun4i_crtc_atomic_begin,
148 	.atomic_flush	= sun4i_crtc_atomic_flush,
149 	.atomic_enable	= sun4i_crtc_atomic_enable,
150 	.atomic_disable	= sun4i_crtc_atomic_disable,
151 	.mode_set_nofb	= sun4i_crtc_mode_set_nofb,
152 };
153 
154 static int sun4i_crtc_enable_vblank(struct drm_crtc *crtc)
155 {
156 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
157 
158 	DRM_DEBUG_DRIVER("Enabling VBLANK on crtc %p\n", crtc);
159 
160 	sun4i_tcon_enable_vblank(scrtc->tcon, true);
161 
162 	return 0;
163 }
164 
165 static void sun4i_crtc_disable_vblank(struct drm_crtc *crtc)
166 {
167 	struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
168 
169 	DRM_DEBUG_DRIVER("Disabling VBLANK on crtc %p\n", crtc);
170 
171 	sun4i_tcon_enable_vblank(scrtc->tcon, false);
172 }
173 
174 static const struct drm_crtc_funcs sun4i_crtc_funcs = {
175 	.atomic_destroy_state	= drm_atomic_helper_crtc_destroy_state,
176 	.atomic_duplicate_state	= drm_atomic_helper_crtc_duplicate_state,
177 	.destroy		= drm_crtc_cleanup,
178 	.page_flip		= drm_atomic_helper_page_flip,
179 	.reset			= drm_atomic_helper_crtc_reset,
180 	.set_config		= drm_atomic_helper_set_config,
181 	.enable_vblank		= sun4i_crtc_enable_vblank,
182 	.disable_vblank		= sun4i_crtc_disable_vblank,
183 };
184 
185 struct sun4i_crtc *sun4i_crtc_init(struct drm_device *drm,
186 				   struct sunxi_engine *engine,
187 				   struct sun4i_tcon *tcon)
188 {
189 	struct sun4i_crtc *scrtc;
190 	struct drm_plane **planes;
191 	struct drm_plane *primary = NULL, *cursor = NULL;
192 	int ret, i;
193 
194 	scrtc = devm_kzalloc(drm->dev, sizeof(*scrtc), GFP_KERNEL);
195 	if (!scrtc)
196 		return ERR_PTR(-ENOMEM);
197 	scrtc->engine = engine;
198 	scrtc->tcon = tcon;
199 
200 	/* Create our layers */
201 	planes = sunxi_engine_layers_init(drm, engine);
202 	if (IS_ERR(planes)) {
203 		dev_err(drm->dev, "Couldn't create the planes\n");
204 		return NULL;
205 	}
206 
207 	/* find primary and cursor planes for drm_crtc_init_with_planes */
208 	for (i = 0; planes[i]; i++) {
209 		struct drm_plane *plane = planes[i];
210 
211 		switch (plane->type) {
212 		case DRM_PLANE_TYPE_PRIMARY:
213 			primary = plane;
214 			break;
215 		case DRM_PLANE_TYPE_CURSOR:
216 			cursor = plane;
217 			break;
218 		default:
219 			break;
220 		}
221 	}
222 
223 	ret = drm_crtc_init_with_planes(drm, &scrtc->crtc,
224 					primary,
225 					cursor,
226 					&sun4i_crtc_funcs,
227 					NULL);
228 	if (ret) {
229 		dev_err(drm->dev, "Couldn't init DRM CRTC\n");
230 		return ERR_PTR(ret);
231 	}
232 
233 	drm_crtc_helper_add(&scrtc->crtc, &sun4i_crtc_helper_funcs);
234 
235 	/* Set crtc.port to output port node of the tcon */
236 	scrtc->crtc.port = of_graph_get_port_by_id(scrtc->tcon->dev->of_node,
237 						   1);
238 
239 	/* Set possible_crtcs to this crtc for overlay planes */
240 	for (i = 0; planes[i]; i++) {
241 		uint32_t possible_crtcs = BIT(drm_crtc_index(&scrtc->crtc));
242 		struct drm_plane *plane = planes[i];
243 
244 		if (plane->type == DRM_PLANE_TYPE_OVERLAY)
245 			plane->possible_crtcs = possible_crtcs;
246 	}
247 
248 	return scrtc;
249 }
250