1cdfbff78SBenjamin Gaignard /* 2cdfbff78SBenjamin Gaignard * Copyright (C) STMicroelectronics SA 2014 3cdfbff78SBenjamin Gaignard * Authors: Benjamin Gaignard <benjamin.gaignard@st.com> 4cdfbff78SBenjamin Gaignard * Vincent Abriou <vincent.abriou@st.com> 5cdfbff78SBenjamin Gaignard * for STMicroelectronics. 6cdfbff78SBenjamin Gaignard * License terms: GNU General Public License (GPL), version 2 7cdfbff78SBenjamin Gaignard */ 8cdfbff78SBenjamin Gaignard 9cdfbff78SBenjamin Gaignard #include <linux/clk.h> 10cdfbff78SBenjamin Gaignard #include <linux/component.h> 11cdfbff78SBenjamin Gaignard #include <linux/module.h> 12cdfbff78SBenjamin Gaignard #include <linux/of_platform.h> 13cdfbff78SBenjamin Gaignard #include <linux/platform_device.h> 14cdfbff78SBenjamin Gaignard #include <linux/reset.h> 150f3e1561SArnd Bergmann #include <linux/seq_file.h> 16cdfbff78SBenjamin Gaignard 17cdfbff78SBenjamin Gaignard #include <drm/drmP.h> 18cdfbff78SBenjamin Gaignard #include <drm/drm_crtc_helper.h> 19cdfbff78SBenjamin Gaignard 209e1f05b2SVincent Abriou #include "sti_crtc.h" 21bdfd36efSVille Syrjälä #include "sti_drv.h" 22503290ceSVincent Abriou #include "sti_vtg.h" 235e03abc5SBenjamin Gaignard 24cdfbff78SBenjamin Gaignard /* glue registers */ 25cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M0 0x000 26cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M1 0x004 27cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M2 0x008 28cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M3 0x00c 29cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M4 0x010 30cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M5 0x014 31cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M6 0x018 32cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M7 0x01c 33cdfbff78SBenjamin Gaignard #define TVO_MAIN_IN_VID_FORMAT 0x030 34cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M0 0x100 35cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M1 0x104 36cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M2 0x108 37cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M3 0x10c 38cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M4 0x110 39cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M5 0x114 40cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M6 0x118 41cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M7 0x11c 42cdfbff78SBenjamin Gaignard #define TVO_AUX_IN_VID_FORMAT 0x130 43cdfbff78SBenjamin Gaignard #define TVO_VIP_HDF 0x400 44cdfbff78SBenjamin Gaignard #define TVO_HD_SYNC_SEL 0x418 45cdfbff78SBenjamin Gaignard #define TVO_HD_DAC_CFG_OFF 0x420 46cdfbff78SBenjamin Gaignard #define TVO_VIP_HDMI 0x500 47cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_0 0x504 48cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_1 0x508 49cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_B_CB 0x50c 50cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_Y_G 0x510 51cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_R_CR 0x514 52cdfbff78SBenjamin Gaignard #define TVO_HDMI_SYNC_SEL 0x518 53cdfbff78SBenjamin Gaignard #define TVO_HDMI_DFV_OBS 0x540 54f32c4c50SBenjamin Gaignard #define TVO_VIP_DVO 0x600 55f32c4c50SBenjamin Gaignard #define TVO_DVO_SYNC_SEL 0x618 56f32c4c50SBenjamin Gaignard #define TVO_DVO_CONFIG 0x620 57cdfbff78SBenjamin Gaignard 58cdfbff78SBenjamin Gaignard #define TVO_IN_FMT_SIGNED BIT(0) 59cdfbff78SBenjamin Gaignard #define TVO_SYNC_EXT BIT(4) 60cdfbff78SBenjamin Gaignard 61cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_R_SHIFT 24 62cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_G_SHIFT 20 63cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_B_SHIFT 16 64cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_MASK 0x3 65cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_Y_G_SEL 0 66cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CB_B_SEL 1 67cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CR_R_SEL 2 68cdfbff78SBenjamin Gaignard 69cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_SHIFT 8 70cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_MASK 0x7 71cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_DISABLED 0 72cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_EAV_SAV 1 73cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y 2 74cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_CB_CR 3 75cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_PROG_RANGE 4 76cdfbff78SBenjamin Gaignard 77cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_SHIFT 4 78cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_MASK 0x3 79cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_8BIT_ROUNDED 0 80cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_10BIT_ROUNDED 1 81cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_12BIT_ROUNDED 2 82cdfbff78SBenjamin Gaignard 83cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MASK 0xf 84cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MAIN 0x0 85cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_AUX 0x8 86cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_FORCE_COLOR 0xf 87cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASS_MASK 0x1 88cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASSED 1 89cdfbff78SBenjamin Gaignard 90cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_REF 0x00 91cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_REF 0x10 92cdfbff78SBenjamin Gaignard 93cdfbff78SBenjamin Gaignard #define TVO_SYNC_HD_DCS_SHIFT 8 94cdfbff78SBenjamin Gaignard 95f32c4c50SBenjamin Gaignard #define TVO_SYNC_DVO_PAD_HSYNC_SHIFT 8 96f32c4c50SBenjamin Gaignard #define TVO_SYNC_DVO_PAD_VSYNC_SHIFT 16 97f32c4c50SBenjamin Gaignard 985e03abc5SBenjamin Gaignard #define ENCODER_CRTC_MASK (BIT(0) | BIT(1)) 99cdfbff78SBenjamin Gaignard 10005a142c2SBich Hemon #define TVO_MIN_HD_HEIGHT 720 10105a142c2SBich Hemon 102cdfbff78SBenjamin Gaignard /* enum listing the supported output data format */ 103cdfbff78SBenjamin Gaignard enum sti_tvout_video_out_type { 104cdfbff78SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_RGB, 105cdfbff78SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_YUV, 106cdfbff78SBenjamin Gaignard }; 107cdfbff78SBenjamin Gaignard 108cdfbff78SBenjamin Gaignard struct sti_tvout { 109cdfbff78SBenjamin Gaignard struct device *dev; 110cdfbff78SBenjamin Gaignard struct drm_device *drm_dev; 111cdfbff78SBenjamin Gaignard void __iomem *regs; 112cdfbff78SBenjamin Gaignard struct reset_control *reset; 113cdfbff78SBenjamin Gaignard struct drm_encoder *hdmi; 114cdfbff78SBenjamin Gaignard struct drm_encoder *hda; 115f32c4c50SBenjamin Gaignard struct drm_encoder *dvo; 11683af0a48SBenjamin Gaignard bool debugfs_registered; 117cdfbff78SBenjamin Gaignard }; 118cdfbff78SBenjamin Gaignard 119cdfbff78SBenjamin Gaignard struct sti_tvout_encoder { 120cdfbff78SBenjamin Gaignard struct drm_encoder encoder; 121cdfbff78SBenjamin Gaignard struct sti_tvout *tvout; 122cdfbff78SBenjamin Gaignard }; 123cdfbff78SBenjamin Gaignard 124cdfbff78SBenjamin Gaignard #define to_sti_tvout_encoder(x) \ 125cdfbff78SBenjamin Gaignard container_of(x, struct sti_tvout_encoder, encoder) 126cdfbff78SBenjamin Gaignard 127cdfbff78SBenjamin Gaignard #define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout 128cdfbff78SBenjamin Gaignard 129cdfbff78SBenjamin Gaignard /* preformatter conversion matrix */ 130cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_601[8] = { 131cdfbff78SBenjamin Gaignard 0xF927082E, 0x04C9FEAB, 0x01D30964, 0xFA95FD3D, 132cdfbff78SBenjamin Gaignard 0x0000082E, 0x00002000, 0x00002000, 0x00000000 133cdfbff78SBenjamin Gaignard }; 134cdfbff78SBenjamin Gaignard 135cdfbff78SBenjamin Gaignard /* 709 RGB to YCbCr */ 136cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_709[8] = { 137cdfbff78SBenjamin Gaignard 0xF891082F, 0x0367FF40, 0x01280B71, 0xF9B1FE20, 138cdfbff78SBenjamin Gaignard 0x0000082F, 0x00002000, 0x00002000, 0x00000000 139cdfbff78SBenjamin Gaignard }; 140cdfbff78SBenjamin Gaignard 141cdfbff78SBenjamin Gaignard static u32 tvout_read(struct sti_tvout *tvout, int offset) 142cdfbff78SBenjamin Gaignard { 143cdfbff78SBenjamin Gaignard return readl(tvout->regs + offset); 144cdfbff78SBenjamin Gaignard } 145cdfbff78SBenjamin Gaignard 146cdfbff78SBenjamin Gaignard static void tvout_write(struct sti_tvout *tvout, u32 val, int offset) 147cdfbff78SBenjamin Gaignard { 148cdfbff78SBenjamin Gaignard writel(val, tvout->regs + offset); 149cdfbff78SBenjamin Gaignard } 150cdfbff78SBenjamin Gaignard 151cdfbff78SBenjamin Gaignard /** 152cdfbff78SBenjamin Gaignard * Set the clipping mode of a VIP 153cdfbff78SBenjamin Gaignard * 154cdfbff78SBenjamin Gaignard * @tvout: tvout structure 155ca279601SBenjamin Gaignard * @reg: register to set 156cdfbff78SBenjamin Gaignard * @cr_r: 157cdfbff78SBenjamin Gaignard * @y_g: 158cdfbff78SBenjamin Gaignard * @cb_b: 159cdfbff78SBenjamin Gaignard */ 160ca279601SBenjamin Gaignard static void tvout_vip_set_color_order(struct sti_tvout *tvout, int reg, 161cdfbff78SBenjamin Gaignard u32 cr_r, u32 y_g, u32 cb_b) 162cdfbff78SBenjamin Gaignard { 163ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 164cdfbff78SBenjamin Gaignard 165cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT); 166cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT); 167cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT); 168cdfbff78SBenjamin Gaignard val |= cr_r << TVO_VIP_REORDER_R_SHIFT; 169cdfbff78SBenjamin Gaignard val |= y_g << TVO_VIP_REORDER_G_SHIFT; 170cdfbff78SBenjamin Gaignard val |= cb_b << TVO_VIP_REORDER_B_SHIFT; 171cdfbff78SBenjamin Gaignard 172ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 173cdfbff78SBenjamin Gaignard } 174cdfbff78SBenjamin Gaignard 175cdfbff78SBenjamin Gaignard /** 176cdfbff78SBenjamin Gaignard * Set the clipping mode of a VIP 177cdfbff78SBenjamin Gaignard * 178cdfbff78SBenjamin Gaignard * @tvout: tvout structure 179ca279601SBenjamin Gaignard * @reg: register to set 180cdfbff78SBenjamin Gaignard * @range: clipping range 181cdfbff78SBenjamin Gaignard */ 182ca279601SBenjamin Gaignard static void tvout_vip_set_clip_mode(struct sti_tvout *tvout, int reg, u32 range) 183cdfbff78SBenjamin Gaignard { 184ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 185cdfbff78SBenjamin Gaignard 186cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT); 187cdfbff78SBenjamin Gaignard val |= range << TVO_VIP_CLIP_SHIFT; 188ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 189cdfbff78SBenjamin Gaignard } 190cdfbff78SBenjamin Gaignard 191cdfbff78SBenjamin Gaignard /** 192cdfbff78SBenjamin Gaignard * Set the rounded value of a VIP 193cdfbff78SBenjamin Gaignard * 194cdfbff78SBenjamin Gaignard * @tvout: tvout structure 195ca279601SBenjamin Gaignard * @reg: register to set 196cdfbff78SBenjamin Gaignard * @rnd: rounded val per component 197cdfbff78SBenjamin Gaignard */ 198ca279601SBenjamin Gaignard static void tvout_vip_set_rnd(struct sti_tvout *tvout, int reg, u32 rnd) 199cdfbff78SBenjamin Gaignard { 200ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 201cdfbff78SBenjamin Gaignard 202cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT); 203cdfbff78SBenjamin Gaignard val |= rnd << TVO_VIP_RND_SHIFT; 204ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 205cdfbff78SBenjamin Gaignard } 206cdfbff78SBenjamin Gaignard 207cdfbff78SBenjamin Gaignard /** 208cdfbff78SBenjamin Gaignard * Select the VIP input 209cdfbff78SBenjamin Gaignard * 210cdfbff78SBenjamin Gaignard * @tvout: tvout structure 211ca279601SBenjamin Gaignard * @reg: register to set 212ca279601SBenjamin Gaignard * @main_path: main or auxiliary path 213ca279601SBenjamin Gaignard * @sel_input_logic_inverted: need to invert the logic 214cdfbff78SBenjamin Gaignard * @sel_input: selected_input (main/aux + conv) 215cdfbff78SBenjamin Gaignard */ 216cdfbff78SBenjamin Gaignard static void tvout_vip_set_sel_input(struct sti_tvout *tvout, 217ca279601SBenjamin Gaignard int reg, 218cdfbff78SBenjamin Gaignard bool main_path, 219cdfbff78SBenjamin Gaignard bool sel_input_logic_inverted, 220cdfbff78SBenjamin Gaignard enum sti_tvout_video_out_type video_out) 221cdfbff78SBenjamin Gaignard { 222cdfbff78SBenjamin Gaignard u32 sel_input; 223ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 224cdfbff78SBenjamin Gaignard 225cdfbff78SBenjamin Gaignard if (main_path) 226cdfbff78SBenjamin Gaignard sel_input = TVO_VIP_SEL_INPUT_MAIN; 227cdfbff78SBenjamin Gaignard else 228cdfbff78SBenjamin Gaignard sel_input = TVO_VIP_SEL_INPUT_AUX; 229cdfbff78SBenjamin Gaignard 230cdfbff78SBenjamin Gaignard switch (video_out) { 231cdfbff78SBenjamin Gaignard case STI_TVOUT_VIDEO_OUT_RGB: 232cdfbff78SBenjamin Gaignard sel_input |= TVO_VIP_SEL_INPUT_BYPASSED; 233cdfbff78SBenjamin Gaignard break; 234cdfbff78SBenjamin Gaignard case STI_TVOUT_VIDEO_OUT_YUV: 235cdfbff78SBenjamin Gaignard sel_input &= ~TVO_VIP_SEL_INPUT_BYPASSED; 236cdfbff78SBenjamin Gaignard break; 237cdfbff78SBenjamin Gaignard } 238cdfbff78SBenjamin Gaignard 239cdfbff78SBenjamin Gaignard /* on stih407 chip the sel_input bypass mode logic is inverted */ 240cdfbff78SBenjamin Gaignard if (sel_input_logic_inverted) 241cdfbff78SBenjamin Gaignard sel_input = sel_input ^ TVO_VIP_SEL_INPUT_BYPASS_MASK; 242cdfbff78SBenjamin Gaignard 243cdfbff78SBenjamin Gaignard val &= ~TVO_VIP_SEL_INPUT_MASK; 244cdfbff78SBenjamin Gaignard val |= sel_input; 245ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 246cdfbff78SBenjamin Gaignard } 247cdfbff78SBenjamin Gaignard 248cdfbff78SBenjamin Gaignard /** 249cdfbff78SBenjamin Gaignard * Select the input video signed or unsigned 250cdfbff78SBenjamin Gaignard * 251cdfbff78SBenjamin Gaignard * @tvout: tvout structure 252ca279601SBenjamin Gaignard * @reg: register to set 253cdfbff78SBenjamin Gaignard * @in_vid_signed: used video input format 254cdfbff78SBenjamin Gaignard */ 255ca279601SBenjamin Gaignard static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout, 256ca279601SBenjamin Gaignard int reg, u32 in_vid_fmt) 257cdfbff78SBenjamin Gaignard { 258ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 259cdfbff78SBenjamin Gaignard 260cdfbff78SBenjamin Gaignard val &= ~TVO_IN_FMT_SIGNED; 261cdfbff78SBenjamin Gaignard val |= in_vid_fmt; 262ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 263cdfbff78SBenjamin Gaignard } 264cdfbff78SBenjamin Gaignard 265cdfbff78SBenjamin Gaignard /** 26605a142c2SBich Hemon * Set preformatter matrix 26705a142c2SBich Hemon * 26805a142c2SBich Hemon * @tvout: tvout structure 26905a142c2SBich Hemon * @mode: display mode structure 27005a142c2SBich Hemon */ 27105a142c2SBich Hemon static void tvout_preformatter_set_matrix(struct sti_tvout *tvout, 27205a142c2SBich Hemon struct drm_display_mode *mode) 27305a142c2SBich Hemon { 27405a142c2SBich Hemon unsigned int i; 27505a142c2SBich Hemon const u32 *pf_matrix; 27605a142c2SBich Hemon 27705a142c2SBich Hemon if (mode->vdisplay >= TVO_MIN_HD_HEIGHT) 27805a142c2SBich Hemon pf_matrix = rgb_to_ycbcr_709; 27905a142c2SBich Hemon else 28005a142c2SBich Hemon pf_matrix = rgb_to_ycbcr_601; 28105a142c2SBich Hemon 28205a142c2SBich Hemon for (i = 0; i < 8; i++) { 28305a142c2SBich Hemon tvout_write(tvout, *(pf_matrix + i), 28405a142c2SBich Hemon TVO_CSC_MAIN_M0 + (i * 4)); 28505a142c2SBich Hemon tvout_write(tvout, *(pf_matrix + i), 28605a142c2SBich Hemon TVO_CSC_AUX_M0 + (i * 4)); 28705a142c2SBich Hemon } 28805a142c2SBich Hemon } 28905a142c2SBich Hemon 29005a142c2SBich Hemon /** 291f32c4c50SBenjamin Gaignard * Start VIP block for DVO output 292f32c4c50SBenjamin Gaignard * 293f32c4c50SBenjamin Gaignard * @tvout: pointer on tvout structure 294f32c4c50SBenjamin Gaignard * @main_path: true if main path has to be used in the vip configuration 295f32c4c50SBenjamin Gaignard * else aux path is used. 296f32c4c50SBenjamin Gaignard */ 297f32c4c50SBenjamin Gaignard static void tvout_dvo_start(struct sti_tvout *tvout, bool main_path) 298f32c4c50SBenjamin Gaignard { 299f32c4c50SBenjamin Gaignard struct device_node *node = tvout->dev->of_node; 300f32c4c50SBenjamin Gaignard bool sel_input_logic_inverted = false; 301f32c4c50SBenjamin Gaignard u32 tvo_in_vid_format; 302503290ceSVincent Abriou int val, tmp; 303f32c4c50SBenjamin Gaignard 304f32c4c50SBenjamin Gaignard dev_dbg(tvout->dev, "%s\n", __func__); 305f32c4c50SBenjamin Gaignard 306f32c4c50SBenjamin Gaignard if (main_path) { 307f32c4c50SBenjamin Gaignard DRM_DEBUG_DRIVER("main vip for DVO\n"); 308503290ceSVincent Abriou /* Select the input sync for dvo */ 309503290ceSVincent Abriou tmp = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_DVO; 310503290ceSVincent Abriou val = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT; 311503290ceSVincent Abriou val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT; 312503290ceSVincent Abriou val |= tmp; 313f32c4c50SBenjamin Gaignard tvout_write(tvout, val, TVO_DVO_SYNC_SEL); 314f32c4c50SBenjamin Gaignard tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT; 315f32c4c50SBenjamin Gaignard } else { 316f32c4c50SBenjamin Gaignard DRM_DEBUG_DRIVER("aux vip for DVO\n"); 317503290ceSVincent Abriou /* Select the input sync for dvo */ 318503290ceSVincent Abriou tmp = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_DVO; 319503290ceSVincent Abriou val = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT; 320503290ceSVincent Abriou val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT; 321503290ceSVincent Abriou val |= tmp; 322f32c4c50SBenjamin Gaignard tvout_write(tvout, val, TVO_DVO_SYNC_SEL); 323f32c4c50SBenjamin Gaignard tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT; 324f32c4c50SBenjamin Gaignard } 325f32c4c50SBenjamin Gaignard 326f32c4c50SBenjamin Gaignard /* Set color channel order */ 327f32c4c50SBenjamin Gaignard tvout_vip_set_color_order(tvout, TVO_VIP_DVO, 328f32c4c50SBenjamin Gaignard TVO_VIP_REORDER_CR_R_SEL, 329f32c4c50SBenjamin Gaignard TVO_VIP_REORDER_Y_G_SEL, 330f32c4c50SBenjamin Gaignard TVO_VIP_REORDER_CB_B_SEL); 331f32c4c50SBenjamin Gaignard 3321834b84dSVincent Abriou /* Set clipping mode */ 3331834b84dSVincent Abriou tvout_vip_set_clip_mode(tvout, TVO_VIP_DVO, TVO_VIP_CLIP_DISABLED); 334f32c4c50SBenjamin Gaignard 335f32c4c50SBenjamin Gaignard /* Set round mode (rounded to 8-bit per component) */ 336f32c4c50SBenjamin Gaignard tvout_vip_set_rnd(tvout, TVO_VIP_DVO, TVO_VIP_RND_8BIT_ROUNDED); 337f32c4c50SBenjamin Gaignard 338f32c4c50SBenjamin Gaignard if (of_device_is_compatible(node, "st,stih407-tvout")) { 339f32c4c50SBenjamin Gaignard /* Set input video format */ 340f32c4c50SBenjamin Gaignard tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, 341f32c4c50SBenjamin Gaignard TVO_IN_FMT_SIGNED); 342f32c4c50SBenjamin Gaignard sel_input_logic_inverted = true; 343f32c4c50SBenjamin Gaignard } 344f32c4c50SBenjamin Gaignard 345f32c4c50SBenjamin Gaignard /* Input selection */ 346f32c4c50SBenjamin Gaignard tvout_vip_set_sel_input(tvout, TVO_VIP_DVO, main_path, 347f32c4c50SBenjamin Gaignard sel_input_logic_inverted, 348f32c4c50SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_RGB); 349f32c4c50SBenjamin Gaignard } 350f32c4c50SBenjamin Gaignard 351f32c4c50SBenjamin Gaignard /** 352cdfbff78SBenjamin Gaignard * Start VIP block for HDMI output 353cdfbff78SBenjamin Gaignard * 354cdfbff78SBenjamin Gaignard * @tvout: pointer on tvout structure 355cdfbff78SBenjamin Gaignard * @main_path: true if main path has to be used in the vip configuration 356cdfbff78SBenjamin Gaignard * else aux path is used. 357cdfbff78SBenjamin Gaignard */ 358cdfbff78SBenjamin Gaignard static void tvout_hdmi_start(struct sti_tvout *tvout, bool main_path) 359cdfbff78SBenjamin Gaignard { 360cdfbff78SBenjamin Gaignard struct device_node *node = tvout->dev->of_node; 361cdfbff78SBenjamin Gaignard bool sel_input_logic_inverted = false; 362ca279601SBenjamin Gaignard u32 tvo_in_vid_format; 363cdfbff78SBenjamin Gaignard 364cdfbff78SBenjamin Gaignard dev_dbg(tvout->dev, "%s\n", __func__); 365cdfbff78SBenjamin Gaignard 366cdfbff78SBenjamin Gaignard if (main_path) { 367cdfbff78SBenjamin Gaignard DRM_DEBUG_DRIVER("main vip for hdmi\n"); 368503290ceSVincent Abriou /* select the input sync for hdmi */ 369503290ceSVincent Abriou tvout_write(tvout, 370503290ceSVincent Abriou TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDMI, 371503290ceSVincent Abriou TVO_HDMI_SYNC_SEL); 372ca279601SBenjamin Gaignard tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT; 373cdfbff78SBenjamin Gaignard } else { 374cdfbff78SBenjamin Gaignard DRM_DEBUG_DRIVER("aux vip for hdmi\n"); 375503290ceSVincent Abriou /* select the input sync for hdmi */ 376503290ceSVincent Abriou tvout_write(tvout, 377503290ceSVincent Abriou TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDMI, 378503290ceSVincent Abriou TVO_HDMI_SYNC_SEL); 379ca279601SBenjamin Gaignard tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT; 380cdfbff78SBenjamin Gaignard } 381cdfbff78SBenjamin Gaignard 382cdfbff78SBenjamin Gaignard /* set color channel order */ 383ca279601SBenjamin Gaignard tvout_vip_set_color_order(tvout, TVO_VIP_HDMI, 384cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CR_R_SEL, 385cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_Y_G_SEL, 386cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CB_B_SEL); 387cdfbff78SBenjamin Gaignard 3881834b84dSVincent Abriou /* set clipping mode */ 3891834b84dSVincent Abriou tvout_vip_set_clip_mode(tvout, TVO_VIP_HDMI, TVO_VIP_CLIP_DISABLED); 390cdfbff78SBenjamin Gaignard 391cdfbff78SBenjamin Gaignard /* set round mode (rounded to 8-bit per component) */ 392ca279601SBenjamin Gaignard tvout_vip_set_rnd(tvout, TVO_VIP_HDMI, TVO_VIP_RND_8BIT_ROUNDED); 393cdfbff78SBenjamin Gaignard 394cdfbff78SBenjamin Gaignard if (of_device_is_compatible(node, "st,stih407-tvout")) { 395cdfbff78SBenjamin Gaignard /* set input video format */ 396ca279601SBenjamin Gaignard tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, 397cdfbff78SBenjamin Gaignard TVO_IN_FMT_SIGNED); 398cdfbff78SBenjamin Gaignard sel_input_logic_inverted = true; 399cdfbff78SBenjamin Gaignard } 400cdfbff78SBenjamin Gaignard 401cdfbff78SBenjamin Gaignard /* input selection */ 402ca279601SBenjamin Gaignard tvout_vip_set_sel_input(tvout, TVO_VIP_HDMI, main_path, 403cdfbff78SBenjamin Gaignard sel_input_logic_inverted, STI_TVOUT_VIDEO_OUT_RGB); 404cdfbff78SBenjamin Gaignard } 405cdfbff78SBenjamin Gaignard 406cdfbff78SBenjamin Gaignard /** 407cdfbff78SBenjamin Gaignard * Start HDF VIP and HD DAC 408cdfbff78SBenjamin Gaignard * 409cdfbff78SBenjamin Gaignard * @tvout: pointer on tvout structure 410cdfbff78SBenjamin Gaignard * @main_path: true if main path has to be used in the vip configuration 411cdfbff78SBenjamin Gaignard * else aux path is used. 412cdfbff78SBenjamin Gaignard */ 413cdfbff78SBenjamin Gaignard static void tvout_hda_start(struct sti_tvout *tvout, bool main_path) 414cdfbff78SBenjamin Gaignard { 415cdfbff78SBenjamin Gaignard struct device_node *node = tvout->dev->of_node; 416cdfbff78SBenjamin Gaignard bool sel_input_logic_inverted = false; 417ca279601SBenjamin Gaignard u32 tvo_in_vid_format; 418ca279601SBenjamin Gaignard int val; 419cdfbff78SBenjamin Gaignard 420cdfbff78SBenjamin Gaignard dev_dbg(tvout->dev, "%s\n", __func__); 421cdfbff78SBenjamin Gaignard 422ca279601SBenjamin Gaignard if (main_path) { 423503290ceSVincent Abriou DRM_DEBUG_DRIVER("main vip for HDF\n"); 424503290ceSVincent Abriou /* Select the input sync for HD analog and HD DCS */ 425503290ceSVincent Abriou val = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDDCS; 426503290ceSVincent Abriou val = val << TVO_SYNC_HD_DCS_SHIFT; 427503290ceSVincent Abriou val |= TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDF; 428ca279601SBenjamin Gaignard tvout_write(tvout, val, TVO_HD_SYNC_SEL); 429ca279601SBenjamin Gaignard tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT; 430ca279601SBenjamin Gaignard } else { 431503290ceSVincent Abriou DRM_DEBUG_DRIVER("aux vip for HDF\n"); 432503290ceSVincent Abriou /* Select the input sync for HD analog and HD DCS */ 433503290ceSVincent Abriou val = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDDCS; 434503290ceSVincent Abriou val = val << TVO_SYNC_HD_DCS_SHIFT; 435503290ceSVincent Abriou val |= TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDF; 436ca279601SBenjamin Gaignard tvout_write(tvout, val, TVO_HD_SYNC_SEL); 437ca279601SBenjamin Gaignard tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT; 438cdfbff78SBenjamin Gaignard } 439cdfbff78SBenjamin Gaignard 440cdfbff78SBenjamin Gaignard /* set color channel order */ 441ca279601SBenjamin Gaignard tvout_vip_set_color_order(tvout, TVO_VIP_HDF, 442cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CR_R_SEL, 443cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_Y_G_SEL, 444cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CB_B_SEL); 445cdfbff78SBenjamin Gaignard 4461834b84dSVincent Abriou /* set clipping mode */ 4471834b84dSVincent Abriou tvout_vip_set_clip_mode(tvout, TVO_VIP_HDF, TVO_VIP_CLIP_DISABLED); 448cdfbff78SBenjamin Gaignard 449cdfbff78SBenjamin Gaignard /* set round mode (rounded to 10-bit per component) */ 450ca279601SBenjamin Gaignard tvout_vip_set_rnd(tvout, TVO_VIP_HDF, TVO_VIP_RND_10BIT_ROUNDED); 451cdfbff78SBenjamin Gaignard 452cdfbff78SBenjamin Gaignard if (of_device_is_compatible(node, "st,stih407-tvout")) { 453cdfbff78SBenjamin Gaignard /* set input video format */ 454ca279601SBenjamin Gaignard tvout_vip_set_in_vid_fmt(tvout, 455ca279601SBenjamin Gaignard tvo_in_vid_format, TVO_IN_FMT_SIGNED); 456cdfbff78SBenjamin Gaignard sel_input_logic_inverted = true; 457cdfbff78SBenjamin Gaignard } 458cdfbff78SBenjamin Gaignard 459cdfbff78SBenjamin Gaignard /* Input selection */ 460ca279601SBenjamin Gaignard tvout_vip_set_sel_input(tvout, TVO_VIP_HDF, main_path, 461cdfbff78SBenjamin Gaignard sel_input_logic_inverted, 462cdfbff78SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_YUV); 463cdfbff78SBenjamin Gaignard 464cdfbff78SBenjamin Gaignard /* power up HD DAC */ 465cdfbff78SBenjamin Gaignard tvout_write(tvout, 0, TVO_HD_DAC_CFG_OFF); 466cdfbff78SBenjamin Gaignard } 467cdfbff78SBenjamin Gaignard 468b514bee7SVincent Abriou #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \ 469b514bee7SVincent Abriou readl(tvout->regs + reg)) 470b514bee7SVincent Abriou 471b514bee7SVincent Abriou static void tvout_dbg_vip(struct seq_file *s, int val) 472b514bee7SVincent Abriou { 473b514bee7SVincent Abriou int r, g, b, tmp, mask; 474b514bee7SVincent Abriou char *const reorder[] = {"Y_G", "Cb_B", "Cr_R"}; 475b514bee7SVincent Abriou char *const clipping[] = {"No", "EAV/SAV", "Limited range RGB/Y", 476b514bee7SVincent Abriou "Limited range Cb/Cr", "decided by register"}; 477b514bee7SVincent Abriou char *const round[] = {"8-bit", "10-bit", "12-bit"}; 478b514bee7SVincent Abriou char *const input_sel[] = {"Main (color matrix enabled)", 479b514bee7SVincent Abriou "Main (color matrix by-passed)", 480b514bee7SVincent Abriou "", "", "", "", "", "", 481b514bee7SVincent Abriou "Aux (color matrix enabled)", 482b514bee7SVincent Abriou "Aux (color matrix by-passed)", 483b514bee7SVincent Abriou "", "", "", "", "", "Force value"}; 484b514bee7SVincent Abriou 485b514bee7SVincent Abriou seq_puts(s, "\t"); 486b514bee7SVincent Abriou mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT; 487b514bee7SVincent Abriou r = (val & mask) >> TVO_VIP_REORDER_R_SHIFT; 488b514bee7SVincent Abriou mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT; 489b514bee7SVincent Abriou g = (val & mask) >> TVO_VIP_REORDER_G_SHIFT; 490b514bee7SVincent Abriou mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT; 491b514bee7SVincent Abriou b = (val & mask) >> TVO_VIP_REORDER_B_SHIFT; 492b514bee7SVincent Abriou seq_printf(s, "%-24s %s->%s %s->%s %s->%s\n", "Reorder:", 493b514bee7SVincent Abriou reorder[r], reorder[TVO_VIP_REORDER_CR_R_SEL], 494b514bee7SVincent Abriou reorder[g], reorder[TVO_VIP_REORDER_Y_G_SEL], 495b514bee7SVincent Abriou reorder[b], reorder[TVO_VIP_REORDER_CB_B_SEL]); 496b514bee7SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 497b514bee7SVincent Abriou mask = TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT; 498b514bee7SVincent Abriou tmp = (val & mask) >> TVO_VIP_CLIP_SHIFT; 499b514bee7SVincent Abriou seq_printf(s, "%-24s %s\n", "Clipping:", clipping[tmp]); 500b514bee7SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 501b514bee7SVincent Abriou mask = TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT; 502b514bee7SVincent Abriou tmp = (val & mask) >> TVO_VIP_RND_SHIFT; 503b514bee7SVincent Abriou seq_printf(s, "%-24s input data rounded to %s per component\n", 504b514bee7SVincent Abriou "Round:", round[tmp]); 505b514bee7SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 506b514bee7SVincent Abriou tmp = (val & TVO_VIP_SEL_INPUT_MASK); 507b514bee7SVincent Abriou seq_printf(s, "%-24s %s", "Input selection:", input_sel[tmp]); 508b514bee7SVincent Abriou } 509b514bee7SVincent Abriou 510b514bee7SVincent Abriou static void tvout_dbg_hd_dac_cfg(struct seq_file *s, int val) 511b514bee7SVincent Abriou { 512b514bee7SVincent Abriou seq_printf(s, "\t%-24s %s", "HD DAC:", 513b514bee7SVincent Abriou val & 1 ? "disabled" : "enabled"); 514b514bee7SVincent Abriou } 515b514bee7SVincent Abriou 516b514bee7SVincent Abriou static int tvout_dbg_show(struct seq_file *s, void *data) 517b514bee7SVincent Abriou { 518b514bee7SVincent Abriou struct drm_info_node *node = s->private; 519b514bee7SVincent Abriou struct sti_tvout *tvout = (struct sti_tvout *)node->info_ent->data; 520b514bee7SVincent Abriou struct drm_crtc *crtc; 521b514bee7SVincent Abriou 522b514bee7SVincent Abriou seq_printf(s, "TVOUT: (vaddr = 0x%p)", tvout->regs); 523b514bee7SVincent Abriou 524b514bee7SVincent Abriou seq_puts(s, "\n\n HDMI encoder: "); 525b514bee7SVincent Abriou crtc = tvout->hdmi->crtc; 526b514bee7SVincent Abriou if (crtc) { 527b514bee7SVincent Abriou seq_printf(s, "connected to %s path", 528b514bee7SVincent Abriou sti_crtc_is_main(crtc) ? "main" : "aux"); 529b514bee7SVincent Abriou DBGFS_DUMP(TVO_HDMI_SYNC_SEL); 530b514bee7SVincent Abriou DBGFS_DUMP(TVO_VIP_HDMI); 531b514bee7SVincent Abriou tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDMI)); 532b514bee7SVincent Abriou } else { 533b514bee7SVincent Abriou seq_puts(s, "disabled"); 534b514bee7SVincent Abriou } 535b514bee7SVincent Abriou 536b514bee7SVincent Abriou seq_puts(s, "\n\n DVO encoder: "); 537b514bee7SVincent Abriou crtc = tvout->dvo->crtc; 538b514bee7SVincent Abriou if (crtc) { 539b514bee7SVincent Abriou seq_printf(s, "connected to %s path", 540b514bee7SVincent Abriou sti_crtc_is_main(crtc) ? "main" : "aux"); 541b514bee7SVincent Abriou DBGFS_DUMP(TVO_DVO_SYNC_SEL); 542b514bee7SVincent Abriou DBGFS_DUMP(TVO_DVO_CONFIG); 543b514bee7SVincent Abriou DBGFS_DUMP(TVO_VIP_DVO); 544b514bee7SVincent Abriou tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_DVO)); 545b514bee7SVincent Abriou } else { 546b514bee7SVincent Abriou seq_puts(s, "disabled"); 547b514bee7SVincent Abriou } 548b514bee7SVincent Abriou 549b514bee7SVincent Abriou seq_puts(s, "\n\n HDA encoder: "); 550b514bee7SVincent Abriou crtc = tvout->hda->crtc; 551b514bee7SVincent Abriou if (crtc) { 552b514bee7SVincent Abriou seq_printf(s, "connected to %s path", 553b514bee7SVincent Abriou sti_crtc_is_main(crtc) ? "main" : "aux"); 554b514bee7SVincent Abriou DBGFS_DUMP(TVO_HD_SYNC_SEL); 555b514bee7SVincent Abriou DBGFS_DUMP(TVO_HD_DAC_CFG_OFF); 556b514bee7SVincent Abriou tvout_dbg_hd_dac_cfg(s, 557b514bee7SVincent Abriou readl(tvout->regs + TVO_HD_DAC_CFG_OFF)); 558b514bee7SVincent Abriou DBGFS_DUMP(TVO_VIP_HDF); 559b514bee7SVincent Abriou tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDF)); 560b514bee7SVincent Abriou } else { 561b514bee7SVincent Abriou seq_puts(s, "disabled"); 562b514bee7SVincent Abriou } 563b514bee7SVincent Abriou 564b514bee7SVincent Abriou seq_puts(s, "\n\n main path configuration"); 565b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_MAIN_M0); 566b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_MAIN_M1); 567b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_MAIN_M2); 568b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_MAIN_M3); 569b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_MAIN_M4); 570b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_MAIN_M5); 571b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_MAIN_M6); 572b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_MAIN_M7); 573b514bee7SVincent Abriou DBGFS_DUMP(TVO_MAIN_IN_VID_FORMAT); 574b514bee7SVincent Abriou 575b514bee7SVincent Abriou seq_puts(s, "\n\n auxiliary path configuration"); 576b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_AUX_M0); 577b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_AUX_M2); 578b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_AUX_M3); 579b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_AUX_M4); 580b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_AUX_M5); 581b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_AUX_M6); 582b514bee7SVincent Abriou DBGFS_DUMP(TVO_CSC_AUX_M7); 583b514bee7SVincent Abriou DBGFS_DUMP(TVO_AUX_IN_VID_FORMAT); 584b514bee7SVincent Abriou seq_puts(s, "\n"); 585b514bee7SVincent Abriou 586b514bee7SVincent Abriou return 0; 587b514bee7SVincent Abriou } 588b514bee7SVincent Abriou 589b514bee7SVincent Abriou static struct drm_info_list tvout_debugfs_files[] = { 590b514bee7SVincent Abriou { "tvout", tvout_dbg_show, 0, NULL }, 591b514bee7SVincent Abriou }; 592b514bee7SVincent Abriou 593b514bee7SVincent Abriou static void tvout_debugfs_exit(struct sti_tvout *tvout, struct drm_minor *minor) 594b514bee7SVincent Abriou { 595b514bee7SVincent Abriou drm_debugfs_remove_files(tvout_debugfs_files, 596b514bee7SVincent Abriou ARRAY_SIZE(tvout_debugfs_files), 597b514bee7SVincent Abriou minor); 598b514bee7SVincent Abriou } 599b514bee7SVincent Abriou 600b514bee7SVincent Abriou static int tvout_debugfs_init(struct sti_tvout *tvout, struct drm_minor *minor) 601b514bee7SVincent Abriou { 602b514bee7SVincent Abriou unsigned int i; 603b514bee7SVincent Abriou 604b514bee7SVincent Abriou for (i = 0; i < ARRAY_SIZE(tvout_debugfs_files); i++) 605b514bee7SVincent Abriou tvout_debugfs_files[i].data = tvout; 606b514bee7SVincent Abriou 607b514bee7SVincent Abriou return drm_debugfs_create_files(tvout_debugfs_files, 608b514bee7SVincent Abriou ARRAY_SIZE(tvout_debugfs_files), 609b514bee7SVincent Abriou minor->debugfs_root, minor); 610b514bee7SVincent Abriou } 611b514bee7SVincent Abriou 612cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_dpms(struct drm_encoder *encoder, int mode) 613cdfbff78SBenjamin Gaignard { 614cdfbff78SBenjamin Gaignard } 615cdfbff78SBenjamin Gaignard 616cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_mode_set(struct drm_encoder *encoder, 617cdfbff78SBenjamin Gaignard struct drm_display_mode *mode, 618cdfbff78SBenjamin Gaignard struct drm_display_mode *adjusted_mode) 619cdfbff78SBenjamin Gaignard { 620cdfbff78SBenjamin Gaignard } 621cdfbff78SBenjamin Gaignard 622cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_destroy(struct drm_encoder *encoder) 623cdfbff78SBenjamin Gaignard { 624cdfbff78SBenjamin Gaignard struct sti_tvout_encoder *sti_encoder = to_sti_tvout_encoder(encoder); 625cdfbff78SBenjamin Gaignard 626cdfbff78SBenjamin Gaignard drm_encoder_cleanup(encoder); 627cdfbff78SBenjamin Gaignard kfree(sti_encoder); 628cdfbff78SBenjamin Gaignard } 629cdfbff78SBenjamin Gaignard 63083af0a48SBenjamin Gaignard static int sti_tvout_late_register(struct drm_encoder *encoder) 63183af0a48SBenjamin Gaignard { 63283af0a48SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 63383af0a48SBenjamin Gaignard int ret; 63483af0a48SBenjamin Gaignard 63583af0a48SBenjamin Gaignard if (tvout->debugfs_registered) 63683af0a48SBenjamin Gaignard return 0; 63783af0a48SBenjamin Gaignard 63883af0a48SBenjamin Gaignard ret = tvout_debugfs_init(tvout, encoder->dev->primary); 63983af0a48SBenjamin Gaignard if (ret) 64083af0a48SBenjamin Gaignard return ret; 64183af0a48SBenjamin Gaignard 64283af0a48SBenjamin Gaignard tvout->debugfs_registered = true; 64383af0a48SBenjamin Gaignard return 0; 64483af0a48SBenjamin Gaignard } 64583af0a48SBenjamin Gaignard 64683af0a48SBenjamin Gaignard static void sti_tvout_early_unregister(struct drm_encoder *encoder) 64783af0a48SBenjamin Gaignard { 64883af0a48SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 64983af0a48SBenjamin Gaignard 65083af0a48SBenjamin Gaignard if (!tvout->debugfs_registered) 65183af0a48SBenjamin Gaignard return; 65283af0a48SBenjamin Gaignard 65383af0a48SBenjamin Gaignard tvout_debugfs_exit(tvout, encoder->dev->primary); 65483af0a48SBenjamin Gaignard tvout->debugfs_registered = false; 65583af0a48SBenjamin Gaignard } 65683af0a48SBenjamin Gaignard 657cdfbff78SBenjamin Gaignard static const struct drm_encoder_funcs sti_tvout_encoder_funcs = { 658cdfbff78SBenjamin Gaignard .destroy = sti_tvout_encoder_destroy, 65983af0a48SBenjamin Gaignard .late_register = sti_tvout_late_register, 66083af0a48SBenjamin Gaignard .early_unregister = sti_tvout_early_unregister, 661cdfbff78SBenjamin Gaignard }; 662cdfbff78SBenjamin Gaignard 66305a142c2SBich Hemon static void sti_dvo_encoder_enable(struct drm_encoder *encoder) 664f32c4c50SBenjamin Gaignard { 665f32c4c50SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 666f32c4c50SBenjamin Gaignard 66705a142c2SBich Hemon tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode); 66805a142c2SBich Hemon 6699e1f05b2SVincent Abriou tvout_dvo_start(tvout, sti_crtc_is_main(encoder->crtc)); 670f32c4c50SBenjamin Gaignard } 671f32c4c50SBenjamin Gaignard 672f32c4c50SBenjamin Gaignard static void sti_dvo_encoder_disable(struct drm_encoder *encoder) 673f32c4c50SBenjamin Gaignard { 674f32c4c50SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 675f32c4c50SBenjamin Gaignard 676f32c4c50SBenjamin Gaignard /* Reset VIP register */ 677f32c4c50SBenjamin Gaignard tvout_write(tvout, 0x0, TVO_VIP_DVO); 678f32c4c50SBenjamin Gaignard } 679f32c4c50SBenjamin Gaignard 680f32c4c50SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_dvo_encoder_helper_funcs = { 681f32c4c50SBenjamin Gaignard .dpms = sti_tvout_encoder_dpms, 682f32c4c50SBenjamin Gaignard .mode_set = sti_tvout_encoder_mode_set, 68305a142c2SBich Hemon .enable = sti_dvo_encoder_enable, 684f32c4c50SBenjamin Gaignard .disable = sti_dvo_encoder_disable, 685f32c4c50SBenjamin Gaignard }; 686f32c4c50SBenjamin Gaignard 687f32c4c50SBenjamin Gaignard static struct drm_encoder * 688f32c4c50SBenjamin Gaignard sti_tvout_create_dvo_encoder(struct drm_device *dev, 689f32c4c50SBenjamin Gaignard struct sti_tvout *tvout) 690f32c4c50SBenjamin Gaignard { 691f32c4c50SBenjamin Gaignard struct sti_tvout_encoder *encoder; 692f32c4c50SBenjamin Gaignard struct drm_encoder *drm_encoder; 693f32c4c50SBenjamin Gaignard 694f32c4c50SBenjamin Gaignard encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL); 695f32c4c50SBenjamin Gaignard if (!encoder) 696f32c4c50SBenjamin Gaignard return NULL; 697f32c4c50SBenjamin Gaignard 698f32c4c50SBenjamin Gaignard encoder->tvout = tvout; 699f32c4c50SBenjamin Gaignard 700f32c4c50SBenjamin Gaignard drm_encoder = (struct drm_encoder *)encoder; 701f32c4c50SBenjamin Gaignard 702f32c4c50SBenjamin Gaignard drm_encoder->possible_crtcs = ENCODER_CRTC_MASK; 703f32c4c50SBenjamin Gaignard drm_encoder->possible_clones = 1 << 0; 704f32c4c50SBenjamin Gaignard 705f32c4c50SBenjamin Gaignard drm_encoder_init(dev, drm_encoder, 70613a3d91fSVille Syrjälä &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_LVDS, 70713a3d91fSVille Syrjälä NULL); 708f32c4c50SBenjamin Gaignard 709f32c4c50SBenjamin Gaignard drm_encoder_helper_add(drm_encoder, &sti_dvo_encoder_helper_funcs); 710f32c4c50SBenjamin Gaignard 711f32c4c50SBenjamin Gaignard return drm_encoder; 712f32c4c50SBenjamin Gaignard } 713f32c4c50SBenjamin Gaignard 71405a142c2SBich Hemon static void sti_hda_encoder_enable(struct drm_encoder *encoder) 715cdfbff78SBenjamin Gaignard { 716cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 717cdfbff78SBenjamin Gaignard 71805a142c2SBich Hemon tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode); 71905a142c2SBich Hemon 7209e1f05b2SVincent Abriou tvout_hda_start(tvout, sti_crtc_is_main(encoder->crtc)); 721cdfbff78SBenjamin Gaignard } 722cdfbff78SBenjamin Gaignard 723cdfbff78SBenjamin Gaignard static void sti_hda_encoder_disable(struct drm_encoder *encoder) 724cdfbff78SBenjamin Gaignard { 725cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 726cdfbff78SBenjamin Gaignard 727cdfbff78SBenjamin Gaignard /* reset VIP register */ 728cdfbff78SBenjamin Gaignard tvout_write(tvout, 0x0, TVO_VIP_HDF); 729cdfbff78SBenjamin Gaignard 730cdfbff78SBenjamin Gaignard /* power down HD DAC */ 731cdfbff78SBenjamin Gaignard tvout_write(tvout, 1, TVO_HD_DAC_CFG_OFF); 732cdfbff78SBenjamin Gaignard } 733cdfbff78SBenjamin Gaignard 734cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hda_encoder_helper_funcs = { 735cdfbff78SBenjamin Gaignard .dpms = sti_tvout_encoder_dpms, 736cdfbff78SBenjamin Gaignard .mode_set = sti_tvout_encoder_mode_set, 73705a142c2SBich Hemon .commit = sti_hda_encoder_enable, 738cdfbff78SBenjamin Gaignard .disable = sti_hda_encoder_disable, 739cdfbff78SBenjamin Gaignard }; 740cdfbff78SBenjamin Gaignard 741cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev, 742cdfbff78SBenjamin Gaignard struct sti_tvout *tvout) 743cdfbff78SBenjamin Gaignard { 744cdfbff78SBenjamin Gaignard struct sti_tvout_encoder *encoder; 745cdfbff78SBenjamin Gaignard struct drm_encoder *drm_encoder; 746cdfbff78SBenjamin Gaignard 747cdfbff78SBenjamin Gaignard encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL); 748cdfbff78SBenjamin Gaignard if (!encoder) 749cdfbff78SBenjamin Gaignard return NULL; 750cdfbff78SBenjamin Gaignard 751cdfbff78SBenjamin Gaignard encoder->tvout = tvout; 752cdfbff78SBenjamin Gaignard 753cdfbff78SBenjamin Gaignard drm_encoder = (struct drm_encoder *) encoder; 754cdfbff78SBenjamin Gaignard 7555e03abc5SBenjamin Gaignard drm_encoder->possible_crtcs = ENCODER_CRTC_MASK; 756cdfbff78SBenjamin Gaignard drm_encoder->possible_clones = 1 << 0; 757cdfbff78SBenjamin Gaignard 758cdfbff78SBenjamin Gaignard drm_encoder_init(dev, drm_encoder, 75913a3d91fSVille Syrjälä &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL); 760cdfbff78SBenjamin Gaignard 761cdfbff78SBenjamin Gaignard drm_encoder_helper_add(drm_encoder, &sti_hda_encoder_helper_funcs); 762cdfbff78SBenjamin Gaignard 763cdfbff78SBenjamin Gaignard return drm_encoder; 764cdfbff78SBenjamin Gaignard } 765cdfbff78SBenjamin Gaignard 76605a142c2SBich Hemon static void sti_hdmi_encoder_enable(struct drm_encoder *encoder) 767cdfbff78SBenjamin Gaignard { 768cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 769cdfbff78SBenjamin Gaignard 77005a142c2SBich Hemon tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode); 77105a142c2SBich Hemon 7729e1f05b2SVincent Abriou tvout_hdmi_start(tvout, sti_crtc_is_main(encoder->crtc)); 773cdfbff78SBenjamin Gaignard } 774cdfbff78SBenjamin Gaignard 775cdfbff78SBenjamin Gaignard static void sti_hdmi_encoder_disable(struct drm_encoder *encoder) 776cdfbff78SBenjamin Gaignard { 777cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 778cdfbff78SBenjamin Gaignard 779cdfbff78SBenjamin Gaignard /* reset VIP register */ 780cdfbff78SBenjamin Gaignard tvout_write(tvout, 0x0, TVO_VIP_HDMI); 781cdfbff78SBenjamin Gaignard } 782cdfbff78SBenjamin Gaignard 783cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hdmi_encoder_helper_funcs = { 784cdfbff78SBenjamin Gaignard .dpms = sti_tvout_encoder_dpms, 785cdfbff78SBenjamin Gaignard .mode_set = sti_tvout_encoder_mode_set, 78605a142c2SBich Hemon .commit = sti_hdmi_encoder_enable, 787cdfbff78SBenjamin Gaignard .disable = sti_hdmi_encoder_disable, 788cdfbff78SBenjamin Gaignard }; 789cdfbff78SBenjamin Gaignard 790cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hdmi_encoder(struct drm_device *dev, 791cdfbff78SBenjamin Gaignard struct sti_tvout *tvout) 792cdfbff78SBenjamin Gaignard { 793cdfbff78SBenjamin Gaignard struct sti_tvout_encoder *encoder; 794cdfbff78SBenjamin Gaignard struct drm_encoder *drm_encoder; 795cdfbff78SBenjamin Gaignard 796cdfbff78SBenjamin Gaignard encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL); 797cdfbff78SBenjamin Gaignard if (!encoder) 798cdfbff78SBenjamin Gaignard return NULL; 799cdfbff78SBenjamin Gaignard 800cdfbff78SBenjamin Gaignard encoder->tvout = tvout; 801cdfbff78SBenjamin Gaignard 802cdfbff78SBenjamin Gaignard drm_encoder = (struct drm_encoder *) encoder; 803cdfbff78SBenjamin Gaignard 8045e03abc5SBenjamin Gaignard drm_encoder->possible_crtcs = ENCODER_CRTC_MASK; 805cdfbff78SBenjamin Gaignard drm_encoder->possible_clones = 1 << 1; 806cdfbff78SBenjamin Gaignard 807cdfbff78SBenjamin Gaignard drm_encoder_init(dev, drm_encoder, 80813a3d91fSVille Syrjälä &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS, NULL); 809cdfbff78SBenjamin Gaignard 810cdfbff78SBenjamin Gaignard drm_encoder_helper_add(drm_encoder, &sti_hdmi_encoder_helper_funcs); 811cdfbff78SBenjamin Gaignard 812cdfbff78SBenjamin Gaignard return drm_encoder; 813cdfbff78SBenjamin Gaignard } 814cdfbff78SBenjamin Gaignard 815cdfbff78SBenjamin Gaignard static void sti_tvout_create_encoders(struct drm_device *dev, 816cdfbff78SBenjamin Gaignard struct sti_tvout *tvout) 817cdfbff78SBenjamin Gaignard { 818cdfbff78SBenjamin Gaignard tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout); 819cdfbff78SBenjamin Gaignard tvout->hda = sti_tvout_create_hda_encoder(dev, tvout); 820f32c4c50SBenjamin Gaignard tvout->dvo = sti_tvout_create_dvo_encoder(dev, tvout); 821cdfbff78SBenjamin Gaignard } 822cdfbff78SBenjamin Gaignard 823cdfbff78SBenjamin Gaignard static void sti_tvout_destroy_encoders(struct sti_tvout *tvout) 824cdfbff78SBenjamin Gaignard { 825cdfbff78SBenjamin Gaignard if (tvout->hdmi) 826cdfbff78SBenjamin Gaignard drm_encoder_cleanup(tvout->hdmi); 827cdfbff78SBenjamin Gaignard tvout->hdmi = NULL; 828cdfbff78SBenjamin Gaignard 829cdfbff78SBenjamin Gaignard if (tvout->hda) 830cdfbff78SBenjamin Gaignard drm_encoder_cleanup(tvout->hda); 831cdfbff78SBenjamin Gaignard tvout->hda = NULL; 8320a1dc29dSVincent Abriou 8330a1dc29dSVincent Abriou if (tvout->dvo) 8340a1dc29dSVincent Abriou drm_encoder_cleanup(tvout->dvo); 8350a1dc29dSVincent Abriou tvout->dvo = NULL; 836cdfbff78SBenjamin Gaignard } 837cdfbff78SBenjamin Gaignard 838cdfbff78SBenjamin Gaignard static int sti_tvout_bind(struct device *dev, struct device *master, void *data) 839cdfbff78SBenjamin Gaignard { 840cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = dev_get_drvdata(dev); 841cdfbff78SBenjamin Gaignard struct drm_device *drm_dev = data; 842cdfbff78SBenjamin Gaignard 843cdfbff78SBenjamin Gaignard tvout->drm_dev = drm_dev; 844cdfbff78SBenjamin Gaignard 845cdfbff78SBenjamin Gaignard sti_tvout_create_encoders(drm_dev, tvout); 846cdfbff78SBenjamin Gaignard 84753bdcf5fSBenjamin Gaignard return 0; 848cdfbff78SBenjamin Gaignard } 849cdfbff78SBenjamin Gaignard 850cdfbff78SBenjamin Gaignard static void sti_tvout_unbind(struct device *dev, struct device *master, 851cdfbff78SBenjamin Gaignard void *data) 852cdfbff78SBenjamin Gaignard { 85353bdcf5fSBenjamin Gaignard struct sti_tvout *tvout = dev_get_drvdata(dev); 85453bdcf5fSBenjamin Gaignard 85553bdcf5fSBenjamin Gaignard sti_tvout_destroy_encoders(tvout); 856cdfbff78SBenjamin Gaignard } 857cdfbff78SBenjamin Gaignard 858cdfbff78SBenjamin Gaignard static const struct component_ops sti_tvout_ops = { 859cdfbff78SBenjamin Gaignard .bind = sti_tvout_bind, 860cdfbff78SBenjamin Gaignard .unbind = sti_tvout_unbind, 861cdfbff78SBenjamin Gaignard }; 862cdfbff78SBenjamin Gaignard 863cdfbff78SBenjamin Gaignard static int sti_tvout_probe(struct platform_device *pdev) 864cdfbff78SBenjamin Gaignard { 865cdfbff78SBenjamin Gaignard struct device *dev = &pdev->dev; 866cdfbff78SBenjamin Gaignard struct device_node *node = dev->of_node; 867cdfbff78SBenjamin Gaignard struct sti_tvout *tvout; 868cdfbff78SBenjamin Gaignard struct resource *res; 869cdfbff78SBenjamin Gaignard 870cdfbff78SBenjamin Gaignard DRM_INFO("%s\n", __func__); 871cdfbff78SBenjamin Gaignard 872cdfbff78SBenjamin Gaignard if (!node) 873cdfbff78SBenjamin Gaignard return -ENODEV; 874cdfbff78SBenjamin Gaignard 875cdfbff78SBenjamin Gaignard tvout = devm_kzalloc(dev, sizeof(*tvout), GFP_KERNEL); 876cdfbff78SBenjamin Gaignard if (!tvout) 877cdfbff78SBenjamin Gaignard return -ENOMEM; 878cdfbff78SBenjamin Gaignard 879cdfbff78SBenjamin Gaignard tvout->dev = dev; 880cdfbff78SBenjamin Gaignard 881cdfbff78SBenjamin Gaignard /* get Memory ressources */ 882cdfbff78SBenjamin Gaignard res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tvout-reg"); 883cdfbff78SBenjamin Gaignard if (!res) { 884cdfbff78SBenjamin Gaignard DRM_ERROR("Invalid glue resource\n"); 885cdfbff78SBenjamin Gaignard return -ENOMEM; 886cdfbff78SBenjamin Gaignard } 887cdfbff78SBenjamin Gaignard tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); 88831f32a21SWei Yongjun if (!tvout->regs) 88931f32a21SWei Yongjun return -ENOMEM; 890cdfbff78SBenjamin Gaignard 891cdfbff78SBenjamin Gaignard /* get reset resources */ 892cdfbff78SBenjamin Gaignard tvout->reset = devm_reset_control_get(dev, "tvout"); 893cdfbff78SBenjamin Gaignard /* take tvout out of reset */ 894cdfbff78SBenjamin Gaignard if (!IS_ERR(tvout->reset)) 895cdfbff78SBenjamin Gaignard reset_control_deassert(tvout->reset); 896cdfbff78SBenjamin Gaignard 897cdfbff78SBenjamin Gaignard platform_set_drvdata(pdev, tvout); 898cdfbff78SBenjamin Gaignard 899cdfbff78SBenjamin Gaignard return component_add(dev, &sti_tvout_ops); 900cdfbff78SBenjamin Gaignard } 901cdfbff78SBenjamin Gaignard 902cdfbff78SBenjamin Gaignard static int sti_tvout_remove(struct platform_device *pdev) 903cdfbff78SBenjamin Gaignard { 904cdfbff78SBenjamin Gaignard component_del(&pdev->dev, &sti_tvout_ops); 905cdfbff78SBenjamin Gaignard return 0; 906cdfbff78SBenjamin Gaignard } 907cdfbff78SBenjamin Gaignard 9088e932cf0SKiran Padwal static const struct of_device_id tvout_of_match[] = { 909cdfbff78SBenjamin Gaignard { .compatible = "st,stih416-tvout", }, 910cdfbff78SBenjamin Gaignard { .compatible = "st,stih407-tvout", }, 911cdfbff78SBenjamin Gaignard { /* end node */ } 912cdfbff78SBenjamin Gaignard }; 913cdfbff78SBenjamin Gaignard MODULE_DEVICE_TABLE(of, tvout_of_match); 914cdfbff78SBenjamin Gaignard 915cdfbff78SBenjamin Gaignard struct platform_driver sti_tvout_driver = { 916cdfbff78SBenjamin Gaignard .driver = { 917cdfbff78SBenjamin Gaignard .name = "sti-tvout", 918cdfbff78SBenjamin Gaignard .owner = THIS_MODULE, 919cdfbff78SBenjamin Gaignard .of_match_table = tvout_of_match, 920cdfbff78SBenjamin Gaignard }, 921cdfbff78SBenjamin Gaignard .probe = sti_tvout_probe, 922cdfbff78SBenjamin Gaignard .remove = sti_tvout_remove, 923cdfbff78SBenjamin Gaignard }; 924cdfbff78SBenjamin Gaignard 925cdfbff78SBenjamin Gaignard MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); 926cdfbff78SBenjamin Gaignard MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver"); 927cdfbff78SBenjamin Gaignard MODULE_LICENSE("GPL"); 928