xref: /openbmc/linux/drivers/gpu/drm/sti/sti_tvout.c (revision 5e03abc5)
1cdfbff78SBenjamin Gaignard /*
2cdfbff78SBenjamin Gaignard  * Copyright (C) STMicroelectronics SA 2014
3cdfbff78SBenjamin Gaignard  * Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
4cdfbff78SBenjamin Gaignard  *          Vincent Abriou <vincent.abriou@st.com>
5cdfbff78SBenjamin Gaignard  *          for STMicroelectronics.
6cdfbff78SBenjamin Gaignard  * License terms:  GNU General Public License (GPL), version 2
7cdfbff78SBenjamin Gaignard  */
8cdfbff78SBenjamin Gaignard 
9cdfbff78SBenjamin Gaignard #include <linux/clk.h>
10cdfbff78SBenjamin Gaignard #include <linux/component.h>
11cdfbff78SBenjamin Gaignard #include <linux/module.h>
12cdfbff78SBenjamin Gaignard #include <linux/of_platform.h>
13cdfbff78SBenjamin Gaignard #include <linux/platform_device.h>
14cdfbff78SBenjamin Gaignard #include <linux/reset.h>
15cdfbff78SBenjamin Gaignard 
16cdfbff78SBenjamin Gaignard #include <drm/drmP.h>
17cdfbff78SBenjamin Gaignard #include <drm/drm_crtc_helper.h>
18cdfbff78SBenjamin Gaignard 
195e03abc5SBenjamin Gaignard #include "sti_drm_crtc.h"
205e03abc5SBenjamin Gaignard 
21cdfbff78SBenjamin Gaignard /* glue registers */
22cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M0                  0x000
23cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M1                  0x004
24cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M2                  0x008
25cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M3                  0x00c
26cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M4                  0x010
27cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M5                  0x014
28cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M6                  0x018
29cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M7                  0x01c
30cdfbff78SBenjamin Gaignard #define TVO_MAIN_IN_VID_FORMAT           0x030
31cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M0                   0x100
32cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M1                   0x104
33cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M2                   0x108
34cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M3                   0x10c
35cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M4                   0x110
36cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M5                   0x114
37cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M6                   0x118
38cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M7                   0x11c
39cdfbff78SBenjamin Gaignard #define TVO_AUX_IN_VID_FORMAT            0x130
40cdfbff78SBenjamin Gaignard #define TVO_VIP_HDF                      0x400
41cdfbff78SBenjamin Gaignard #define TVO_HD_SYNC_SEL                  0x418
42cdfbff78SBenjamin Gaignard #define TVO_HD_DAC_CFG_OFF               0x420
43cdfbff78SBenjamin Gaignard #define TVO_VIP_HDMI                     0x500
44cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_0           0x504
45cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_1           0x508
46cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_B_CB         0x50c
47cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_Y_G          0x510
48cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_R_CR         0x514
49cdfbff78SBenjamin Gaignard #define TVO_HDMI_SYNC_SEL                0x518
50cdfbff78SBenjamin Gaignard #define TVO_HDMI_DFV_OBS                 0x540
51cdfbff78SBenjamin Gaignard 
52cdfbff78SBenjamin Gaignard #define TVO_IN_FMT_SIGNED                BIT(0)
53cdfbff78SBenjamin Gaignard #define TVO_SYNC_EXT                     BIT(4)
54cdfbff78SBenjamin Gaignard 
55cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_R_SHIFT          24
56cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_G_SHIFT          20
57cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_B_SHIFT          16
58cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_MASK             0x3
59cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_Y_G_SEL          0
60cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CB_B_SEL         1
61cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CR_R_SEL         2
62cdfbff78SBenjamin Gaignard 
63cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_SHIFT               8
64cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_MASK                0x7
65cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_DISABLED            0
66cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_EAV_SAV             1
67cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y 2
68cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_CB_CR 3
69cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_PROG_RANGE          4
70cdfbff78SBenjamin Gaignard 
71cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_SHIFT                4
72cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_MASK                 0x3
73cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_8BIT_ROUNDED         0
74cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_10BIT_ROUNDED        1
75cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_12BIT_ROUNDED        2
76cdfbff78SBenjamin Gaignard 
77cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MASK           0xf
78cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MAIN           0x0
79cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_AUX            0x8
80cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_FORCE_COLOR    0xf
81cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASS_MASK    0x1
82cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASSED       1
83cdfbff78SBenjamin Gaignard 
84cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_REF        0x00
85cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_1          0x01
86cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_2          0x02
87cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_3          0x03
88cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_4          0x04
89cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_5          0x05
90cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_6          0x06
91cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_REF         0x10
92cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_1           0x11
93cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_2           0x12
94cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_3           0x13
95cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_4           0x14
96cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_5           0x15
97cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_6           0x16
98cdfbff78SBenjamin Gaignard 
99cdfbff78SBenjamin Gaignard #define TVO_SYNC_HD_DCS_SHIFT            8
100cdfbff78SBenjamin Gaignard 
1015e03abc5SBenjamin Gaignard #define ENCODER_CRTC_MASK                (BIT(0) | BIT(1))
102cdfbff78SBenjamin Gaignard 
103cdfbff78SBenjamin Gaignard /* enum listing the supported output data format */
104cdfbff78SBenjamin Gaignard enum sti_tvout_video_out_type {
105cdfbff78SBenjamin Gaignard 	STI_TVOUT_VIDEO_OUT_RGB,
106cdfbff78SBenjamin Gaignard 	STI_TVOUT_VIDEO_OUT_YUV,
107cdfbff78SBenjamin Gaignard };
108cdfbff78SBenjamin Gaignard 
109cdfbff78SBenjamin Gaignard struct sti_tvout {
110cdfbff78SBenjamin Gaignard 	struct device *dev;
111cdfbff78SBenjamin Gaignard 	struct drm_device *drm_dev;
112cdfbff78SBenjamin Gaignard 	void __iomem *regs;
113cdfbff78SBenjamin Gaignard 	struct reset_control *reset;
114cdfbff78SBenjamin Gaignard 	struct drm_encoder *hdmi;
115cdfbff78SBenjamin Gaignard 	struct drm_encoder *hda;
116cdfbff78SBenjamin Gaignard };
117cdfbff78SBenjamin Gaignard 
118cdfbff78SBenjamin Gaignard struct sti_tvout_encoder {
119cdfbff78SBenjamin Gaignard 	struct drm_encoder encoder;
120cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout;
121cdfbff78SBenjamin Gaignard };
122cdfbff78SBenjamin Gaignard 
123cdfbff78SBenjamin Gaignard #define to_sti_tvout_encoder(x) \
124cdfbff78SBenjamin Gaignard 	container_of(x, struct sti_tvout_encoder, encoder)
125cdfbff78SBenjamin Gaignard 
126cdfbff78SBenjamin Gaignard #define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout
127cdfbff78SBenjamin Gaignard 
128cdfbff78SBenjamin Gaignard /* preformatter conversion matrix */
129cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_601[8] = {
130cdfbff78SBenjamin Gaignard 	0xF927082E, 0x04C9FEAB, 0x01D30964, 0xFA95FD3D,
131cdfbff78SBenjamin Gaignard 	0x0000082E, 0x00002000, 0x00002000, 0x00000000
132cdfbff78SBenjamin Gaignard };
133cdfbff78SBenjamin Gaignard 
134cdfbff78SBenjamin Gaignard /* 709 RGB to YCbCr */
135cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_709[8] = {
136cdfbff78SBenjamin Gaignard 	0xF891082F, 0x0367FF40, 0x01280B71, 0xF9B1FE20,
137cdfbff78SBenjamin Gaignard 	0x0000082F, 0x00002000, 0x00002000, 0x00000000
138cdfbff78SBenjamin Gaignard };
139cdfbff78SBenjamin Gaignard 
140cdfbff78SBenjamin Gaignard static u32 tvout_read(struct sti_tvout *tvout, int offset)
141cdfbff78SBenjamin Gaignard {
142cdfbff78SBenjamin Gaignard 	return readl(tvout->regs + offset);
143cdfbff78SBenjamin Gaignard }
144cdfbff78SBenjamin Gaignard 
145cdfbff78SBenjamin Gaignard static void tvout_write(struct sti_tvout *tvout, u32 val, int offset)
146cdfbff78SBenjamin Gaignard {
147cdfbff78SBenjamin Gaignard 	writel(val, tvout->regs + offset);
148cdfbff78SBenjamin Gaignard }
149cdfbff78SBenjamin Gaignard 
150cdfbff78SBenjamin Gaignard /**
151cdfbff78SBenjamin Gaignard  * Set the clipping mode of a VIP
152cdfbff78SBenjamin Gaignard  *
153cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
154ca279601SBenjamin Gaignard  * @reg: register to set
155cdfbff78SBenjamin Gaignard  * @cr_r:
156cdfbff78SBenjamin Gaignard  * @y_g:
157cdfbff78SBenjamin Gaignard  * @cb_b:
158cdfbff78SBenjamin Gaignard  */
159ca279601SBenjamin Gaignard static void tvout_vip_set_color_order(struct sti_tvout *tvout, int reg,
160cdfbff78SBenjamin Gaignard 				      u32 cr_r, u32 y_g, u32 cb_b)
161cdfbff78SBenjamin Gaignard {
162ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
163cdfbff78SBenjamin Gaignard 
164cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT);
165cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT);
166cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT);
167cdfbff78SBenjamin Gaignard 	val |= cr_r << TVO_VIP_REORDER_R_SHIFT;
168cdfbff78SBenjamin Gaignard 	val |= y_g << TVO_VIP_REORDER_G_SHIFT;
169cdfbff78SBenjamin Gaignard 	val |= cb_b << TVO_VIP_REORDER_B_SHIFT;
170cdfbff78SBenjamin Gaignard 
171ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
172cdfbff78SBenjamin Gaignard }
173cdfbff78SBenjamin Gaignard 
174cdfbff78SBenjamin Gaignard /**
175cdfbff78SBenjamin Gaignard  * Set the clipping mode of a VIP
176cdfbff78SBenjamin Gaignard  *
177cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
178ca279601SBenjamin Gaignard  * @reg: register to set
179cdfbff78SBenjamin Gaignard  * @range: clipping range
180cdfbff78SBenjamin Gaignard  */
181ca279601SBenjamin Gaignard static void tvout_vip_set_clip_mode(struct sti_tvout *tvout, int reg, u32 range)
182cdfbff78SBenjamin Gaignard {
183ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
184cdfbff78SBenjamin Gaignard 
185cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT);
186cdfbff78SBenjamin Gaignard 	val |= range << TVO_VIP_CLIP_SHIFT;
187ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
188cdfbff78SBenjamin Gaignard }
189cdfbff78SBenjamin Gaignard 
190cdfbff78SBenjamin Gaignard /**
191cdfbff78SBenjamin Gaignard  * Set the rounded value of a VIP
192cdfbff78SBenjamin Gaignard  *
193cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
194ca279601SBenjamin Gaignard  * @reg: register to set
195cdfbff78SBenjamin Gaignard  * @rnd: rounded val per component
196cdfbff78SBenjamin Gaignard  */
197ca279601SBenjamin Gaignard static void tvout_vip_set_rnd(struct sti_tvout *tvout, int reg, u32 rnd)
198cdfbff78SBenjamin Gaignard {
199ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
200cdfbff78SBenjamin Gaignard 
201cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT);
202cdfbff78SBenjamin Gaignard 	val |= rnd << TVO_VIP_RND_SHIFT;
203ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
204cdfbff78SBenjamin Gaignard }
205cdfbff78SBenjamin Gaignard 
206cdfbff78SBenjamin Gaignard /**
207cdfbff78SBenjamin Gaignard  * Select the VIP input
208cdfbff78SBenjamin Gaignard  *
209cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
210ca279601SBenjamin Gaignard  * @reg: register to set
211ca279601SBenjamin Gaignard  * @main_path: main or auxiliary path
212ca279601SBenjamin Gaignard  * @sel_input_logic_inverted: need to invert the logic
213cdfbff78SBenjamin Gaignard  * @sel_input: selected_input (main/aux + conv)
214cdfbff78SBenjamin Gaignard  */
215cdfbff78SBenjamin Gaignard static void tvout_vip_set_sel_input(struct sti_tvout *tvout,
216ca279601SBenjamin Gaignard 				    int reg,
217cdfbff78SBenjamin Gaignard 				    bool main_path,
218cdfbff78SBenjamin Gaignard 				    bool sel_input_logic_inverted,
219cdfbff78SBenjamin Gaignard 				    enum sti_tvout_video_out_type video_out)
220cdfbff78SBenjamin Gaignard {
221cdfbff78SBenjamin Gaignard 	u32 sel_input;
222ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
223cdfbff78SBenjamin Gaignard 
224cdfbff78SBenjamin Gaignard 	if (main_path)
225cdfbff78SBenjamin Gaignard 		sel_input = TVO_VIP_SEL_INPUT_MAIN;
226cdfbff78SBenjamin Gaignard 	else
227cdfbff78SBenjamin Gaignard 		sel_input = TVO_VIP_SEL_INPUT_AUX;
228cdfbff78SBenjamin Gaignard 
229cdfbff78SBenjamin Gaignard 	switch (video_out) {
230cdfbff78SBenjamin Gaignard 	case STI_TVOUT_VIDEO_OUT_RGB:
231cdfbff78SBenjamin Gaignard 		sel_input |= TVO_VIP_SEL_INPUT_BYPASSED;
232cdfbff78SBenjamin Gaignard 		break;
233cdfbff78SBenjamin Gaignard 	case STI_TVOUT_VIDEO_OUT_YUV:
234cdfbff78SBenjamin Gaignard 		sel_input &= ~TVO_VIP_SEL_INPUT_BYPASSED;
235cdfbff78SBenjamin Gaignard 		break;
236cdfbff78SBenjamin Gaignard 	}
237cdfbff78SBenjamin Gaignard 
238cdfbff78SBenjamin Gaignard 	/* on stih407 chip the sel_input bypass mode logic is inverted */
239cdfbff78SBenjamin Gaignard 	if (sel_input_logic_inverted)
240cdfbff78SBenjamin Gaignard 		sel_input = sel_input ^ TVO_VIP_SEL_INPUT_BYPASS_MASK;
241cdfbff78SBenjamin Gaignard 
242cdfbff78SBenjamin Gaignard 	val &= ~TVO_VIP_SEL_INPUT_MASK;
243cdfbff78SBenjamin Gaignard 	val |= sel_input;
244ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
245cdfbff78SBenjamin Gaignard }
246cdfbff78SBenjamin Gaignard 
247cdfbff78SBenjamin Gaignard /**
248cdfbff78SBenjamin Gaignard  * Select the input video signed or unsigned
249cdfbff78SBenjamin Gaignard  *
250cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
251ca279601SBenjamin Gaignard  * @reg: register to set
252cdfbff78SBenjamin Gaignard  * @in_vid_signed: used video input format
253cdfbff78SBenjamin Gaignard  */
254ca279601SBenjamin Gaignard static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout,
255ca279601SBenjamin Gaignard 		int reg, u32 in_vid_fmt)
256cdfbff78SBenjamin Gaignard {
257ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
258cdfbff78SBenjamin Gaignard 
259cdfbff78SBenjamin Gaignard 	val &= ~TVO_IN_FMT_SIGNED;
260cdfbff78SBenjamin Gaignard 	val |= in_vid_fmt;
261ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
262cdfbff78SBenjamin Gaignard }
263cdfbff78SBenjamin Gaignard 
264cdfbff78SBenjamin Gaignard /**
265cdfbff78SBenjamin Gaignard  * Start VIP block for HDMI output
266cdfbff78SBenjamin Gaignard  *
267cdfbff78SBenjamin Gaignard  * @tvout: pointer on tvout structure
268cdfbff78SBenjamin Gaignard  * @main_path: true if main path has to be used in the vip configuration
269cdfbff78SBenjamin Gaignard  *	  else aux path is used.
270cdfbff78SBenjamin Gaignard  */
271cdfbff78SBenjamin Gaignard static void tvout_hdmi_start(struct sti_tvout *tvout, bool main_path)
272cdfbff78SBenjamin Gaignard {
273cdfbff78SBenjamin Gaignard 	struct device_node *node = tvout->dev->of_node;
274cdfbff78SBenjamin Gaignard 	bool sel_input_logic_inverted = false;
275ca279601SBenjamin Gaignard 	u32 tvo_in_vid_format;
276cdfbff78SBenjamin Gaignard 
277cdfbff78SBenjamin Gaignard 	dev_dbg(tvout->dev, "%s\n", __func__);
278cdfbff78SBenjamin Gaignard 
279cdfbff78SBenjamin Gaignard 	if (main_path) {
280cdfbff78SBenjamin Gaignard 		DRM_DEBUG_DRIVER("main vip for hdmi\n");
281cdfbff78SBenjamin Gaignard 		/* select the input sync for hdmi = VTG set 1 */
282cdfbff78SBenjamin Gaignard 		tvout_write(tvout, TVO_SYNC_MAIN_VTG_SET_1, TVO_HDMI_SYNC_SEL);
283ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
284cdfbff78SBenjamin Gaignard 	} else {
285cdfbff78SBenjamin Gaignard 		DRM_DEBUG_DRIVER("aux vip for hdmi\n");
286cdfbff78SBenjamin Gaignard 		/* select the input sync for hdmi = VTG set 1 */
287cdfbff78SBenjamin Gaignard 		tvout_write(tvout, TVO_SYNC_AUX_VTG_SET_1, TVO_HDMI_SYNC_SEL);
288ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
289cdfbff78SBenjamin Gaignard 	}
290cdfbff78SBenjamin Gaignard 
291cdfbff78SBenjamin Gaignard 	/* set color channel order */
292ca279601SBenjamin Gaignard 	tvout_vip_set_color_order(tvout, TVO_VIP_HDMI,
293cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CR_R_SEL,
294cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_Y_G_SEL,
295cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CB_B_SEL);
296cdfbff78SBenjamin Gaignard 
297cdfbff78SBenjamin Gaignard 	/* set clipping mode (Limited range RGB/Y) */
298ca279601SBenjamin Gaignard 	tvout_vip_set_clip_mode(tvout, TVO_VIP_HDMI,
299ca279601SBenjamin Gaignard 			TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y);
300cdfbff78SBenjamin Gaignard 
301cdfbff78SBenjamin Gaignard 	/* set round mode (rounded to 8-bit per component) */
302ca279601SBenjamin Gaignard 	tvout_vip_set_rnd(tvout, TVO_VIP_HDMI, TVO_VIP_RND_8BIT_ROUNDED);
303cdfbff78SBenjamin Gaignard 
304cdfbff78SBenjamin Gaignard 	if (of_device_is_compatible(node, "st,stih407-tvout")) {
305cdfbff78SBenjamin Gaignard 		/* set input video format */
306ca279601SBenjamin Gaignard 		tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format,
307cdfbff78SBenjamin Gaignard 					TVO_IN_FMT_SIGNED);
308cdfbff78SBenjamin Gaignard 		sel_input_logic_inverted = true;
309cdfbff78SBenjamin Gaignard 	}
310cdfbff78SBenjamin Gaignard 
311cdfbff78SBenjamin Gaignard 	/* input selection */
312ca279601SBenjamin Gaignard 	tvout_vip_set_sel_input(tvout, TVO_VIP_HDMI, main_path,
313cdfbff78SBenjamin Gaignard 			sel_input_logic_inverted, STI_TVOUT_VIDEO_OUT_RGB);
314cdfbff78SBenjamin Gaignard }
315cdfbff78SBenjamin Gaignard 
316cdfbff78SBenjamin Gaignard /**
317cdfbff78SBenjamin Gaignard  * Start HDF VIP and HD DAC
318cdfbff78SBenjamin Gaignard  *
319cdfbff78SBenjamin Gaignard  * @tvout: pointer on tvout structure
320cdfbff78SBenjamin Gaignard  * @main_path: true if main path has to be used in the vip configuration
321cdfbff78SBenjamin Gaignard  *	  else aux path is used.
322cdfbff78SBenjamin Gaignard  */
323cdfbff78SBenjamin Gaignard static void tvout_hda_start(struct sti_tvout *tvout, bool main_path)
324cdfbff78SBenjamin Gaignard {
325cdfbff78SBenjamin Gaignard 	struct device_node *node = tvout->dev->of_node;
326cdfbff78SBenjamin Gaignard 	bool sel_input_logic_inverted = false;
327ca279601SBenjamin Gaignard 	u32 tvo_in_vid_format;
328ca279601SBenjamin Gaignard 	int val;
329cdfbff78SBenjamin Gaignard 
330cdfbff78SBenjamin Gaignard 	dev_dbg(tvout->dev, "%s\n", __func__);
331cdfbff78SBenjamin Gaignard 
332ca279601SBenjamin Gaignard 	if (main_path) {
333ca279601SBenjamin Gaignard 		val = TVO_SYNC_MAIN_VTG_SET_2 << TVO_SYNC_HD_DCS_SHIFT;
334ca279601SBenjamin Gaignard 		val |= TVO_SYNC_MAIN_VTG_SET_3;
335ca279601SBenjamin Gaignard 		tvout_write(tvout, val, TVO_HD_SYNC_SEL);
336ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
337ca279601SBenjamin Gaignard 	} else {
338ca279601SBenjamin Gaignard 		val = TVO_SYNC_AUX_VTG_SET_2 << TVO_SYNC_HD_DCS_SHIFT;
339ca279601SBenjamin Gaignard 		val |= TVO_SYNC_AUX_VTG_SET_3;
340ca279601SBenjamin Gaignard 		tvout_write(tvout, val, TVO_HD_SYNC_SEL);
341ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
342cdfbff78SBenjamin Gaignard 	}
343cdfbff78SBenjamin Gaignard 
344cdfbff78SBenjamin Gaignard 	/* set color channel order */
345ca279601SBenjamin Gaignard 	tvout_vip_set_color_order(tvout, TVO_VIP_HDF,
346cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CR_R_SEL,
347cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_Y_G_SEL,
348cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CB_B_SEL);
349cdfbff78SBenjamin Gaignard 
350ca279601SBenjamin Gaignard 	/* set clipping mode (EAV/SAV clipping) */
351ca279601SBenjamin Gaignard 	tvout_vip_set_clip_mode(tvout, TVO_VIP_HDF, TVO_VIP_CLIP_EAV_SAV);
352cdfbff78SBenjamin Gaignard 
353cdfbff78SBenjamin Gaignard 	/* set round mode (rounded to 10-bit per component) */
354ca279601SBenjamin Gaignard 	tvout_vip_set_rnd(tvout, TVO_VIP_HDF, TVO_VIP_RND_10BIT_ROUNDED);
355cdfbff78SBenjamin Gaignard 
356cdfbff78SBenjamin Gaignard 	if (of_device_is_compatible(node, "st,stih407-tvout")) {
357cdfbff78SBenjamin Gaignard 		/* set input video format */
358ca279601SBenjamin Gaignard 		tvout_vip_set_in_vid_fmt(tvout,
359ca279601SBenjamin Gaignard 			tvo_in_vid_format, TVO_IN_FMT_SIGNED);
360cdfbff78SBenjamin Gaignard 		sel_input_logic_inverted = true;
361cdfbff78SBenjamin Gaignard 	}
362cdfbff78SBenjamin Gaignard 
363cdfbff78SBenjamin Gaignard 	/* Input selection */
364ca279601SBenjamin Gaignard 	tvout_vip_set_sel_input(tvout, TVO_VIP_HDF, main_path,
365cdfbff78SBenjamin Gaignard 				sel_input_logic_inverted,
366cdfbff78SBenjamin Gaignard 				STI_TVOUT_VIDEO_OUT_YUV);
367cdfbff78SBenjamin Gaignard 
368cdfbff78SBenjamin Gaignard 	/* power up HD DAC */
369cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 0, TVO_HD_DAC_CFG_OFF);
370cdfbff78SBenjamin Gaignard }
371cdfbff78SBenjamin Gaignard 
372cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_dpms(struct drm_encoder *encoder, int mode)
373cdfbff78SBenjamin Gaignard {
374cdfbff78SBenjamin Gaignard }
375cdfbff78SBenjamin Gaignard 
376cdfbff78SBenjamin Gaignard static bool sti_tvout_encoder_mode_fixup(struct drm_encoder *encoder,
377cdfbff78SBenjamin Gaignard 				       const struct drm_display_mode *mode,
378cdfbff78SBenjamin Gaignard 				       struct drm_display_mode *adjusted_mode)
379cdfbff78SBenjamin Gaignard {
380cdfbff78SBenjamin Gaignard 	return true;
381cdfbff78SBenjamin Gaignard }
382cdfbff78SBenjamin Gaignard 
383cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_mode_set(struct drm_encoder *encoder,
384cdfbff78SBenjamin Gaignard 				       struct drm_display_mode *mode,
385cdfbff78SBenjamin Gaignard 				       struct drm_display_mode *adjusted_mode)
386cdfbff78SBenjamin Gaignard {
387cdfbff78SBenjamin Gaignard }
388cdfbff78SBenjamin Gaignard 
389cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_prepare(struct drm_encoder *encoder)
390cdfbff78SBenjamin Gaignard {
391cdfbff78SBenjamin Gaignard }
392cdfbff78SBenjamin Gaignard 
393cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_destroy(struct drm_encoder *encoder)
394cdfbff78SBenjamin Gaignard {
395cdfbff78SBenjamin Gaignard 	struct sti_tvout_encoder *sti_encoder = to_sti_tvout_encoder(encoder);
396cdfbff78SBenjamin Gaignard 
397cdfbff78SBenjamin Gaignard 	drm_encoder_cleanup(encoder);
398cdfbff78SBenjamin Gaignard 	kfree(sti_encoder);
399cdfbff78SBenjamin Gaignard }
400cdfbff78SBenjamin Gaignard 
401cdfbff78SBenjamin Gaignard static const struct drm_encoder_funcs sti_tvout_encoder_funcs = {
402cdfbff78SBenjamin Gaignard 	.destroy = sti_tvout_encoder_destroy,
403cdfbff78SBenjamin Gaignard };
404cdfbff78SBenjamin Gaignard 
405cdfbff78SBenjamin Gaignard static void sti_hda_encoder_commit(struct drm_encoder *encoder)
406cdfbff78SBenjamin Gaignard {
407cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
408cdfbff78SBenjamin Gaignard 
4095e03abc5SBenjamin Gaignard 	tvout_hda_start(tvout, sti_drm_crtc_is_main(encoder->crtc));
410cdfbff78SBenjamin Gaignard }
411cdfbff78SBenjamin Gaignard 
412cdfbff78SBenjamin Gaignard static void sti_hda_encoder_disable(struct drm_encoder *encoder)
413cdfbff78SBenjamin Gaignard {
414cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
415cdfbff78SBenjamin Gaignard 
416cdfbff78SBenjamin Gaignard 	/* reset VIP register */
417cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 0x0, TVO_VIP_HDF);
418cdfbff78SBenjamin Gaignard 
419cdfbff78SBenjamin Gaignard 	/* power down HD DAC */
420cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 1, TVO_HD_DAC_CFG_OFF);
421cdfbff78SBenjamin Gaignard }
422cdfbff78SBenjamin Gaignard 
423cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hda_encoder_helper_funcs = {
424cdfbff78SBenjamin Gaignard 	.dpms = sti_tvout_encoder_dpms,
425cdfbff78SBenjamin Gaignard 	.mode_fixup = sti_tvout_encoder_mode_fixup,
426cdfbff78SBenjamin Gaignard 	.mode_set = sti_tvout_encoder_mode_set,
427cdfbff78SBenjamin Gaignard 	.prepare = sti_tvout_encoder_prepare,
428cdfbff78SBenjamin Gaignard 	.commit = sti_hda_encoder_commit,
429cdfbff78SBenjamin Gaignard 	.disable = sti_hda_encoder_disable,
430cdfbff78SBenjamin Gaignard };
431cdfbff78SBenjamin Gaignard 
432cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev,
433cdfbff78SBenjamin Gaignard 		struct sti_tvout *tvout)
434cdfbff78SBenjamin Gaignard {
435cdfbff78SBenjamin Gaignard 	struct sti_tvout_encoder *encoder;
436cdfbff78SBenjamin Gaignard 	struct drm_encoder *drm_encoder;
437cdfbff78SBenjamin Gaignard 
438cdfbff78SBenjamin Gaignard 	encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
439cdfbff78SBenjamin Gaignard 	if (!encoder)
440cdfbff78SBenjamin Gaignard 		return NULL;
441cdfbff78SBenjamin Gaignard 
442cdfbff78SBenjamin Gaignard 	encoder->tvout = tvout;
443cdfbff78SBenjamin Gaignard 
444cdfbff78SBenjamin Gaignard 	drm_encoder = (struct drm_encoder *) encoder;
445cdfbff78SBenjamin Gaignard 
4465e03abc5SBenjamin Gaignard 	drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
447cdfbff78SBenjamin Gaignard 	drm_encoder->possible_clones = 1 << 0;
448cdfbff78SBenjamin Gaignard 
449cdfbff78SBenjamin Gaignard 	drm_encoder_init(dev, drm_encoder,
450cdfbff78SBenjamin Gaignard 			&sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC);
451cdfbff78SBenjamin Gaignard 
452cdfbff78SBenjamin Gaignard 	drm_encoder_helper_add(drm_encoder, &sti_hda_encoder_helper_funcs);
453cdfbff78SBenjamin Gaignard 
454cdfbff78SBenjamin Gaignard 	return drm_encoder;
455cdfbff78SBenjamin Gaignard }
456cdfbff78SBenjamin Gaignard 
457cdfbff78SBenjamin Gaignard static void sti_hdmi_encoder_commit(struct drm_encoder *encoder)
458cdfbff78SBenjamin Gaignard {
459cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
460cdfbff78SBenjamin Gaignard 
4615e03abc5SBenjamin Gaignard 	tvout_hdmi_start(tvout, sti_drm_crtc_is_main(encoder->crtc));
462cdfbff78SBenjamin Gaignard }
463cdfbff78SBenjamin Gaignard 
464cdfbff78SBenjamin Gaignard static void sti_hdmi_encoder_disable(struct drm_encoder *encoder)
465cdfbff78SBenjamin Gaignard {
466cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
467cdfbff78SBenjamin Gaignard 
468cdfbff78SBenjamin Gaignard 	/* reset VIP register */
469cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 0x0, TVO_VIP_HDMI);
470cdfbff78SBenjamin Gaignard }
471cdfbff78SBenjamin Gaignard 
472cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hdmi_encoder_helper_funcs = {
473cdfbff78SBenjamin Gaignard 	.dpms = sti_tvout_encoder_dpms,
474cdfbff78SBenjamin Gaignard 	.mode_fixup = sti_tvout_encoder_mode_fixup,
475cdfbff78SBenjamin Gaignard 	.mode_set = sti_tvout_encoder_mode_set,
476cdfbff78SBenjamin Gaignard 	.prepare = sti_tvout_encoder_prepare,
477cdfbff78SBenjamin Gaignard 	.commit = sti_hdmi_encoder_commit,
478cdfbff78SBenjamin Gaignard 	.disable = sti_hdmi_encoder_disable,
479cdfbff78SBenjamin Gaignard };
480cdfbff78SBenjamin Gaignard 
481cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hdmi_encoder(struct drm_device *dev,
482cdfbff78SBenjamin Gaignard 		struct sti_tvout *tvout)
483cdfbff78SBenjamin Gaignard {
484cdfbff78SBenjamin Gaignard 	struct sti_tvout_encoder *encoder;
485cdfbff78SBenjamin Gaignard 	struct drm_encoder *drm_encoder;
486cdfbff78SBenjamin Gaignard 
487cdfbff78SBenjamin Gaignard 	encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
488cdfbff78SBenjamin Gaignard 	if (!encoder)
489cdfbff78SBenjamin Gaignard 		return NULL;
490cdfbff78SBenjamin Gaignard 
491cdfbff78SBenjamin Gaignard 	encoder->tvout = tvout;
492cdfbff78SBenjamin Gaignard 
493cdfbff78SBenjamin Gaignard 	drm_encoder = (struct drm_encoder *) encoder;
494cdfbff78SBenjamin Gaignard 
4955e03abc5SBenjamin Gaignard 	drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
496cdfbff78SBenjamin Gaignard 	drm_encoder->possible_clones = 1 << 1;
497cdfbff78SBenjamin Gaignard 
498cdfbff78SBenjamin Gaignard 	drm_encoder_init(dev, drm_encoder,
499cdfbff78SBenjamin Gaignard 			&sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS);
500cdfbff78SBenjamin Gaignard 
501cdfbff78SBenjamin Gaignard 	drm_encoder_helper_add(drm_encoder, &sti_hdmi_encoder_helper_funcs);
502cdfbff78SBenjamin Gaignard 
503cdfbff78SBenjamin Gaignard 	return drm_encoder;
504cdfbff78SBenjamin Gaignard }
505cdfbff78SBenjamin Gaignard 
506cdfbff78SBenjamin Gaignard static void sti_tvout_create_encoders(struct drm_device *dev,
507cdfbff78SBenjamin Gaignard 		struct sti_tvout *tvout)
508cdfbff78SBenjamin Gaignard {
509cdfbff78SBenjamin Gaignard 	tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout);
510cdfbff78SBenjamin Gaignard 	tvout->hda = sti_tvout_create_hda_encoder(dev, tvout);
511cdfbff78SBenjamin Gaignard }
512cdfbff78SBenjamin Gaignard 
513cdfbff78SBenjamin Gaignard static void sti_tvout_destroy_encoders(struct sti_tvout *tvout)
514cdfbff78SBenjamin Gaignard {
515cdfbff78SBenjamin Gaignard 	if (tvout->hdmi)
516cdfbff78SBenjamin Gaignard 		drm_encoder_cleanup(tvout->hdmi);
517cdfbff78SBenjamin Gaignard 	tvout->hdmi = NULL;
518cdfbff78SBenjamin Gaignard 
519cdfbff78SBenjamin Gaignard 	if (tvout->hda)
520cdfbff78SBenjamin Gaignard 		drm_encoder_cleanup(tvout->hda);
521cdfbff78SBenjamin Gaignard 	tvout->hda = NULL;
522cdfbff78SBenjamin Gaignard }
523cdfbff78SBenjamin Gaignard 
524cdfbff78SBenjamin Gaignard static int sti_tvout_bind(struct device *dev, struct device *master, void *data)
525cdfbff78SBenjamin Gaignard {
526cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = dev_get_drvdata(dev);
527cdfbff78SBenjamin Gaignard 	struct drm_device *drm_dev = data;
528cdfbff78SBenjamin Gaignard 	unsigned int i;
529cdfbff78SBenjamin Gaignard 	int ret;
530cdfbff78SBenjamin Gaignard 
531cdfbff78SBenjamin Gaignard 	tvout->drm_dev = drm_dev;
532cdfbff78SBenjamin Gaignard 
533cdfbff78SBenjamin Gaignard 	/* set preformatter matrix */
534cdfbff78SBenjamin Gaignard 	for (i = 0; i < 8; i++) {
535cdfbff78SBenjamin Gaignard 		tvout_write(tvout, rgb_to_ycbcr_601[i],
536cdfbff78SBenjamin Gaignard 			TVO_CSC_MAIN_M0 + (i * 4));
537cdfbff78SBenjamin Gaignard 		tvout_write(tvout, rgb_to_ycbcr_601[i],
538cdfbff78SBenjamin Gaignard 			TVO_CSC_AUX_M0 + (i * 4));
539cdfbff78SBenjamin Gaignard 	}
540cdfbff78SBenjamin Gaignard 
541cdfbff78SBenjamin Gaignard 	sti_tvout_create_encoders(drm_dev, tvout);
542cdfbff78SBenjamin Gaignard 
543cdfbff78SBenjamin Gaignard 	ret = component_bind_all(dev, drm_dev);
544cdfbff78SBenjamin Gaignard 	if (ret)
545cdfbff78SBenjamin Gaignard 		sti_tvout_destroy_encoders(tvout);
546cdfbff78SBenjamin Gaignard 
547cdfbff78SBenjamin Gaignard 	return ret;
548cdfbff78SBenjamin Gaignard }
549cdfbff78SBenjamin Gaignard 
550cdfbff78SBenjamin Gaignard static void sti_tvout_unbind(struct device *dev, struct device *master,
551cdfbff78SBenjamin Gaignard 	void *data)
552cdfbff78SBenjamin Gaignard {
553cdfbff78SBenjamin Gaignard 	/* do nothing */
554cdfbff78SBenjamin Gaignard }
555cdfbff78SBenjamin Gaignard 
556cdfbff78SBenjamin Gaignard static const struct component_ops sti_tvout_ops = {
557cdfbff78SBenjamin Gaignard 	.bind	= sti_tvout_bind,
558cdfbff78SBenjamin Gaignard 	.unbind	= sti_tvout_unbind,
559cdfbff78SBenjamin Gaignard };
560cdfbff78SBenjamin Gaignard 
561cdfbff78SBenjamin Gaignard static int compare_of(struct device *dev, void *data)
562cdfbff78SBenjamin Gaignard {
563cdfbff78SBenjamin Gaignard 	return dev->of_node == data;
564cdfbff78SBenjamin Gaignard }
565cdfbff78SBenjamin Gaignard 
566cdfbff78SBenjamin Gaignard static int sti_tvout_master_bind(struct device *dev)
567cdfbff78SBenjamin Gaignard {
568cdfbff78SBenjamin Gaignard 	return 0;
569cdfbff78SBenjamin Gaignard }
570cdfbff78SBenjamin Gaignard 
571cdfbff78SBenjamin Gaignard static void sti_tvout_master_unbind(struct device *dev)
572cdfbff78SBenjamin Gaignard {
573cdfbff78SBenjamin Gaignard 	/* do nothing */
574cdfbff78SBenjamin Gaignard }
575cdfbff78SBenjamin Gaignard 
576cdfbff78SBenjamin Gaignard static const struct component_master_ops sti_tvout_master_ops = {
577cdfbff78SBenjamin Gaignard 	.bind = sti_tvout_master_bind,
578cdfbff78SBenjamin Gaignard 	.unbind = sti_tvout_master_unbind,
579cdfbff78SBenjamin Gaignard };
580cdfbff78SBenjamin Gaignard 
581cdfbff78SBenjamin Gaignard static int sti_tvout_probe(struct platform_device *pdev)
582cdfbff78SBenjamin Gaignard {
583cdfbff78SBenjamin Gaignard 	struct device *dev = &pdev->dev;
584cdfbff78SBenjamin Gaignard 	struct device_node *node = dev->of_node;
585cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout;
586cdfbff78SBenjamin Gaignard 	struct resource *res;
587cdfbff78SBenjamin Gaignard 	struct device_node *child_np;
588cdfbff78SBenjamin Gaignard 	struct component_match *match = NULL;
589cdfbff78SBenjamin Gaignard 
590cdfbff78SBenjamin Gaignard 	DRM_INFO("%s\n", __func__);
591cdfbff78SBenjamin Gaignard 
592cdfbff78SBenjamin Gaignard 	if (!node)
593cdfbff78SBenjamin Gaignard 		return -ENODEV;
594cdfbff78SBenjamin Gaignard 
595cdfbff78SBenjamin Gaignard 	tvout = devm_kzalloc(dev, sizeof(*tvout), GFP_KERNEL);
596cdfbff78SBenjamin Gaignard 	if (!tvout)
597cdfbff78SBenjamin Gaignard 		return -ENOMEM;
598cdfbff78SBenjamin Gaignard 
599cdfbff78SBenjamin Gaignard 	tvout->dev = dev;
600cdfbff78SBenjamin Gaignard 
601cdfbff78SBenjamin Gaignard 	/* get Memory ressources */
602cdfbff78SBenjamin Gaignard 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tvout-reg");
603cdfbff78SBenjamin Gaignard 	if (!res) {
604cdfbff78SBenjamin Gaignard 		DRM_ERROR("Invalid glue resource\n");
605cdfbff78SBenjamin Gaignard 		return -ENOMEM;
606cdfbff78SBenjamin Gaignard 	}
607cdfbff78SBenjamin Gaignard 	tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
60831f32a21SWei Yongjun 	if (!tvout->regs)
60931f32a21SWei Yongjun 		return -ENOMEM;
610cdfbff78SBenjamin Gaignard 
611cdfbff78SBenjamin Gaignard 	/* get reset resources */
612cdfbff78SBenjamin Gaignard 	tvout->reset = devm_reset_control_get(dev, "tvout");
613cdfbff78SBenjamin Gaignard 	/* take tvout out of reset */
614cdfbff78SBenjamin Gaignard 	if (!IS_ERR(tvout->reset))
615cdfbff78SBenjamin Gaignard 		reset_control_deassert(tvout->reset);
616cdfbff78SBenjamin Gaignard 
617cdfbff78SBenjamin Gaignard 	platform_set_drvdata(pdev, tvout);
618cdfbff78SBenjamin Gaignard 
619cdfbff78SBenjamin Gaignard 	of_platform_populate(node, NULL, NULL, dev);
620cdfbff78SBenjamin Gaignard 
621cdfbff78SBenjamin Gaignard 	child_np = of_get_next_available_child(node, NULL);
622cdfbff78SBenjamin Gaignard 
623cdfbff78SBenjamin Gaignard 	while (child_np) {
624cdfbff78SBenjamin Gaignard 		component_match_add(dev, &match, compare_of, child_np);
625cdfbff78SBenjamin Gaignard 		of_node_put(child_np);
626cdfbff78SBenjamin Gaignard 		child_np = of_get_next_available_child(node, child_np);
627cdfbff78SBenjamin Gaignard 	}
628cdfbff78SBenjamin Gaignard 
629cdfbff78SBenjamin Gaignard 	component_master_add_with_match(dev, &sti_tvout_master_ops, match);
630cdfbff78SBenjamin Gaignard 
631cdfbff78SBenjamin Gaignard 	return component_add(dev, &sti_tvout_ops);
632cdfbff78SBenjamin Gaignard }
633cdfbff78SBenjamin Gaignard 
634cdfbff78SBenjamin Gaignard static int sti_tvout_remove(struct platform_device *pdev)
635cdfbff78SBenjamin Gaignard {
636cdfbff78SBenjamin Gaignard 	component_master_del(&pdev->dev, &sti_tvout_master_ops);
637cdfbff78SBenjamin Gaignard 	component_del(&pdev->dev, &sti_tvout_ops);
638cdfbff78SBenjamin Gaignard 	return 0;
639cdfbff78SBenjamin Gaignard }
640cdfbff78SBenjamin Gaignard 
6418e932cf0SKiran Padwal static const struct of_device_id tvout_of_match[] = {
642cdfbff78SBenjamin Gaignard 	{ .compatible = "st,stih416-tvout", },
643cdfbff78SBenjamin Gaignard 	{ .compatible = "st,stih407-tvout", },
644cdfbff78SBenjamin Gaignard 	{ /* end node */ }
645cdfbff78SBenjamin Gaignard };
646cdfbff78SBenjamin Gaignard MODULE_DEVICE_TABLE(of, tvout_of_match);
647cdfbff78SBenjamin Gaignard 
648cdfbff78SBenjamin Gaignard struct platform_driver sti_tvout_driver = {
649cdfbff78SBenjamin Gaignard 	.driver = {
650cdfbff78SBenjamin Gaignard 		.name = "sti-tvout",
651cdfbff78SBenjamin Gaignard 		.owner = THIS_MODULE,
652cdfbff78SBenjamin Gaignard 		.of_match_table = tvout_of_match,
653cdfbff78SBenjamin Gaignard 	},
654cdfbff78SBenjamin Gaignard 	.probe = sti_tvout_probe,
655cdfbff78SBenjamin Gaignard 	.remove = sti_tvout_remove,
656cdfbff78SBenjamin Gaignard };
657cdfbff78SBenjamin Gaignard 
658cdfbff78SBenjamin Gaignard module_platform_driver(sti_tvout_driver);
659cdfbff78SBenjamin Gaignard 
660cdfbff78SBenjamin Gaignard MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
661cdfbff78SBenjamin Gaignard MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
662cdfbff78SBenjamin Gaignard MODULE_LICENSE("GPL");
663