xref: /openbmc/linux/drivers/gpu/drm/sti/sti_tvout.c (revision 5dec1aff)
1e2842570SBenjamin Gaignard // SPDX-License-Identifier: GPL-2.0
2cdfbff78SBenjamin Gaignard /*
3cdfbff78SBenjamin Gaignard  * Copyright (C) STMicroelectronics SA 2014
4cdfbff78SBenjamin Gaignard  * Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
5cdfbff78SBenjamin Gaignard  *          Vincent Abriou <vincent.abriou@st.com>
6cdfbff78SBenjamin Gaignard  *          for STMicroelectronics.
7cdfbff78SBenjamin Gaignard  */
8cdfbff78SBenjamin Gaignard 
9cdfbff78SBenjamin Gaignard #include <linux/clk.h>
10cdfbff78SBenjamin Gaignard #include <linux/component.h>
115e2f97a9SSam Ravnborg #include <linux/io.h>
12cdfbff78SBenjamin Gaignard #include <linux/module.h>
13cdfbff78SBenjamin Gaignard #include <linux/of_platform.h>
14cdfbff78SBenjamin Gaignard #include <linux/platform_device.h>
15cdfbff78SBenjamin Gaignard #include <linux/reset.h>
160f3e1561SArnd Bergmann #include <linux/seq_file.h>
17cdfbff78SBenjamin Gaignard 
18fcd70cd3SDaniel Vetter #include <drm/drm_atomic_helper.h>
195e2f97a9SSam Ravnborg #include <drm/drm_debugfs.h>
205e2f97a9SSam Ravnborg #include <drm/drm_device.h>
215e2f97a9SSam Ravnborg #include <drm/drm_file.h>
225e2f97a9SSam Ravnborg #include <drm/drm_print.h>
23cdfbff78SBenjamin Gaignard 
249e1f05b2SVincent Abriou #include "sti_crtc.h"
25bdfd36efSVille Syrjälä #include "sti_drv.h"
26503290ceSVincent Abriou #include "sti_vtg.h"
275e03abc5SBenjamin Gaignard 
28cdfbff78SBenjamin Gaignard /* glue registers */
29cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M0                  0x000
30cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M1                  0x004
31cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M2                  0x008
32cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M3                  0x00c
33cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M4                  0x010
34cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M5                  0x014
35cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M6                  0x018
36cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M7                  0x01c
37cdfbff78SBenjamin Gaignard #define TVO_MAIN_IN_VID_FORMAT           0x030
38cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M0                   0x100
39cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M1                   0x104
40cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M2                   0x108
41cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M3                   0x10c
42cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M4                   0x110
43cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M5                   0x114
44cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M6                   0x118
45cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M7                   0x11c
46cdfbff78SBenjamin Gaignard #define TVO_AUX_IN_VID_FORMAT            0x130
47cdfbff78SBenjamin Gaignard #define TVO_VIP_HDF                      0x400
48cdfbff78SBenjamin Gaignard #define TVO_HD_SYNC_SEL                  0x418
49cdfbff78SBenjamin Gaignard #define TVO_HD_DAC_CFG_OFF               0x420
50cdfbff78SBenjamin Gaignard #define TVO_VIP_HDMI                     0x500
51cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_0           0x504
52cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_1           0x508
53cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_B_CB         0x50c
54cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_Y_G          0x510
55cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_R_CR         0x514
56cdfbff78SBenjamin Gaignard #define TVO_HDMI_SYNC_SEL                0x518
57cdfbff78SBenjamin Gaignard #define TVO_HDMI_DFV_OBS                 0x540
58f32c4c50SBenjamin Gaignard #define TVO_VIP_DVO                      0x600
59f32c4c50SBenjamin Gaignard #define TVO_DVO_SYNC_SEL                 0x618
60f32c4c50SBenjamin Gaignard #define TVO_DVO_CONFIG                   0x620
61cdfbff78SBenjamin Gaignard 
62cdfbff78SBenjamin Gaignard #define TVO_IN_FMT_SIGNED                BIT(0)
63cdfbff78SBenjamin Gaignard #define TVO_SYNC_EXT                     BIT(4)
64cdfbff78SBenjamin Gaignard 
65cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_R_SHIFT          24
66cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_G_SHIFT          20
67cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_B_SHIFT          16
68cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_MASK             0x3
69cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_Y_G_SEL          0
70cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CB_B_SEL         1
71cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CR_R_SEL         2
72cdfbff78SBenjamin Gaignard 
73cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_SHIFT               8
74cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_MASK                0x7
75cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_DISABLED            0
76cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_EAV_SAV             1
77cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y 2
78cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_CB_CR 3
79cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_PROG_RANGE          4
80cdfbff78SBenjamin Gaignard 
81cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_SHIFT                4
82cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_MASK                 0x3
83cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_8BIT_ROUNDED         0
84cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_10BIT_ROUNDED        1
85cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_12BIT_ROUNDED        2
86cdfbff78SBenjamin Gaignard 
87cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MASK           0xf
88cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MAIN           0x0
89cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_AUX            0x8
90cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_FORCE_COLOR    0xf
91cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASS_MASK    0x1
92cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASSED       1
93cdfbff78SBenjamin Gaignard 
94cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_REF        0x00
95cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_REF         0x10
96cdfbff78SBenjamin Gaignard 
97cdfbff78SBenjamin Gaignard #define TVO_SYNC_HD_DCS_SHIFT            8
98cdfbff78SBenjamin Gaignard 
99f32c4c50SBenjamin Gaignard #define TVO_SYNC_DVO_PAD_HSYNC_SHIFT     8
100f32c4c50SBenjamin Gaignard #define TVO_SYNC_DVO_PAD_VSYNC_SHIFT     16
101f32c4c50SBenjamin Gaignard 
1025e03abc5SBenjamin Gaignard #define ENCODER_CRTC_MASK                (BIT(0) | BIT(1))
103cdfbff78SBenjamin Gaignard 
10405a142c2SBich Hemon #define TVO_MIN_HD_HEIGHT                720
10505a142c2SBich Hemon 
106cdfbff78SBenjamin Gaignard /* enum listing the supported output data format */
107cdfbff78SBenjamin Gaignard enum sti_tvout_video_out_type {
108cdfbff78SBenjamin Gaignard 	STI_TVOUT_VIDEO_OUT_RGB,
109cdfbff78SBenjamin Gaignard 	STI_TVOUT_VIDEO_OUT_YUV,
110cdfbff78SBenjamin Gaignard };
111cdfbff78SBenjamin Gaignard 
112cdfbff78SBenjamin Gaignard struct sti_tvout {
113cdfbff78SBenjamin Gaignard 	struct device *dev;
114cdfbff78SBenjamin Gaignard 	struct drm_device *drm_dev;
115cdfbff78SBenjamin Gaignard 	void __iomem *regs;
116cdfbff78SBenjamin Gaignard 	struct reset_control *reset;
117cdfbff78SBenjamin Gaignard 	struct drm_encoder *hdmi;
118cdfbff78SBenjamin Gaignard 	struct drm_encoder *hda;
119f32c4c50SBenjamin Gaignard 	struct drm_encoder *dvo;
12083af0a48SBenjamin Gaignard 	bool debugfs_registered;
121cdfbff78SBenjamin Gaignard };
122cdfbff78SBenjamin Gaignard 
123cdfbff78SBenjamin Gaignard struct sti_tvout_encoder {
124cdfbff78SBenjamin Gaignard 	struct drm_encoder encoder;
125cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout;
126cdfbff78SBenjamin Gaignard };
127cdfbff78SBenjamin Gaignard 
128cdfbff78SBenjamin Gaignard #define to_sti_tvout_encoder(x) \
129cdfbff78SBenjamin Gaignard 	container_of(x, struct sti_tvout_encoder, encoder)
130cdfbff78SBenjamin Gaignard 
131cdfbff78SBenjamin Gaignard #define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout
132cdfbff78SBenjamin Gaignard 
133cdfbff78SBenjamin Gaignard /* preformatter conversion matrix */
134cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_601[8] = {
135cdfbff78SBenjamin Gaignard 	0xF927082E, 0x04C9FEAB, 0x01D30964, 0xFA95FD3D,
136cdfbff78SBenjamin Gaignard 	0x0000082E, 0x00002000, 0x00002000, 0x00000000
137cdfbff78SBenjamin Gaignard };
138cdfbff78SBenjamin Gaignard 
139cdfbff78SBenjamin Gaignard /* 709 RGB to YCbCr */
140cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_709[8] = {
141cdfbff78SBenjamin Gaignard 	0xF891082F, 0x0367FF40, 0x01280B71, 0xF9B1FE20,
142cdfbff78SBenjamin Gaignard 	0x0000082F, 0x00002000, 0x00002000, 0x00000000
143cdfbff78SBenjamin Gaignard };
144cdfbff78SBenjamin Gaignard 
145cdfbff78SBenjamin Gaignard static u32 tvout_read(struct sti_tvout *tvout, int offset)
146cdfbff78SBenjamin Gaignard {
147cdfbff78SBenjamin Gaignard 	return readl(tvout->regs + offset);
148cdfbff78SBenjamin Gaignard }
149cdfbff78SBenjamin Gaignard 
150cdfbff78SBenjamin Gaignard static void tvout_write(struct sti_tvout *tvout, u32 val, int offset)
151cdfbff78SBenjamin Gaignard {
152cdfbff78SBenjamin Gaignard 	writel(val, tvout->regs + offset);
153cdfbff78SBenjamin Gaignard }
154cdfbff78SBenjamin Gaignard 
155cdfbff78SBenjamin Gaignard /**
156cdfbff78SBenjamin Gaignard  * Set the clipping mode of a VIP
157cdfbff78SBenjamin Gaignard  *
158cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
159ca279601SBenjamin Gaignard  * @reg: register to set
1605dec1affSBenjamin Gaignard  * @cr_r: red chroma or red order
1615dec1affSBenjamin Gaignard  * @y_g: y or green order
1625dec1affSBenjamin Gaignard  * @cb_b: blue chroma or blue order
163cdfbff78SBenjamin Gaignard  */
164ca279601SBenjamin Gaignard static void tvout_vip_set_color_order(struct sti_tvout *tvout, int reg,
165cdfbff78SBenjamin Gaignard 				      u32 cr_r, u32 y_g, u32 cb_b)
166cdfbff78SBenjamin Gaignard {
167ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
168cdfbff78SBenjamin Gaignard 
169cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT);
170cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT);
171cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT);
172cdfbff78SBenjamin Gaignard 	val |= cr_r << TVO_VIP_REORDER_R_SHIFT;
173cdfbff78SBenjamin Gaignard 	val |= y_g << TVO_VIP_REORDER_G_SHIFT;
174cdfbff78SBenjamin Gaignard 	val |= cb_b << TVO_VIP_REORDER_B_SHIFT;
175cdfbff78SBenjamin Gaignard 
176ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
177cdfbff78SBenjamin Gaignard }
178cdfbff78SBenjamin Gaignard 
179cdfbff78SBenjamin Gaignard /**
180cdfbff78SBenjamin Gaignard  * Set the clipping mode of a VIP
181cdfbff78SBenjamin Gaignard  *
182cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
183ca279601SBenjamin Gaignard  * @reg: register to set
184cdfbff78SBenjamin Gaignard  * @range: clipping range
185cdfbff78SBenjamin Gaignard  */
186ca279601SBenjamin Gaignard static void tvout_vip_set_clip_mode(struct sti_tvout *tvout, int reg, u32 range)
187cdfbff78SBenjamin Gaignard {
188ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
189cdfbff78SBenjamin Gaignard 
190cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT);
191cdfbff78SBenjamin Gaignard 	val |= range << TVO_VIP_CLIP_SHIFT;
192ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
193cdfbff78SBenjamin Gaignard }
194cdfbff78SBenjamin Gaignard 
195cdfbff78SBenjamin Gaignard /**
196cdfbff78SBenjamin Gaignard  * Set the rounded value of a VIP
197cdfbff78SBenjamin Gaignard  *
198cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
199ca279601SBenjamin Gaignard  * @reg: register to set
200cdfbff78SBenjamin Gaignard  * @rnd: rounded val per component
201cdfbff78SBenjamin Gaignard  */
202ca279601SBenjamin Gaignard static void tvout_vip_set_rnd(struct sti_tvout *tvout, int reg, u32 rnd)
203cdfbff78SBenjamin Gaignard {
204ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
205cdfbff78SBenjamin Gaignard 
206cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT);
207cdfbff78SBenjamin Gaignard 	val |= rnd << TVO_VIP_RND_SHIFT;
208ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
209cdfbff78SBenjamin Gaignard }
210cdfbff78SBenjamin Gaignard 
211cdfbff78SBenjamin Gaignard /**
212cdfbff78SBenjamin Gaignard  * Select the VIP input
213cdfbff78SBenjamin Gaignard  *
214cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
215ca279601SBenjamin Gaignard  * @reg: register to set
216ca279601SBenjamin Gaignard  * @main_path: main or auxiliary path
2175dec1affSBenjamin Gaignard  * @video_out: selected_input (main/aux + conv)
218cdfbff78SBenjamin Gaignard  */
219cdfbff78SBenjamin Gaignard static void tvout_vip_set_sel_input(struct sti_tvout *tvout,
220ca279601SBenjamin Gaignard 				    int reg,
221cdfbff78SBenjamin Gaignard 				    bool main_path,
222cdfbff78SBenjamin Gaignard 				    enum sti_tvout_video_out_type video_out)
223cdfbff78SBenjamin Gaignard {
224cdfbff78SBenjamin Gaignard 	u32 sel_input;
225ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
226cdfbff78SBenjamin Gaignard 
227cdfbff78SBenjamin Gaignard 	if (main_path)
228cdfbff78SBenjamin Gaignard 		sel_input = TVO_VIP_SEL_INPUT_MAIN;
229cdfbff78SBenjamin Gaignard 	else
230cdfbff78SBenjamin Gaignard 		sel_input = TVO_VIP_SEL_INPUT_AUX;
231cdfbff78SBenjamin Gaignard 
232cdfbff78SBenjamin Gaignard 	switch (video_out) {
233cdfbff78SBenjamin Gaignard 	case STI_TVOUT_VIDEO_OUT_RGB:
234cdfbff78SBenjamin Gaignard 		sel_input |= TVO_VIP_SEL_INPUT_BYPASSED;
235cdfbff78SBenjamin Gaignard 		break;
236cdfbff78SBenjamin Gaignard 	case STI_TVOUT_VIDEO_OUT_YUV:
237cdfbff78SBenjamin Gaignard 		sel_input &= ~TVO_VIP_SEL_INPUT_BYPASSED;
238cdfbff78SBenjamin Gaignard 		break;
239cdfbff78SBenjamin Gaignard 	}
240cdfbff78SBenjamin Gaignard 
241cdfbff78SBenjamin Gaignard 	/* on stih407 chip the sel_input bypass mode logic is inverted */
242cdfbff78SBenjamin Gaignard 	sel_input = sel_input ^ TVO_VIP_SEL_INPUT_BYPASS_MASK;
243cdfbff78SBenjamin Gaignard 
244cdfbff78SBenjamin Gaignard 	val &= ~TVO_VIP_SEL_INPUT_MASK;
245cdfbff78SBenjamin Gaignard 	val |= sel_input;
246ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
247cdfbff78SBenjamin Gaignard }
248cdfbff78SBenjamin Gaignard 
249cdfbff78SBenjamin Gaignard /**
250cdfbff78SBenjamin Gaignard  * Select the input video signed or unsigned
251cdfbff78SBenjamin Gaignard  *
252cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
253ca279601SBenjamin Gaignard  * @reg: register to set
2545dec1affSBenjamin Gaignard  * @in_vid_fmt: used video input format
255cdfbff78SBenjamin Gaignard  */
256ca279601SBenjamin Gaignard static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout,
257ca279601SBenjamin Gaignard 		int reg, u32 in_vid_fmt)
258cdfbff78SBenjamin Gaignard {
259ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
260cdfbff78SBenjamin Gaignard 
261cdfbff78SBenjamin Gaignard 	val &= ~TVO_IN_FMT_SIGNED;
262cdfbff78SBenjamin Gaignard 	val |= in_vid_fmt;
263ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
264cdfbff78SBenjamin Gaignard }
265cdfbff78SBenjamin Gaignard 
266cdfbff78SBenjamin Gaignard /**
26705a142c2SBich Hemon  * Set preformatter matrix
26805a142c2SBich Hemon  *
26905a142c2SBich Hemon  * @tvout: tvout structure
27005a142c2SBich Hemon  * @mode: display mode structure
27105a142c2SBich Hemon  */
27205a142c2SBich Hemon static void tvout_preformatter_set_matrix(struct sti_tvout *tvout,
27305a142c2SBich Hemon 					  struct drm_display_mode *mode)
27405a142c2SBich Hemon {
27505a142c2SBich Hemon 	unsigned int i;
27605a142c2SBich Hemon 	const u32 *pf_matrix;
27705a142c2SBich Hemon 
27805a142c2SBich Hemon 	if (mode->vdisplay >= TVO_MIN_HD_HEIGHT)
27905a142c2SBich Hemon 		pf_matrix = rgb_to_ycbcr_709;
28005a142c2SBich Hemon 	else
28105a142c2SBich Hemon 		pf_matrix = rgb_to_ycbcr_601;
28205a142c2SBich Hemon 
28305a142c2SBich Hemon 	for (i = 0; i < 8; i++) {
28405a142c2SBich Hemon 		tvout_write(tvout, *(pf_matrix + i),
28505a142c2SBich Hemon 			    TVO_CSC_MAIN_M0 + (i * 4));
28605a142c2SBich Hemon 		tvout_write(tvout, *(pf_matrix + i),
28705a142c2SBich Hemon 			    TVO_CSC_AUX_M0 + (i * 4));
28805a142c2SBich Hemon 	}
28905a142c2SBich Hemon }
29005a142c2SBich Hemon 
29105a142c2SBich Hemon /**
292f32c4c50SBenjamin Gaignard  * Start VIP block for DVO output
293f32c4c50SBenjamin Gaignard  *
294f32c4c50SBenjamin Gaignard  * @tvout: pointer on tvout structure
295f32c4c50SBenjamin Gaignard  * @main_path: true if main path has to be used in the vip configuration
296f32c4c50SBenjamin Gaignard  *	  else aux path is used.
297f32c4c50SBenjamin Gaignard  */
298f32c4c50SBenjamin Gaignard static void tvout_dvo_start(struct sti_tvout *tvout, bool main_path)
299f32c4c50SBenjamin Gaignard {
300f32c4c50SBenjamin Gaignard 	u32 tvo_in_vid_format;
301503290ceSVincent Abriou 	int val, tmp;
302f32c4c50SBenjamin Gaignard 
303f32c4c50SBenjamin Gaignard 	dev_dbg(tvout->dev, "%s\n", __func__);
304f32c4c50SBenjamin Gaignard 
305f32c4c50SBenjamin Gaignard 	if (main_path) {
306f32c4c50SBenjamin Gaignard 		DRM_DEBUG_DRIVER("main vip for DVO\n");
307503290ceSVincent Abriou 		/* Select the input sync for dvo */
308503290ceSVincent Abriou 		tmp = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_DVO;
309503290ceSVincent Abriou 		val  = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
310503290ceSVincent Abriou 		val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
311503290ceSVincent Abriou 		val |= tmp;
312f32c4c50SBenjamin Gaignard 		tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
313f32c4c50SBenjamin Gaignard 		tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
314f32c4c50SBenjamin Gaignard 	} else {
315f32c4c50SBenjamin Gaignard 		DRM_DEBUG_DRIVER("aux vip for DVO\n");
316503290ceSVincent Abriou 		/* Select the input sync for dvo */
317503290ceSVincent Abriou 		tmp = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_DVO;
318503290ceSVincent Abriou 		val  = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
319503290ceSVincent Abriou 		val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
320503290ceSVincent Abriou 		val |= tmp;
321f32c4c50SBenjamin Gaignard 		tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
322f32c4c50SBenjamin Gaignard 		tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
323f32c4c50SBenjamin Gaignard 	}
324f32c4c50SBenjamin Gaignard 
325f32c4c50SBenjamin Gaignard 	/* Set color channel order */
326f32c4c50SBenjamin Gaignard 	tvout_vip_set_color_order(tvout, TVO_VIP_DVO,
327f32c4c50SBenjamin Gaignard 				  TVO_VIP_REORDER_CR_R_SEL,
328f32c4c50SBenjamin Gaignard 				  TVO_VIP_REORDER_Y_G_SEL,
329f32c4c50SBenjamin Gaignard 				  TVO_VIP_REORDER_CB_B_SEL);
330f32c4c50SBenjamin Gaignard 
3311834b84dSVincent Abriou 	/* Set clipping mode */
3321834b84dSVincent Abriou 	tvout_vip_set_clip_mode(tvout, TVO_VIP_DVO, TVO_VIP_CLIP_DISABLED);
333f32c4c50SBenjamin Gaignard 
334f32c4c50SBenjamin Gaignard 	/* Set round mode (rounded to 8-bit per component) */
335f32c4c50SBenjamin Gaignard 	tvout_vip_set_rnd(tvout, TVO_VIP_DVO, TVO_VIP_RND_8BIT_ROUNDED);
336f32c4c50SBenjamin Gaignard 
337f32c4c50SBenjamin Gaignard 	/* Set input video format */
338b4bba92dSVincent Abriou 	tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, TVO_IN_FMT_SIGNED);
339f32c4c50SBenjamin Gaignard 
340f32c4c50SBenjamin Gaignard 	/* Input selection */
341f32c4c50SBenjamin Gaignard 	tvout_vip_set_sel_input(tvout, TVO_VIP_DVO, main_path,
342f32c4c50SBenjamin Gaignard 				STI_TVOUT_VIDEO_OUT_RGB);
343f32c4c50SBenjamin Gaignard }
344f32c4c50SBenjamin Gaignard 
345f32c4c50SBenjamin Gaignard /**
346cdfbff78SBenjamin Gaignard  * Start VIP block for HDMI output
347cdfbff78SBenjamin Gaignard  *
348cdfbff78SBenjamin Gaignard  * @tvout: pointer on tvout structure
349cdfbff78SBenjamin Gaignard  * @main_path: true if main path has to be used in the vip configuration
350cdfbff78SBenjamin Gaignard  *	  else aux path is used.
351cdfbff78SBenjamin Gaignard  */
352cdfbff78SBenjamin Gaignard static void tvout_hdmi_start(struct sti_tvout *tvout, bool main_path)
353cdfbff78SBenjamin Gaignard {
354ca279601SBenjamin Gaignard 	u32 tvo_in_vid_format;
355cdfbff78SBenjamin Gaignard 
356cdfbff78SBenjamin Gaignard 	dev_dbg(tvout->dev, "%s\n", __func__);
357cdfbff78SBenjamin Gaignard 
358cdfbff78SBenjamin Gaignard 	if (main_path) {
359cdfbff78SBenjamin Gaignard 		DRM_DEBUG_DRIVER("main vip for hdmi\n");
360503290ceSVincent Abriou 		/* select the input sync for hdmi */
361503290ceSVincent Abriou 		tvout_write(tvout,
362503290ceSVincent Abriou 			    TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDMI,
363503290ceSVincent Abriou 			    TVO_HDMI_SYNC_SEL);
364ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
365cdfbff78SBenjamin Gaignard 	} else {
366cdfbff78SBenjamin Gaignard 		DRM_DEBUG_DRIVER("aux vip for hdmi\n");
367503290ceSVincent Abriou 		/* select the input sync for hdmi */
368503290ceSVincent Abriou 		tvout_write(tvout,
369503290ceSVincent Abriou 			    TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDMI,
370503290ceSVincent Abriou 			    TVO_HDMI_SYNC_SEL);
371ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
372cdfbff78SBenjamin Gaignard 	}
373cdfbff78SBenjamin Gaignard 
374cdfbff78SBenjamin Gaignard 	/* set color channel order */
375ca279601SBenjamin Gaignard 	tvout_vip_set_color_order(tvout, TVO_VIP_HDMI,
376cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CR_R_SEL,
377cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_Y_G_SEL,
378cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CB_B_SEL);
379cdfbff78SBenjamin Gaignard 
3801834b84dSVincent Abriou 	/* set clipping mode */
3811834b84dSVincent Abriou 	tvout_vip_set_clip_mode(tvout, TVO_VIP_HDMI, TVO_VIP_CLIP_DISABLED);
382cdfbff78SBenjamin Gaignard 
383cdfbff78SBenjamin Gaignard 	/* set round mode (rounded to 8-bit per component) */
384ca279601SBenjamin Gaignard 	tvout_vip_set_rnd(tvout, TVO_VIP_HDMI, TVO_VIP_RND_8BIT_ROUNDED);
385cdfbff78SBenjamin Gaignard 
386cdfbff78SBenjamin Gaignard 	/* set input video format */
387b4bba92dSVincent Abriou 	tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, TVO_IN_FMT_SIGNED);
388cdfbff78SBenjamin Gaignard 
389cdfbff78SBenjamin Gaignard 	/* input selection */
390ca279601SBenjamin Gaignard 	tvout_vip_set_sel_input(tvout, TVO_VIP_HDMI, main_path,
391b4bba92dSVincent Abriou 				STI_TVOUT_VIDEO_OUT_RGB);
392cdfbff78SBenjamin Gaignard }
393cdfbff78SBenjamin Gaignard 
394cdfbff78SBenjamin Gaignard /**
395cdfbff78SBenjamin Gaignard  * Start HDF VIP and HD DAC
396cdfbff78SBenjamin Gaignard  *
397cdfbff78SBenjamin Gaignard  * @tvout: pointer on tvout structure
398cdfbff78SBenjamin Gaignard  * @main_path: true if main path has to be used in the vip configuration
399cdfbff78SBenjamin Gaignard  *	  else aux path is used.
400cdfbff78SBenjamin Gaignard  */
401cdfbff78SBenjamin Gaignard static void tvout_hda_start(struct sti_tvout *tvout, bool main_path)
402cdfbff78SBenjamin Gaignard {
403ca279601SBenjamin Gaignard 	u32 tvo_in_vid_format;
404ca279601SBenjamin Gaignard 	int val;
405cdfbff78SBenjamin Gaignard 
406cdfbff78SBenjamin Gaignard 	dev_dbg(tvout->dev, "%s\n", __func__);
407cdfbff78SBenjamin Gaignard 
408ca279601SBenjamin Gaignard 	if (main_path) {
409503290ceSVincent Abriou 		DRM_DEBUG_DRIVER("main vip for HDF\n");
410503290ceSVincent Abriou 		/* Select the input sync for HD analog and HD DCS */
411503290ceSVincent Abriou 		val  = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDDCS;
412503290ceSVincent Abriou 		val  = val << TVO_SYNC_HD_DCS_SHIFT;
413503290ceSVincent Abriou 		val |= TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDF;
414ca279601SBenjamin Gaignard 		tvout_write(tvout, val, TVO_HD_SYNC_SEL);
415ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
416ca279601SBenjamin Gaignard 	} else {
417503290ceSVincent Abriou 		DRM_DEBUG_DRIVER("aux vip for HDF\n");
418503290ceSVincent Abriou 		/* Select the input sync for HD analog and HD DCS */
419503290ceSVincent Abriou 		val  = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDDCS;
420503290ceSVincent Abriou 		val  = val << TVO_SYNC_HD_DCS_SHIFT;
421503290ceSVincent Abriou 		val |= TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDF;
422ca279601SBenjamin Gaignard 		tvout_write(tvout, val, TVO_HD_SYNC_SEL);
423ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
424cdfbff78SBenjamin Gaignard 	}
425cdfbff78SBenjamin Gaignard 
426cdfbff78SBenjamin Gaignard 	/* set color channel order */
427ca279601SBenjamin Gaignard 	tvout_vip_set_color_order(tvout, TVO_VIP_HDF,
428cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CR_R_SEL,
429cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_Y_G_SEL,
430cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CB_B_SEL);
431cdfbff78SBenjamin Gaignard 
4321834b84dSVincent Abriou 	/* set clipping mode */
4331834b84dSVincent Abriou 	tvout_vip_set_clip_mode(tvout, TVO_VIP_HDF, TVO_VIP_CLIP_DISABLED);
434cdfbff78SBenjamin Gaignard 
435cdfbff78SBenjamin Gaignard 	/* set round mode (rounded to 10-bit per component) */
436ca279601SBenjamin Gaignard 	tvout_vip_set_rnd(tvout, TVO_VIP_HDF, TVO_VIP_RND_10BIT_ROUNDED);
437cdfbff78SBenjamin Gaignard 
438b4bba92dSVincent Abriou 	/* Set input video format */
439b4bba92dSVincent Abriou 	tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, TVO_IN_FMT_SIGNED);
440cdfbff78SBenjamin Gaignard 
441cdfbff78SBenjamin Gaignard 	/* Input selection */
442ca279601SBenjamin Gaignard 	tvout_vip_set_sel_input(tvout, TVO_VIP_HDF, main_path,
443cdfbff78SBenjamin Gaignard 				STI_TVOUT_VIDEO_OUT_YUV);
444cdfbff78SBenjamin Gaignard 
445cdfbff78SBenjamin Gaignard 	/* power up HD DAC */
446cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 0, TVO_HD_DAC_CFG_OFF);
447cdfbff78SBenjamin Gaignard }
448cdfbff78SBenjamin Gaignard 
449b514bee7SVincent Abriou #define DBGFS_DUMP(reg) seq_printf(s, "\n  %-25s 0x%08X", #reg, \
450b514bee7SVincent Abriou 				   readl(tvout->regs + reg))
451b514bee7SVincent Abriou 
452b514bee7SVincent Abriou static void tvout_dbg_vip(struct seq_file *s, int val)
453b514bee7SVincent Abriou {
454b514bee7SVincent Abriou 	int r, g, b, tmp, mask;
455b514bee7SVincent Abriou 	char *const reorder[] = {"Y_G", "Cb_B", "Cr_R"};
456b514bee7SVincent Abriou 	char *const clipping[] = {"No", "EAV/SAV", "Limited range RGB/Y",
457b514bee7SVincent Abriou 				  "Limited range Cb/Cr", "decided by register"};
458b514bee7SVincent Abriou 	char *const round[] = {"8-bit", "10-bit", "12-bit"};
459b514bee7SVincent Abriou 	char *const input_sel[] = {"Main (color matrix enabled)",
460b514bee7SVincent Abriou 				   "Main (color matrix by-passed)",
461b514bee7SVincent Abriou 				   "", "", "", "", "", "",
462b514bee7SVincent Abriou 				   "Aux (color matrix enabled)",
463b514bee7SVincent Abriou 				   "Aux (color matrix by-passed)",
464b514bee7SVincent Abriou 				   "", "", "", "", "", "Force value"};
465b514bee7SVincent Abriou 
466e9635133SMarkus Elfring 	seq_putc(s, '\t');
467b514bee7SVincent Abriou 	mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT;
468b514bee7SVincent Abriou 	r = (val & mask) >> TVO_VIP_REORDER_R_SHIFT;
469b514bee7SVincent Abriou 	mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT;
470b514bee7SVincent Abriou 	g = (val & mask) >> TVO_VIP_REORDER_G_SHIFT;
471b514bee7SVincent Abriou 	mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT;
472b514bee7SVincent Abriou 	b = (val & mask) >> TVO_VIP_REORDER_B_SHIFT;
473b514bee7SVincent Abriou 	seq_printf(s, "%-24s %s->%s %s->%s %s->%s\n", "Reorder:",
474b514bee7SVincent Abriou 		   reorder[r], reorder[TVO_VIP_REORDER_CR_R_SEL],
475b514bee7SVincent Abriou 		   reorder[g], reorder[TVO_VIP_REORDER_Y_G_SEL],
476b514bee7SVincent Abriou 		   reorder[b], reorder[TVO_VIP_REORDER_CB_B_SEL]);
477b514bee7SVincent Abriou 	seq_puts(s, "\t\t\t\t\t");
478b514bee7SVincent Abriou 	mask = TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT;
479b514bee7SVincent Abriou 	tmp = (val & mask) >> TVO_VIP_CLIP_SHIFT;
480b514bee7SVincent Abriou 	seq_printf(s, "%-24s %s\n", "Clipping:", clipping[tmp]);
481b514bee7SVincent Abriou 	seq_puts(s, "\t\t\t\t\t");
482b514bee7SVincent Abriou 	mask = TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT;
483b514bee7SVincent Abriou 	tmp = (val & mask) >> TVO_VIP_RND_SHIFT;
484b514bee7SVincent Abriou 	seq_printf(s, "%-24s input data rounded to %s per component\n",
485b514bee7SVincent Abriou 		   "Round:", round[tmp]);
486b514bee7SVincent Abriou 	seq_puts(s, "\t\t\t\t\t");
487b514bee7SVincent Abriou 	tmp = (val & TVO_VIP_SEL_INPUT_MASK);
488b514bee7SVincent Abriou 	seq_printf(s, "%-24s %s", "Input selection:", input_sel[tmp]);
489b514bee7SVincent Abriou }
490b514bee7SVincent Abriou 
491b514bee7SVincent Abriou static void tvout_dbg_hd_dac_cfg(struct seq_file *s, int val)
492b514bee7SVincent Abriou {
493b514bee7SVincent Abriou 	seq_printf(s, "\t%-24s %s", "HD DAC:",
494b514bee7SVincent Abriou 		   val & 1 ? "disabled" : "enabled");
495b514bee7SVincent Abriou }
496b514bee7SVincent Abriou 
497b514bee7SVincent Abriou static int tvout_dbg_show(struct seq_file *s, void *data)
498b514bee7SVincent Abriou {
499b514bee7SVincent Abriou 	struct drm_info_node *node = s->private;
500b514bee7SVincent Abriou 	struct sti_tvout *tvout = (struct sti_tvout *)node->info_ent->data;
501b514bee7SVincent Abriou 	struct drm_crtc *crtc;
502b514bee7SVincent Abriou 
503b514bee7SVincent Abriou 	seq_printf(s, "TVOUT: (vaddr = 0x%p)", tvout->regs);
504b514bee7SVincent Abriou 
505b514bee7SVincent Abriou 	seq_puts(s, "\n\n  HDMI encoder: ");
506b514bee7SVincent Abriou 	crtc = tvout->hdmi->crtc;
507b514bee7SVincent Abriou 	if (crtc) {
508b514bee7SVincent Abriou 		seq_printf(s, "connected to %s path",
509b514bee7SVincent Abriou 			   sti_crtc_is_main(crtc) ? "main" : "aux");
510b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_HDMI_SYNC_SEL);
511b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_VIP_HDMI);
512b514bee7SVincent Abriou 		tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDMI));
513b514bee7SVincent Abriou 	} else {
514b514bee7SVincent Abriou 		seq_puts(s, "disabled");
515b514bee7SVincent Abriou 	}
516b514bee7SVincent Abriou 
517b514bee7SVincent Abriou 	seq_puts(s, "\n\n  DVO encoder: ");
518b514bee7SVincent Abriou 	crtc = tvout->dvo->crtc;
519b514bee7SVincent Abriou 	if (crtc) {
520b514bee7SVincent Abriou 		seq_printf(s, "connected to %s path",
521b514bee7SVincent Abriou 			   sti_crtc_is_main(crtc) ? "main" : "aux");
522b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_DVO_SYNC_SEL);
523b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_DVO_CONFIG);
524b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_VIP_DVO);
525b514bee7SVincent Abriou 		tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_DVO));
526b514bee7SVincent Abriou 	} else {
527b514bee7SVincent Abriou 		seq_puts(s, "disabled");
528b514bee7SVincent Abriou 	}
529b514bee7SVincent Abriou 
530b514bee7SVincent Abriou 	seq_puts(s, "\n\n  HDA encoder: ");
531b514bee7SVincent Abriou 	crtc = tvout->hda->crtc;
532b514bee7SVincent Abriou 	if (crtc) {
533b514bee7SVincent Abriou 		seq_printf(s, "connected to %s path",
534b514bee7SVincent Abriou 			   sti_crtc_is_main(crtc) ? "main" : "aux");
535b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_HD_SYNC_SEL);
536b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_HD_DAC_CFG_OFF);
537b514bee7SVincent Abriou 		tvout_dbg_hd_dac_cfg(s,
538b514bee7SVincent Abriou 				     readl(tvout->regs + TVO_HD_DAC_CFG_OFF));
539b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_VIP_HDF);
540b514bee7SVincent Abriou 		tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDF));
541b514bee7SVincent Abriou 	} else {
542b514bee7SVincent Abriou 		seq_puts(s, "disabled");
543b514bee7SVincent Abriou 	}
544b514bee7SVincent Abriou 
545b514bee7SVincent Abriou 	seq_puts(s, "\n\n  main path configuration");
546b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M0);
547b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M1);
548b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M2);
549b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M3);
550b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M4);
551b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M5);
552b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M6);
553b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M7);
554b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_MAIN_IN_VID_FORMAT);
555b514bee7SVincent Abriou 
556b514bee7SVincent Abriou 	seq_puts(s, "\n\n  auxiliary path configuration");
557b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M0);
558b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M2);
559b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M3);
560b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M4);
561b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M5);
562b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M6);
563b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M7);
564b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_AUX_IN_VID_FORMAT);
565e9635133SMarkus Elfring 	seq_putc(s, '\n');
566b514bee7SVincent Abriou 	return 0;
567b514bee7SVincent Abriou }
568b514bee7SVincent Abriou 
569b514bee7SVincent Abriou static struct drm_info_list tvout_debugfs_files[] = {
570b514bee7SVincent Abriou 	{ "tvout", tvout_dbg_show, 0, NULL },
571b514bee7SVincent Abriou };
572b514bee7SVincent Abriou 
573b514bee7SVincent Abriou static int tvout_debugfs_init(struct sti_tvout *tvout, struct drm_minor *minor)
574b514bee7SVincent Abriou {
575b514bee7SVincent Abriou 	unsigned int i;
576b514bee7SVincent Abriou 
577b514bee7SVincent Abriou 	for (i = 0; i < ARRAY_SIZE(tvout_debugfs_files); i++)
578b514bee7SVincent Abriou 		tvout_debugfs_files[i].data = tvout;
579b514bee7SVincent Abriou 
580b514bee7SVincent Abriou 	return drm_debugfs_create_files(tvout_debugfs_files,
581b514bee7SVincent Abriou 					ARRAY_SIZE(tvout_debugfs_files),
582b514bee7SVincent Abriou 					minor->debugfs_root, minor);
583b514bee7SVincent Abriou }
584b514bee7SVincent Abriou 
585cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_dpms(struct drm_encoder *encoder, int mode)
586cdfbff78SBenjamin Gaignard {
587cdfbff78SBenjamin Gaignard }
588cdfbff78SBenjamin Gaignard 
589cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_mode_set(struct drm_encoder *encoder,
590cdfbff78SBenjamin Gaignard 				       struct drm_display_mode *mode,
591cdfbff78SBenjamin Gaignard 				       struct drm_display_mode *adjusted_mode)
592cdfbff78SBenjamin Gaignard {
593cdfbff78SBenjamin Gaignard }
594cdfbff78SBenjamin Gaignard 
595cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_destroy(struct drm_encoder *encoder)
596cdfbff78SBenjamin Gaignard {
597cdfbff78SBenjamin Gaignard 	struct sti_tvout_encoder *sti_encoder = to_sti_tvout_encoder(encoder);
598cdfbff78SBenjamin Gaignard 
599cdfbff78SBenjamin Gaignard 	drm_encoder_cleanup(encoder);
600cdfbff78SBenjamin Gaignard 	kfree(sti_encoder);
601cdfbff78SBenjamin Gaignard }
602cdfbff78SBenjamin Gaignard 
60383af0a48SBenjamin Gaignard static int sti_tvout_late_register(struct drm_encoder *encoder)
60483af0a48SBenjamin Gaignard {
60583af0a48SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
60683af0a48SBenjamin Gaignard 	int ret;
60783af0a48SBenjamin Gaignard 
60883af0a48SBenjamin Gaignard 	if (tvout->debugfs_registered)
60983af0a48SBenjamin Gaignard 		return 0;
61083af0a48SBenjamin Gaignard 
61183af0a48SBenjamin Gaignard 	ret = tvout_debugfs_init(tvout, encoder->dev->primary);
61283af0a48SBenjamin Gaignard 	if (ret)
61383af0a48SBenjamin Gaignard 		return ret;
61483af0a48SBenjamin Gaignard 
61583af0a48SBenjamin Gaignard 	tvout->debugfs_registered = true;
61683af0a48SBenjamin Gaignard 	return 0;
61783af0a48SBenjamin Gaignard }
61883af0a48SBenjamin Gaignard 
61983af0a48SBenjamin Gaignard static void sti_tvout_early_unregister(struct drm_encoder *encoder)
62083af0a48SBenjamin Gaignard {
62183af0a48SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
62283af0a48SBenjamin Gaignard 
62383af0a48SBenjamin Gaignard 	if (!tvout->debugfs_registered)
62483af0a48SBenjamin Gaignard 		return;
62583af0a48SBenjamin Gaignard 
62683af0a48SBenjamin Gaignard 	tvout->debugfs_registered = false;
62783af0a48SBenjamin Gaignard }
62883af0a48SBenjamin Gaignard 
629cdfbff78SBenjamin Gaignard static const struct drm_encoder_funcs sti_tvout_encoder_funcs = {
630cdfbff78SBenjamin Gaignard 	.destroy = sti_tvout_encoder_destroy,
63183af0a48SBenjamin Gaignard 	.late_register = sti_tvout_late_register,
63283af0a48SBenjamin Gaignard 	.early_unregister = sti_tvout_early_unregister,
633cdfbff78SBenjamin Gaignard };
634cdfbff78SBenjamin Gaignard 
63505a142c2SBich Hemon static void sti_dvo_encoder_enable(struct drm_encoder *encoder)
636f32c4c50SBenjamin Gaignard {
637f32c4c50SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
638f32c4c50SBenjamin Gaignard 
63905a142c2SBich Hemon 	tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
64005a142c2SBich Hemon 
6419e1f05b2SVincent Abriou 	tvout_dvo_start(tvout, sti_crtc_is_main(encoder->crtc));
642f32c4c50SBenjamin Gaignard }
643f32c4c50SBenjamin Gaignard 
644f32c4c50SBenjamin Gaignard static void sti_dvo_encoder_disable(struct drm_encoder *encoder)
645f32c4c50SBenjamin Gaignard {
646f32c4c50SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
647f32c4c50SBenjamin Gaignard 
648f32c4c50SBenjamin Gaignard 	/* Reset VIP register */
649f32c4c50SBenjamin Gaignard 	tvout_write(tvout, 0x0, TVO_VIP_DVO);
650f32c4c50SBenjamin Gaignard }
651f32c4c50SBenjamin Gaignard 
652f32c4c50SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_dvo_encoder_helper_funcs = {
653f32c4c50SBenjamin Gaignard 	.dpms = sti_tvout_encoder_dpms,
654f32c4c50SBenjamin Gaignard 	.mode_set = sti_tvout_encoder_mode_set,
65505a142c2SBich Hemon 	.enable = sti_dvo_encoder_enable,
656f32c4c50SBenjamin Gaignard 	.disable = sti_dvo_encoder_disable,
657f32c4c50SBenjamin Gaignard };
658f32c4c50SBenjamin Gaignard 
659f32c4c50SBenjamin Gaignard static struct drm_encoder *
660f32c4c50SBenjamin Gaignard sti_tvout_create_dvo_encoder(struct drm_device *dev,
661f32c4c50SBenjamin Gaignard 			     struct sti_tvout *tvout)
662f32c4c50SBenjamin Gaignard {
663f32c4c50SBenjamin Gaignard 	struct sti_tvout_encoder *encoder;
664f32c4c50SBenjamin Gaignard 	struct drm_encoder *drm_encoder;
665f32c4c50SBenjamin Gaignard 
666f32c4c50SBenjamin Gaignard 	encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
667f32c4c50SBenjamin Gaignard 	if (!encoder)
668f32c4c50SBenjamin Gaignard 		return NULL;
669f32c4c50SBenjamin Gaignard 
670f32c4c50SBenjamin Gaignard 	encoder->tvout = tvout;
671f32c4c50SBenjamin Gaignard 
6726234ba98SVille Syrjälä 	drm_encoder = &encoder->encoder;
673f32c4c50SBenjamin Gaignard 
674f32c4c50SBenjamin Gaignard 	drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
675f32c4c50SBenjamin Gaignard 
676f32c4c50SBenjamin Gaignard 	drm_encoder_init(dev, drm_encoder,
67713a3d91fSVille Syrjälä 			 &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_LVDS,
67813a3d91fSVille Syrjälä 			 NULL);
679f32c4c50SBenjamin Gaignard 
680f32c4c50SBenjamin Gaignard 	drm_encoder_helper_add(drm_encoder, &sti_dvo_encoder_helper_funcs);
681f32c4c50SBenjamin Gaignard 
682f32c4c50SBenjamin Gaignard 	return drm_encoder;
683f32c4c50SBenjamin Gaignard }
684f32c4c50SBenjamin Gaignard 
68505a142c2SBich Hemon static void sti_hda_encoder_enable(struct drm_encoder *encoder)
686cdfbff78SBenjamin Gaignard {
687cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
688cdfbff78SBenjamin Gaignard 
68905a142c2SBich Hemon 	tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
69005a142c2SBich Hemon 
6919e1f05b2SVincent Abriou 	tvout_hda_start(tvout, sti_crtc_is_main(encoder->crtc));
692cdfbff78SBenjamin Gaignard }
693cdfbff78SBenjamin Gaignard 
694cdfbff78SBenjamin Gaignard static void sti_hda_encoder_disable(struct drm_encoder *encoder)
695cdfbff78SBenjamin Gaignard {
696cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
697cdfbff78SBenjamin Gaignard 
698cdfbff78SBenjamin Gaignard 	/* reset VIP register */
699cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 0x0, TVO_VIP_HDF);
700cdfbff78SBenjamin Gaignard 
701cdfbff78SBenjamin Gaignard 	/* power down HD DAC */
702cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 1, TVO_HD_DAC_CFG_OFF);
703cdfbff78SBenjamin Gaignard }
704cdfbff78SBenjamin Gaignard 
705cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hda_encoder_helper_funcs = {
706cdfbff78SBenjamin Gaignard 	.dpms = sti_tvout_encoder_dpms,
707cdfbff78SBenjamin Gaignard 	.mode_set = sti_tvout_encoder_mode_set,
70805a142c2SBich Hemon 	.commit = sti_hda_encoder_enable,
709cdfbff78SBenjamin Gaignard 	.disable = sti_hda_encoder_disable,
710cdfbff78SBenjamin Gaignard };
711cdfbff78SBenjamin Gaignard 
712cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev,
713cdfbff78SBenjamin Gaignard 		struct sti_tvout *tvout)
714cdfbff78SBenjamin Gaignard {
715cdfbff78SBenjamin Gaignard 	struct sti_tvout_encoder *encoder;
716cdfbff78SBenjamin Gaignard 	struct drm_encoder *drm_encoder;
717cdfbff78SBenjamin Gaignard 
718cdfbff78SBenjamin Gaignard 	encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
719cdfbff78SBenjamin Gaignard 	if (!encoder)
720cdfbff78SBenjamin Gaignard 		return NULL;
721cdfbff78SBenjamin Gaignard 
722cdfbff78SBenjamin Gaignard 	encoder->tvout = tvout;
723cdfbff78SBenjamin Gaignard 
7246234ba98SVille Syrjälä 	drm_encoder = &encoder->encoder;
725cdfbff78SBenjamin Gaignard 
7265e03abc5SBenjamin Gaignard 	drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
727cdfbff78SBenjamin Gaignard 
728cdfbff78SBenjamin Gaignard 	drm_encoder_init(dev, drm_encoder,
72913a3d91fSVille Syrjälä 			&sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL);
730cdfbff78SBenjamin Gaignard 
731cdfbff78SBenjamin Gaignard 	drm_encoder_helper_add(drm_encoder, &sti_hda_encoder_helper_funcs);
732cdfbff78SBenjamin Gaignard 
733cdfbff78SBenjamin Gaignard 	return drm_encoder;
734cdfbff78SBenjamin Gaignard }
735cdfbff78SBenjamin Gaignard 
73605a142c2SBich Hemon static void sti_hdmi_encoder_enable(struct drm_encoder *encoder)
737cdfbff78SBenjamin Gaignard {
738cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
739cdfbff78SBenjamin Gaignard 
74005a142c2SBich Hemon 	tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
74105a142c2SBich Hemon 
7429e1f05b2SVincent Abriou 	tvout_hdmi_start(tvout, sti_crtc_is_main(encoder->crtc));
743cdfbff78SBenjamin Gaignard }
744cdfbff78SBenjamin Gaignard 
745cdfbff78SBenjamin Gaignard static void sti_hdmi_encoder_disable(struct drm_encoder *encoder)
746cdfbff78SBenjamin Gaignard {
747cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
748cdfbff78SBenjamin Gaignard 
749cdfbff78SBenjamin Gaignard 	/* reset VIP register */
750cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 0x0, TVO_VIP_HDMI);
751cdfbff78SBenjamin Gaignard }
752cdfbff78SBenjamin Gaignard 
753cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hdmi_encoder_helper_funcs = {
754cdfbff78SBenjamin Gaignard 	.dpms = sti_tvout_encoder_dpms,
755cdfbff78SBenjamin Gaignard 	.mode_set = sti_tvout_encoder_mode_set,
75605a142c2SBich Hemon 	.commit = sti_hdmi_encoder_enable,
757cdfbff78SBenjamin Gaignard 	.disable = sti_hdmi_encoder_disable,
758cdfbff78SBenjamin Gaignard };
759cdfbff78SBenjamin Gaignard 
760cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hdmi_encoder(struct drm_device *dev,
761cdfbff78SBenjamin Gaignard 		struct sti_tvout *tvout)
762cdfbff78SBenjamin Gaignard {
763cdfbff78SBenjamin Gaignard 	struct sti_tvout_encoder *encoder;
764cdfbff78SBenjamin Gaignard 	struct drm_encoder *drm_encoder;
765cdfbff78SBenjamin Gaignard 
766cdfbff78SBenjamin Gaignard 	encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
767cdfbff78SBenjamin Gaignard 	if (!encoder)
768cdfbff78SBenjamin Gaignard 		return NULL;
769cdfbff78SBenjamin Gaignard 
770cdfbff78SBenjamin Gaignard 	encoder->tvout = tvout;
771cdfbff78SBenjamin Gaignard 
7726234ba98SVille Syrjälä 	drm_encoder = &encoder->encoder;
773cdfbff78SBenjamin Gaignard 
7745e03abc5SBenjamin Gaignard 	drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
775cdfbff78SBenjamin Gaignard 
776cdfbff78SBenjamin Gaignard 	drm_encoder_init(dev, drm_encoder,
77713a3d91fSVille Syrjälä 			&sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS, NULL);
778cdfbff78SBenjamin Gaignard 
779cdfbff78SBenjamin Gaignard 	drm_encoder_helper_add(drm_encoder, &sti_hdmi_encoder_helper_funcs);
780cdfbff78SBenjamin Gaignard 
781cdfbff78SBenjamin Gaignard 	return drm_encoder;
782cdfbff78SBenjamin Gaignard }
783cdfbff78SBenjamin Gaignard 
784cdfbff78SBenjamin Gaignard static void sti_tvout_create_encoders(struct drm_device *dev,
785cdfbff78SBenjamin Gaignard 		struct sti_tvout *tvout)
786cdfbff78SBenjamin Gaignard {
787cdfbff78SBenjamin Gaignard 	tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout);
788cdfbff78SBenjamin Gaignard 	tvout->hda = sti_tvout_create_hda_encoder(dev, tvout);
789f32c4c50SBenjamin Gaignard 	tvout->dvo = sti_tvout_create_dvo_encoder(dev, tvout);
790113348d8SVille Syrjälä 
791113348d8SVille Syrjälä 	tvout->hdmi->possible_clones = drm_encoder_mask(tvout->hdmi) |
792113348d8SVille Syrjälä 		drm_encoder_mask(tvout->hda) | drm_encoder_mask(tvout->dvo);
793113348d8SVille Syrjälä 	tvout->hda->possible_clones = drm_encoder_mask(tvout->hdmi) |
794113348d8SVille Syrjälä 		drm_encoder_mask(tvout->hda) | drm_encoder_mask(tvout->dvo);
795113348d8SVille Syrjälä 	tvout->dvo->possible_clones = drm_encoder_mask(tvout->hdmi) |
796113348d8SVille Syrjälä 		drm_encoder_mask(tvout->hda) | drm_encoder_mask(tvout->dvo);
797cdfbff78SBenjamin Gaignard }
798cdfbff78SBenjamin Gaignard 
799cdfbff78SBenjamin Gaignard static void sti_tvout_destroy_encoders(struct sti_tvout *tvout)
800cdfbff78SBenjamin Gaignard {
801cdfbff78SBenjamin Gaignard 	if (tvout->hdmi)
802cdfbff78SBenjamin Gaignard 		drm_encoder_cleanup(tvout->hdmi);
803cdfbff78SBenjamin Gaignard 	tvout->hdmi = NULL;
804cdfbff78SBenjamin Gaignard 
805cdfbff78SBenjamin Gaignard 	if (tvout->hda)
806cdfbff78SBenjamin Gaignard 		drm_encoder_cleanup(tvout->hda);
807cdfbff78SBenjamin Gaignard 	tvout->hda = NULL;
8080a1dc29dSVincent Abriou 
8090a1dc29dSVincent Abriou 	if (tvout->dvo)
8100a1dc29dSVincent Abriou 		drm_encoder_cleanup(tvout->dvo);
8110a1dc29dSVincent Abriou 	tvout->dvo = NULL;
812cdfbff78SBenjamin Gaignard }
813cdfbff78SBenjamin Gaignard 
814cdfbff78SBenjamin Gaignard static int sti_tvout_bind(struct device *dev, struct device *master, void *data)
815cdfbff78SBenjamin Gaignard {
816cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = dev_get_drvdata(dev);
817cdfbff78SBenjamin Gaignard 	struct drm_device *drm_dev = data;
818cdfbff78SBenjamin Gaignard 
819cdfbff78SBenjamin Gaignard 	tvout->drm_dev = drm_dev;
820cdfbff78SBenjamin Gaignard 
821cdfbff78SBenjamin Gaignard 	sti_tvout_create_encoders(drm_dev, tvout);
822cdfbff78SBenjamin Gaignard 
82353bdcf5fSBenjamin Gaignard 	return 0;
824cdfbff78SBenjamin Gaignard }
825cdfbff78SBenjamin Gaignard 
826cdfbff78SBenjamin Gaignard static void sti_tvout_unbind(struct device *dev, struct device *master,
827cdfbff78SBenjamin Gaignard 	void *data)
828cdfbff78SBenjamin Gaignard {
82953bdcf5fSBenjamin Gaignard 	struct sti_tvout *tvout = dev_get_drvdata(dev);
83053bdcf5fSBenjamin Gaignard 
83153bdcf5fSBenjamin Gaignard 	sti_tvout_destroy_encoders(tvout);
832cdfbff78SBenjamin Gaignard }
833cdfbff78SBenjamin Gaignard 
834cdfbff78SBenjamin Gaignard static const struct component_ops sti_tvout_ops = {
835cdfbff78SBenjamin Gaignard 	.bind	= sti_tvout_bind,
836cdfbff78SBenjamin Gaignard 	.unbind	= sti_tvout_unbind,
837cdfbff78SBenjamin Gaignard };
838cdfbff78SBenjamin Gaignard 
839cdfbff78SBenjamin Gaignard static int sti_tvout_probe(struct platform_device *pdev)
840cdfbff78SBenjamin Gaignard {
841cdfbff78SBenjamin Gaignard 	struct device *dev = &pdev->dev;
842cdfbff78SBenjamin Gaignard 	struct device_node *node = dev->of_node;
843cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout;
844cdfbff78SBenjamin Gaignard 	struct resource *res;
845cdfbff78SBenjamin Gaignard 
846cdfbff78SBenjamin Gaignard 	DRM_INFO("%s\n", __func__);
847cdfbff78SBenjamin Gaignard 
848cdfbff78SBenjamin Gaignard 	if (!node)
849cdfbff78SBenjamin Gaignard 		return -ENODEV;
850cdfbff78SBenjamin Gaignard 
851cdfbff78SBenjamin Gaignard 	tvout = devm_kzalloc(dev, sizeof(*tvout), GFP_KERNEL);
852cdfbff78SBenjamin Gaignard 	if (!tvout)
853cdfbff78SBenjamin Gaignard 		return -ENOMEM;
854cdfbff78SBenjamin Gaignard 
855cdfbff78SBenjamin Gaignard 	tvout->dev = dev;
856cdfbff78SBenjamin Gaignard 
857bc435de5SMarkus Elfring 	/* get memory resources */
858cdfbff78SBenjamin Gaignard 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tvout-reg");
859cdfbff78SBenjamin Gaignard 	if (!res) {
860cdfbff78SBenjamin Gaignard 		DRM_ERROR("Invalid glue resource\n");
861cdfbff78SBenjamin Gaignard 		return -ENOMEM;
862cdfbff78SBenjamin Gaignard 	}
863cdfbff78SBenjamin Gaignard 	tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
86431f32a21SWei Yongjun 	if (!tvout->regs)
86531f32a21SWei Yongjun 		return -ENOMEM;
866cdfbff78SBenjamin Gaignard 
867cdfbff78SBenjamin Gaignard 	/* get reset resources */
868cdfbff78SBenjamin Gaignard 	tvout->reset = devm_reset_control_get(dev, "tvout");
869cdfbff78SBenjamin Gaignard 	/* take tvout out of reset */
870cdfbff78SBenjamin Gaignard 	if (!IS_ERR(tvout->reset))
871cdfbff78SBenjamin Gaignard 		reset_control_deassert(tvout->reset);
872cdfbff78SBenjamin Gaignard 
873cdfbff78SBenjamin Gaignard 	platform_set_drvdata(pdev, tvout);
874cdfbff78SBenjamin Gaignard 
875cdfbff78SBenjamin Gaignard 	return component_add(dev, &sti_tvout_ops);
876cdfbff78SBenjamin Gaignard }
877cdfbff78SBenjamin Gaignard 
878cdfbff78SBenjamin Gaignard static int sti_tvout_remove(struct platform_device *pdev)
879cdfbff78SBenjamin Gaignard {
880cdfbff78SBenjamin Gaignard 	component_del(&pdev->dev, &sti_tvout_ops);
881cdfbff78SBenjamin Gaignard 	return 0;
882cdfbff78SBenjamin Gaignard }
883cdfbff78SBenjamin Gaignard 
8848e932cf0SKiran Padwal static const struct of_device_id tvout_of_match[] = {
885cdfbff78SBenjamin Gaignard 	{ .compatible = "st,stih407-tvout", },
886cdfbff78SBenjamin Gaignard 	{ /* end node */ }
887cdfbff78SBenjamin Gaignard };
888cdfbff78SBenjamin Gaignard MODULE_DEVICE_TABLE(of, tvout_of_match);
889cdfbff78SBenjamin Gaignard 
890cdfbff78SBenjamin Gaignard struct platform_driver sti_tvout_driver = {
891cdfbff78SBenjamin Gaignard 	.driver = {
892cdfbff78SBenjamin Gaignard 		.name = "sti-tvout",
893cdfbff78SBenjamin Gaignard 		.owner = THIS_MODULE,
894cdfbff78SBenjamin Gaignard 		.of_match_table = tvout_of_match,
895cdfbff78SBenjamin Gaignard 	},
896cdfbff78SBenjamin Gaignard 	.probe = sti_tvout_probe,
897cdfbff78SBenjamin Gaignard 	.remove = sti_tvout_remove,
898cdfbff78SBenjamin Gaignard };
899cdfbff78SBenjamin Gaignard 
900cdfbff78SBenjamin Gaignard MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
901cdfbff78SBenjamin Gaignard MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
902cdfbff78SBenjamin Gaignard MODULE_LICENSE("GPL");
903