1 /* 2 * Copyright (C) STMicroelectronics SA 2014 3 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics. 4 * License terms: GNU General Public License (GPL), version 2 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/component.h> 9 #include <linux/hdmi.h> 10 #include <linux/module.h> 11 #include <linux/of_gpio.h> 12 #include <linux/platform_device.h> 13 #include <linux/reset.h> 14 15 #include <drm/drmP.h> 16 #include <drm/drm_crtc_helper.h> 17 #include <drm/drm_edid.h> 18 19 #include "sti_hdmi.h" 20 #include "sti_hdmi_tx3g4c28phy.h" 21 #include "sti_hdmi_tx3g0c55phy.h" 22 #include "sti_vtg.h" 23 24 #define HDMI_CFG 0x0000 25 #define HDMI_INT_EN 0x0004 26 #define HDMI_INT_STA 0x0008 27 #define HDMI_INT_CLR 0x000C 28 #define HDMI_STA 0x0010 29 #define HDMI_ACTIVE_VID_XMIN 0x0100 30 #define HDMI_ACTIVE_VID_XMAX 0x0104 31 #define HDMI_ACTIVE_VID_YMIN 0x0108 32 #define HDMI_ACTIVE_VID_YMAX 0x010C 33 #define HDMI_DFLT_CHL0_DAT 0x0110 34 #define HDMI_DFLT_CHL1_DAT 0x0114 35 #define HDMI_DFLT_CHL2_DAT 0x0118 36 #define HDMI_SW_DI_1_HEAD_WORD 0x0210 37 #define HDMI_SW_DI_1_PKT_WORD0 0x0214 38 #define HDMI_SW_DI_1_PKT_WORD1 0x0218 39 #define HDMI_SW_DI_1_PKT_WORD2 0x021C 40 #define HDMI_SW_DI_1_PKT_WORD3 0x0220 41 #define HDMI_SW_DI_1_PKT_WORD4 0x0224 42 #define HDMI_SW_DI_1_PKT_WORD5 0x0228 43 #define HDMI_SW_DI_1_PKT_WORD6 0x022C 44 #define HDMI_SW_DI_CFG 0x0230 45 46 #define HDMI_IFRAME_SLOT_AVI 1 47 48 #define XCAT(prefix, x, suffix) prefix ## x ## suffix 49 #define HDMI_SW_DI_N_HEAD_WORD(x) XCAT(HDMI_SW_DI_, x, _HEAD_WORD) 50 #define HDMI_SW_DI_N_PKT_WORD0(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD0) 51 #define HDMI_SW_DI_N_PKT_WORD1(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD1) 52 #define HDMI_SW_DI_N_PKT_WORD2(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD2) 53 #define HDMI_SW_DI_N_PKT_WORD3(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD3) 54 #define HDMI_SW_DI_N_PKT_WORD4(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD4) 55 #define HDMI_SW_DI_N_PKT_WORD5(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD5) 56 #define HDMI_SW_DI_N_PKT_WORD6(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD6) 57 58 #define HDMI_IFRAME_DISABLED 0x0 59 #define HDMI_IFRAME_SINGLE_SHOT 0x1 60 #define HDMI_IFRAME_FIELD 0x2 61 #define HDMI_IFRAME_FRAME 0x3 62 #define HDMI_IFRAME_MASK 0x3 63 #define HDMI_IFRAME_CFG_DI_N(x, n) ((x) << ((n-1)*4)) /* n from 1 to 6 */ 64 65 #define HDMI_CFG_DEVICE_EN BIT(0) 66 #define HDMI_CFG_HDMI_NOT_DVI BIT(1) 67 #define HDMI_CFG_HDCP_EN BIT(2) 68 #define HDMI_CFG_ESS_NOT_OESS BIT(3) 69 #define HDMI_CFG_H_SYNC_POL_NEG BIT(4) 70 #define HDMI_CFG_SINK_TERM_DET_EN BIT(5) 71 #define HDMI_CFG_V_SYNC_POL_NEG BIT(6) 72 #define HDMI_CFG_422_EN BIT(8) 73 #define HDMI_CFG_FIFO_OVERRUN_CLR BIT(12) 74 #define HDMI_CFG_FIFO_UNDERRUN_CLR BIT(13) 75 #define HDMI_CFG_SW_RST_EN BIT(31) 76 77 #define HDMI_INT_GLOBAL BIT(0) 78 #define HDMI_INT_SW_RST BIT(1) 79 #define HDMI_INT_PIX_CAP BIT(3) 80 #define HDMI_INT_HOT_PLUG BIT(4) 81 #define HDMI_INT_DLL_LCK BIT(5) 82 #define HDMI_INT_NEW_FRAME BIT(6) 83 #define HDMI_INT_GENCTRL_PKT BIT(7) 84 #define HDMI_INT_SINK_TERM_PRESENT BIT(11) 85 86 #define HDMI_DEFAULT_INT (HDMI_INT_SINK_TERM_PRESENT \ 87 | HDMI_INT_DLL_LCK \ 88 | HDMI_INT_HOT_PLUG \ 89 | HDMI_INT_GLOBAL) 90 91 #define HDMI_WORKING_INT (HDMI_INT_SINK_TERM_PRESENT \ 92 | HDMI_INT_GENCTRL_PKT \ 93 | HDMI_INT_NEW_FRAME \ 94 | HDMI_INT_DLL_LCK \ 95 | HDMI_INT_HOT_PLUG \ 96 | HDMI_INT_PIX_CAP \ 97 | HDMI_INT_SW_RST \ 98 | HDMI_INT_GLOBAL) 99 100 #define HDMI_STA_SW_RST BIT(1) 101 102 struct sti_hdmi_connector { 103 struct drm_connector drm_connector; 104 struct drm_encoder *encoder; 105 struct sti_hdmi *hdmi; 106 }; 107 108 #define to_sti_hdmi_connector(x) \ 109 container_of(x, struct sti_hdmi_connector, drm_connector) 110 111 u32 hdmi_read(struct sti_hdmi *hdmi, int offset) 112 { 113 return readl(hdmi->regs + offset); 114 } 115 116 void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset) 117 { 118 writel(val, hdmi->regs + offset); 119 } 120 121 /** 122 * HDMI interrupt handler threaded 123 * 124 * @irq: irq number 125 * @arg: connector structure 126 */ 127 static irqreturn_t hdmi_irq_thread(int irq, void *arg) 128 { 129 struct sti_hdmi *hdmi = arg; 130 131 /* Hot plug/unplug IRQ */ 132 if (hdmi->irq_status & HDMI_INT_HOT_PLUG) { 133 /* read gpio to get the status */ 134 hdmi->hpd = gpio_get_value(hdmi->hpd_gpio); 135 if (hdmi->drm_dev) 136 drm_helper_hpd_irq_event(hdmi->drm_dev); 137 } 138 139 /* Sw reset and PLL lock are exclusive so we can use the same 140 * event to signal them 141 */ 142 if (hdmi->irq_status & (HDMI_INT_SW_RST | HDMI_INT_DLL_LCK)) { 143 hdmi->event_received = true; 144 wake_up_interruptible(&hdmi->wait_event); 145 } 146 147 return IRQ_HANDLED; 148 } 149 150 /** 151 * HDMI interrupt handler 152 * 153 * @irq: irq number 154 * @arg: connector structure 155 */ 156 static irqreturn_t hdmi_irq(int irq, void *arg) 157 { 158 struct sti_hdmi *hdmi = arg; 159 160 /* read interrupt status */ 161 hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA); 162 163 /* clear interrupt status */ 164 hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR); 165 166 /* force sync bus write */ 167 hdmi_read(hdmi, HDMI_INT_STA); 168 169 return IRQ_WAKE_THREAD; 170 } 171 172 /** 173 * Set hdmi active area depending on the drm display mode selected 174 * 175 * @hdmi: pointer on the hdmi internal structure 176 */ 177 static void hdmi_active_area(struct sti_hdmi *hdmi) 178 { 179 u32 xmin, xmax; 180 u32 ymin, ymax; 181 182 xmin = sti_vtg_get_pixel_number(hdmi->mode, 0); 183 xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay - 1); 184 ymin = sti_vtg_get_line_number(hdmi->mode, 0); 185 ymax = sti_vtg_get_line_number(hdmi->mode, hdmi->mode.vdisplay - 1); 186 187 hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN); 188 hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX); 189 hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN); 190 hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX); 191 } 192 193 /** 194 * Overall hdmi configuration 195 * 196 * @hdmi: pointer on the hdmi internal structure 197 */ 198 static void hdmi_config(struct sti_hdmi *hdmi) 199 { 200 u32 conf; 201 202 DRM_DEBUG_DRIVER("\n"); 203 204 /* Clear overrun and underrun fifo */ 205 conf = HDMI_CFG_FIFO_OVERRUN_CLR | HDMI_CFG_FIFO_UNDERRUN_CLR; 206 207 /* Enable HDMI mode not DVI */ 208 conf |= HDMI_CFG_HDMI_NOT_DVI | HDMI_CFG_ESS_NOT_OESS; 209 210 /* Enable sink term detection */ 211 conf |= HDMI_CFG_SINK_TERM_DET_EN; 212 213 /* Set Hsync polarity */ 214 if (hdmi->mode.flags & DRM_MODE_FLAG_NHSYNC) { 215 DRM_DEBUG_DRIVER("H Sync Negative\n"); 216 conf |= HDMI_CFG_H_SYNC_POL_NEG; 217 } 218 219 /* Set Vsync polarity */ 220 if (hdmi->mode.flags & DRM_MODE_FLAG_NVSYNC) { 221 DRM_DEBUG_DRIVER("V Sync Negative\n"); 222 conf |= HDMI_CFG_V_SYNC_POL_NEG; 223 } 224 225 /* Enable HDMI */ 226 conf |= HDMI_CFG_DEVICE_EN; 227 228 hdmi_write(hdmi, conf, HDMI_CFG); 229 } 230 231 /** 232 * Prepare and configure the AVI infoframe 233 * 234 * AVI infoframe are transmitted at least once per two video field and 235 * contains information about HDMI transmission mode such as color space, 236 * colorimetry, ... 237 * 238 * @hdmi: pointer on the hdmi internal structure 239 * 240 * Return negative value if error occurs 241 */ 242 static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi) 243 { 244 struct drm_display_mode *mode = &hdmi->mode; 245 struct hdmi_avi_infoframe infoframe; 246 u8 buffer[HDMI_INFOFRAME_SIZE(AVI)]; 247 u8 *frame = buffer + HDMI_INFOFRAME_HEADER_SIZE; 248 u32 val; 249 int ret; 250 251 DRM_DEBUG_DRIVER("\n"); 252 253 ret = drm_hdmi_avi_infoframe_from_display_mode(&infoframe, mode); 254 if (ret < 0) { 255 DRM_ERROR("failed to setup AVI infoframe: %d\n", ret); 256 return ret; 257 } 258 259 /* fixed infoframe configuration not linked to the mode */ 260 infoframe.colorspace = HDMI_COLORSPACE_RGB; 261 infoframe.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; 262 infoframe.colorimetry = HDMI_COLORIMETRY_NONE; 263 264 ret = hdmi_avi_infoframe_pack(&infoframe, buffer, sizeof(buffer)); 265 if (ret < 0) { 266 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret); 267 return ret; 268 } 269 270 /* Disable transmission slot for AVI infoframe */ 271 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); 272 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, HDMI_IFRAME_SLOT_AVI); 273 hdmi_write(hdmi, val, HDMI_SW_DI_CFG); 274 275 /* Infoframe header */ 276 val = buffer[0x0]; 277 val |= buffer[0x1] << 8; 278 val |= buffer[0x2] << 16; 279 hdmi_write(hdmi, val, HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI)); 280 281 /* Infoframe packet bytes */ 282 val = frame[0x0]; 283 val |= frame[0x1] << 8; 284 val |= frame[0x2] << 16; 285 val |= frame[0x3] << 24; 286 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI)); 287 288 val = frame[0x4]; 289 val |= frame[0x5] << 8; 290 val |= frame[0x6] << 16; 291 val |= frame[0x7] << 24; 292 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD1(HDMI_IFRAME_SLOT_AVI)); 293 294 val = frame[0x8]; 295 val |= frame[0x9] << 8; 296 val |= frame[0xA] << 16; 297 val |= frame[0xB] << 24; 298 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD2(HDMI_IFRAME_SLOT_AVI)); 299 300 val = frame[0xC]; 301 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD3(HDMI_IFRAME_SLOT_AVI)); 302 303 /* Enable transmission slot for AVI infoframe 304 * According to the hdmi specification, AVI infoframe should be 305 * transmitted at least once per two video fields 306 */ 307 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); 308 val |= HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_FIELD, HDMI_IFRAME_SLOT_AVI); 309 hdmi_write(hdmi, val, HDMI_SW_DI_CFG); 310 311 return 0; 312 } 313 314 /** 315 * Software reset of the hdmi subsystem 316 * 317 * @hdmi: pointer on the hdmi internal structure 318 * 319 */ 320 #define HDMI_TIMEOUT_SWRESET 100 /*milliseconds */ 321 static void hdmi_swreset(struct sti_hdmi *hdmi) 322 { 323 u32 val; 324 325 DRM_DEBUG_DRIVER("\n"); 326 327 /* Enable hdmi_audio clock only during hdmi reset */ 328 if (clk_prepare_enable(hdmi->clk_audio)) 329 DRM_INFO("Failed to prepare/enable hdmi_audio clk\n"); 330 331 /* Sw reset */ 332 hdmi->event_received = false; 333 334 val = hdmi_read(hdmi, HDMI_CFG); 335 val |= HDMI_CFG_SW_RST_EN; 336 hdmi_write(hdmi, val, HDMI_CFG); 337 338 /* Wait reset completed */ 339 wait_event_interruptible_timeout(hdmi->wait_event, 340 hdmi->event_received == true, 341 msecs_to_jiffies 342 (HDMI_TIMEOUT_SWRESET)); 343 344 /* 345 * HDMI_STA_SW_RST bit is set to '1' when SW_RST bit in HDMI_CFG is 346 * set to '1' and clk_audio is running. 347 */ 348 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0) 349 DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n"); 350 351 val = hdmi_read(hdmi, HDMI_CFG); 352 val &= ~HDMI_CFG_SW_RST_EN; 353 hdmi_write(hdmi, val, HDMI_CFG); 354 355 /* Disable hdmi_audio clock. Not used anymore for drm purpose */ 356 clk_disable_unprepare(hdmi->clk_audio); 357 } 358 359 static void sti_hdmi_disable(struct drm_bridge *bridge) 360 { 361 struct sti_hdmi *hdmi = bridge->driver_private; 362 363 u32 val = hdmi_read(hdmi, HDMI_CFG); 364 365 if (!hdmi->enabled) 366 return; 367 368 DRM_DEBUG_DRIVER("\n"); 369 370 /* Disable HDMI */ 371 val &= ~HDMI_CFG_DEVICE_EN; 372 hdmi_write(hdmi, val, HDMI_CFG); 373 374 hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR); 375 376 /* Stop the phy */ 377 hdmi->phy_ops->stop(hdmi); 378 379 /* Set the default channel data to be a dark red */ 380 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT); 381 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT); 382 hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT); 383 384 /* Disable/unprepare hdmi clock */ 385 clk_disable_unprepare(hdmi->clk_phy); 386 clk_disable_unprepare(hdmi->clk_tmds); 387 clk_disable_unprepare(hdmi->clk_pix); 388 389 hdmi->enabled = false; 390 } 391 392 static void sti_hdmi_pre_enable(struct drm_bridge *bridge) 393 { 394 struct sti_hdmi *hdmi = bridge->driver_private; 395 396 DRM_DEBUG_DRIVER("\n"); 397 398 if (hdmi->enabled) 399 return; 400 401 /* Prepare/enable clocks */ 402 if (clk_prepare_enable(hdmi->clk_pix)) 403 DRM_ERROR("Failed to prepare/enable hdmi_pix clk\n"); 404 if (clk_prepare_enable(hdmi->clk_tmds)) 405 DRM_ERROR("Failed to prepare/enable hdmi_tmds clk\n"); 406 if (clk_prepare_enable(hdmi->clk_phy)) 407 DRM_ERROR("Failed to prepare/enable hdmi_rejec_pll clk\n"); 408 409 hdmi->enabled = true; 410 411 /* Program hdmi serializer and start phy */ 412 if (!hdmi->phy_ops->start(hdmi)) { 413 DRM_ERROR("Unable to start hdmi phy\n"); 414 return; 415 } 416 417 /* Program hdmi active area */ 418 hdmi_active_area(hdmi); 419 420 /* Enable working interrupts */ 421 hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN); 422 423 /* Program hdmi config */ 424 hdmi_config(hdmi); 425 426 /* Program AVI infoframe */ 427 if (hdmi_avi_infoframe_config(hdmi)) 428 DRM_ERROR("Unable to configure AVI infoframe\n"); 429 430 /* Sw reset */ 431 hdmi_swreset(hdmi); 432 } 433 434 static void sti_hdmi_set_mode(struct drm_bridge *bridge, 435 struct drm_display_mode *mode, 436 struct drm_display_mode *adjusted_mode) 437 { 438 struct sti_hdmi *hdmi = bridge->driver_private; 439 int ret; 440 441 DRM_DEBUG_DRIVER("\n"); 442 443 /* Copy the drm display mode in the connector local structure */ 444 memcpy(&hdmi->mode, mode, sizeof(struct drm_display_mode)); 445 446 /* Update clock framerate according to the selected mode */ 447 ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000); 448 if (ret < 0) { 449 DRM_ERROR("Cannot set rate (%dHz) for hdmi_pix clk\n", 450 mode->clock * 1000); 451 return; 452 } 453 ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000); 454 if (ret < 0) { 455 DRM_ERROR("Cannot set rate (%dHz) for hdmi_rejection_pll clk\n", 456 mode->clock * 1000); 457 return; 458 } 459 } 460 461 static void sti_hdmi_bridge_nope(struct drm_bridge *bridge) 462 { 463 /* do nothing */ 464 } 465 466 static void sti_hdmi_brigde_destroy(struct drm_bridge *bridge) 467 { 468 drm_bridge_cleanup(bridge); 469 kfree(bridge); 470 } 471 472 static const struct drm_bridge_funcs sti_hdmi_bridge_funcs = { 473 .pre_enable = sti_hdmi_pre_enable, 474 .enable = sti_hdmi_bridge_nope, 475 .disable = sti_hdmi_disable, 476 .post_disable = sti_hdmi_bridge_nope, 477 .mode_set = sti_hdmi_set_mode, 478 .destroy = sti_hdmi_brigde_destroy, 479 }; 480 481 static int sti_hdmi_connector_get_modes(struct drm_connector *connector) 482 { 483 struct i2c_adapter *i2c_adap; 484 struct edid *edid; 485 int count; 486 487 DRM_DEBUG_DRIVER("\n"); 488 489 i2c_adap = i2c_get_adapter(1); 490 if (!i2c_adap) 491 goto fail; 492 493 edid = drm_get_edid(connector, i2c_adap); 494 if (!edid) 495 goto fail; 496 497 count = drm_add_edid_modes(connector, edid); 498 drm_mode_connector_update_edid_property(connector, edid); 499 500 kfree(edid); 501 return count; 502 503 fail: 504 DRM_ERROR("Can not read HDMI EDID\n"); 505 return 0; 506 } 507 508 #define CLK_TOLERANCE_HZ 50 509 510 static int sti_hdmi_connector_mode_valid(struct drm_connector *connector, 511 struct drm_display_mode *mode) 512 { 513 int target = mode->clock * 1000; 514 int target_min = target - CLK_TOLERANCE_HZ; 515 int target_max = target + CLK_TOLERANCE_HZ; 516 int result; 517 struct sti_hdmi_connector *hdmi_connector 518 = to_sti_hdmi_connector(connector); 519 struct sti_hdmi *hdmi = hdmi_connector->hdmi; 520 521 522 result = clk_round_rate(hdmi->clk_pix, target); 523 524 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n", 525 target, result); 526 527 if ((result < target_min) || (result > target_max)) { 528 DRM_DEBUG_DRIVER("hdmi pixclk=%d not supported\n", target); 529 return MODE_BAD; 530 } 531 532 return MODE_OK; 533 } 534 535 struct drm_encoder *sti_hdmi_best_encoder(struct drm_connector *connector) 536 { 537 struct sti_hdmi_connector *hdmi_connector 538 = to_sti_hdmi_connector(connector); 539 540 /* Best encoder is the one associated during connector creation */ 541 return hdmi_connector->encoder; 542 } 543 544 static struct drm_connector_helper_funcs sti_hdmi_connector_helper_funcs = { 545 .get_modes = sti_hdmi_connector_get_modes, 546 .mode_valid = sti_hdmi_connector_mode_valid, 547 .best_encoder = sti_hdmi_best_encoder, 548 }; 549 550 /* get detection status of display device */ 551 static enum drm_connector_status 552 sti_hdmi_connector_detect(struct drm_connector *connector, bool force) 553 { 554 struct sti_hdmi_connector *hdmi_connector 555 = to_sti_hdmi_connector(connector); 556 struct sti_hdmi *hdmi = hdmi_connector->hdmi; 557 558 DRM_DEBUG_DRIVER("\n"); 559 560 if (hdmi->hpd) { 561 DRM_DEBUG_DRIVER("hdmi cable connected\n"); 562 return connector_status_connected; 563 } 564 565 DRM_DEBUG_DRIVER("hdmi cable disconnected\n"); 566 return connector_status_disconnected; 567 } 568 569 static void sti_hdmi_connector_destroy(struct drm_connector *connector) 570 { 571 struct sti_hdmi_connector *hdmi_connector 572 = to_sti_hdmi_connector(connector); 573 574 drm_connector_unregister(connector); 575 drm_connector_cleanup(connector); 576 kfree(hdmi_connector); 577 } 578 579 static struct drm_connector_funcs sti_hdmi_connector_funcs = { 580 .dpms = drm_helper_connector_dpms, 581 .fill_modes = drm_helper_probe_single_connector_modes, 582 .detect = sti_hdmi_connector_detect, 583 .destroy = sti_hdmi_connector_destroy, 584 }; 585 586 static struct drm_encoder *sti_hdmi_find_encoder(struct drm_device *dev) 587 { 588 struct drm_encoder *encoder; 589 590 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 591 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) 592 return encoder; 593 } 594 595 return NULL; 596 } 597 598 static int sti_hdmi_bind(struct device *dev, struct device *master, void *data) 599 { 600 struct sti_hdmi *hdmi = dev_get_drvdata(dev); 601 struct drm_device *drm_dev = data; 602 struct drm_encoder *encoder; 603 struct sti_hdmi_connector *connector; 604 struct drm_connector *drm_connector; 605 struct drm_bridge *bridge; 606 struct i2c_adapter *i2c_adap; 607 int err; 608 609 i2c_adap = i2c_get_adapter(1); 610 if (!i2c_adap) 611 return -EPROBE_DEFER; 612 613 /* Set the drm device handle */ 614 hdmi->drm_dev = drm_dev; 615 616 encoder = sti_hdmi_find_encoder(drm_dev); 617 if (!encoder) 618 return -ENOMEM; 619 620 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL); 621 if (!connector) 622 return -ENOMEM; 623 624 connector->hdmi = hdmi; 625 626 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL); 627 if (!bridge) 628 return -ENOMEM; 629 630 bridge->driver_private = hdmi; 631 drm_bridge_init(drm_dev, bridge, &sti_hdmi_bridge_funcs); 632 633 encoder->bridge = bridge; 634 connector->encoder = encoder; 635 636 drm_connector = (struct drm_connector *)connector; 637 638 drm_connector->polled = DRM_CONNECTOR_POLL_HPD; 639 640 drm_connector_init(drm_dev, drm_connector, 641 &sti_hdmi_connector_funcs, DRM_MODE_CONNECTOR_HDMIA); 642 drm_connector_helper_add(drm_connector, 643 &sti_hdmi_connector_helper_funcs); 644 645 err = drm_connector_register(drm_connector); 646 if (err) 647 goto err_connector; 648 649 err = drm_mode_connector_attach_encoder(drm_connector, encoder); 650 if (err) { 651 DRM_ERROR("Failed to attach a connector to a encoder\n"); 652 goto err_sysfs; 653 } 654 655 /* Enable default interrupts */ 656 hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN); 657 658 return 0; 659 660 err_sysfs: 661 drm_connector_unregister(drm_connector); 662 err_connector: 663 drm_bridge_cleanup(bridge); 664 drm_connector_cleanup(drm_connector); 665 return -EINVAL; 666 } 667 668 static void sti_hdmi_unbind(struct device *dev, 669 struct device *master, void *data) 670 { 671 /* do nothing */ 672 } 673 674 static const struct component_ops sti_hdmi_ops = { 675 .bind = sti_hdmi_bind, 676 .unbind = sti_hdmi_unbind, 677 }; 678 679 static const struct of_device_id hdmi_of_match[] = { 680 { 681 .compatible = "st,stih416-hdmi", 682 .data = &tx3g0c55phy_ops, 683 }, { 684 .compatible = "st,stih407-hdmi", 685 .data = &tx3g4c28phy_ops, 686 }, { 687 /* end node */ 688 } 689 }; 690 MODULE_DEVICE_TABLE(of, hdmi_of_match); 691 692 static int sti_hdmi_probe(struct platform_device *pdev) 693 { 694 struct device *dev = &pdev->dev; 695 struct sti_hdmi *hdmi; 696 struct device_node *np = dev->of_node; 697 struct resource *res; 698 int ret; 699 700 DRM_INFO("%s\n", __func__); 701 702 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL); 703 if (!hdmi) 704 return -ENOMEM; 705 706 hdmi->dev = pdev->dev; 707 708 /* Get resources */ 709 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi-reg"); 710 if (!res) { 711 DRM_ERROR("Invalid hdmi resource\n"); 712 return -ENOMEM; 713 } 714 hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); 715 if (!hdmi->regs) 716 return -ENOMEM; 717 718 if (of_device_is_compatible(np, "st,stih416-hdmi")) { 719 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 720 "syscfg"); 721 if (!res) { 722 DRM_ERROR("Invalid syscfg resource\n"); 723 return -ENOMEM; 724 } 725 hdmi->syscfg = devm_ioremap_nocache(dev, res->start, 726 resource_size(res)); 727 if (!hdmi->syscfg) 728 return -ENOMEM; 729 730 } 731 732 hdmi->phy_ops = (struct hdmi_phy_ops *) 733 of_match_node(hdmi_of_match, np)->data; 734 735 /* Get clock resources */ 736 hdmi->clk_pix = devm_clk_get(dev, "pix"); 737 if (IS_ERR(hdmi->clk_pix)) { 738 DRM_ERROR("Cannot get hdmi_pix clock\n"); 739 return PTR_ERR(hdmi->clk_pix); 740 } 741 742 hdmi->clk_tmds = devm_clk_get(dev, "tmds"); 743 if (IS_ERR(hdmi->clk_tmds)) { 744 DRM_ERROR("Cannot get hdmi_tmds clock\n"); 745 return PTR_ERR(hdmi->clk_tmds); 746 } 747 748 hdmi->clk_phy = devm_clk_get(dev, "phy"); 749 if (IS_ERR(hdmi->clk_phy)) { 750 DRM_ERROR("Cannot get hdmi_phy clock\n"); 751 return PTR_ERR(hdmi->clk_phy); 752 } 753 754 hdmi->clk_audio = devm_clk_get(dev, "audio"); 755 if (IS_ERR(hdmi->clk_audio)) { 756 DRM_ERROR("Cannot get hdmi_audio clock\n"); 757 return PTR_ERR(hdmi->clk_audio); 758 } 759 760 hdmi->hpd_gpio = of_get_named_gpio(np, "hdmi,hpd-gpio", 0); 761 if (hdmi->hpd_gpio < 0) { 762 DRM_ERROR("Failed to get hdmi hpd-gpio\n"); 763 return -EIO; 764 } 765 766 hdmi->hpd = gpio_get_value(hdmi->hpd_gpio); 767 768 init_waitqueue_head(&hdmi->wait_event); 769 770 hdmi->irq = platform_get_irq_byname(pdev, "irq"); 771 772 ret = devm_request_threaded_irq(dev, hdmi->irq, hdmi_irq, 773 hdmi_irq_thread, IRQF_ONESHOT, dev_name(dev), hdmi); 774 if (ret) { 775 DRM_ERROR("Failed to register HDMI interrupt\n"); 776 return ret; 777 } 778 779 hdmi->reset = devm_reset_control_get(dev, "hdmi"); 780 /* Take hdmi out of reset */ 781 if (!IS_ERR(hdmi->reset)) 782 reset_control_deassert(hdmi->reset); 783 784 platform_set_drvdata(pdev, hdmi); 785 786 return component_add(&pdev->dev, &sti_hdmi_ops); 787 } 788 789 static int sti_hdmi_remove(struct platform_device *pdev) 790 { 791 component_del(&pdev->dev, &sti_hdmi_ops); 792 return 0; 793 } 794 795 struct platform_driver sti_hdmi_driver = { 796 .driver = { 797 .name = "sti-hdmi", 798 .owner = THIS_MODULE, 799 .of_match_table = hdmi_of_match, 800 }, 801 .probe = sti_hdmi_probe, 802 .remove = sti_hdmi_remove, 803 }; 804 805 module_platform_driver(sti_hdmi_driver); 806 807 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); 808 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver"); 809 MODULE_LICENSE("GPL"); 810