1 /* 2 * Copyright (C) STMicroelectronics SA 2014 3 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics. 4 * License terms: GNU General Public License (GPL), version 2 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/component.h> 9 #include <linux/debugfs.h> 10 #include <linux/module.h> 11 #include <linux/of_gpio.h> 12 #include <linux/platform_device.h> 13 14 #include <drm/drmP.h> 15 #include <drm/drm_atomic_helper.h> 16 #include <drm/drm_crtc_helper.h> 17 #include <drm/drm_panel.h> 18 19 #include "sti_awg_utils.h" 20 #include "sti_drv.h" 21 #include "sti_mixer.h" 22 23 /* DVO registers */ 24 #define DVO_AWG_DIGSYNC_CTRL 0x0000 25 #define DVO_DOF_CFG 0x0004 26 #define DVO_LUT_PROG_LOW 0x0008 27 #define DVO_LUT_PROG_MID 0x000C 28 #define DVO_LUT_PROG_HIGH 0x0010 29 #define DVO_DIGSYNC_INSTR_I 0x0100 30 31 #define DVO_AWG_CTRL_EN BIT(0) 32 #define DVO_AWG_FRAME_BASED_SYNC BIT(2) 33 34 #define DVO_DOF_EN_LOWBYTE BIT(0) 35 #define DVO_DOF_EN_MIDBYTE BIT(1) 36 #define DVO_DOF_EN_HIGHBYTE BIT(2) 37 #define DVO_DOF_EN BIT(6) 38 #define DVO_DOF_MOD_COUNT_SHIFT 8 39 40 #define DVO_LUT_ZERO 0 41 #define DVO_LUT_Y_G 1 42 #define DVO_LUT_Y_G_DEL 2 43 #define DVO_LUT_CB_B 3 44 #define DVO_LUT_CB_B_DEL 4 45 #define DVO_LUT_CR_R 5 46 #define DVO_LUT_CR_R_DEL 6 47 #define DVO_LUT_HOLD 7 48 49 struct dvo_config { 50 u32 flags; 51 u32 lowbyte; 52 u32 midbyte; 53 u32 highbyte; 54 int (*awg_fwgen_fct)( 55 struct awg_code_generation_params *fw_gen_params, 56 struct awg_timing *timing); 57 }; 58 59 static struct dvo_config rgb_24bit_de_cfg = { 60 .flags = (0L << DVO_DOF_MOD_COUNT_SHIFT), 61 .lowbyte = DVO_LUT_CR_R, 62 .midbyte = DVO_LUT_Y_G, 63 .highbyte = DVO_LUT_CB_B, 64 .awg_fwgen_fct = sti_awg_generate_code_data_enable_mode, 65 }; 66 67 /** 68 * STI digital video output structure 69 * 70 * @dev: driver device 71 * @drm_dev: pointer to drm device 72 * @mode: current display mode selected 73 * @regs: dvo registers 74 * @clk_pix: pixel clock for dvo 75 * @clk: clock for dvo 76 * @clk_main_parent: dvo parent clock if main path used 77 * @clk_aux_parent: dvo parent clock if aux path used 78 * @panel_node: panel node reference from device tree 79 * @panel: reference to the panel connected to the dvo 80 * @enabled: true if dvo is enabled else false 81 * @encoder: drm_encoder it is bound 82 */ 83 struct sti_dvo { 84 struct device dev; 85 struct drm_device *drm_dev; 86 struct drm_display_mode mode; 87 void __iomem *regs; 88 struct clk *clk_pix; 89 struct clk *clk; 90 struct clk *clk_main_parent; 91 struct clk *clk_aux_parent; 92 struct device_node *panel_node; 93 struct drm_panel *panel; 94 struct dvo_config *config; 95 bool enabled; 96 struct drm_encoder *encoder; 97 struct drm_bridge *bridge; 98 }; 99 100 struct sti_dvo_connector { 101 struct drm_connector drm_connector; 102 struct drm_encoder *encoder; 103 struct sti_dvo *dvo; 104 }; 105 106 #define to_sti_dvo_connector(x) \ 107 container_of(x, struct sti_dvo_connector, drm_connector) 108 109 #define BLANKING_LEVEL 16 110 static int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code) 111 { 112 struct drm_display_mode *mode = &dvo->mode; 113 struct dvo_config *config = dvo->config; 114 struct awg_code_generation_params fw_gen_params; 115 struct awg_timing timing; 116 117 fw_gen_params.ram_code = ram_code; 118 fw_gen_params.instruction_offset = 0; 119 120 timing.total_lines = mode->vtotal; 121 timing.active_lines = mode->vdisplay; 122 timing.blanking_lines = mode->vsync_start - mode->vdisplay; 123 timing.trailing_lines = mode->vtotal - mode->vsync_start; 124 timing.total_pixels = mode->htotal; 125 timing.active_pixels = mode->hdisplay; 126 timing.blanking_pixels = mode->hsync_start - mode->hdisplay; 127 timing.trailing_pixels = mode->htotal - mode->hsync_start; 128 timing.blanking_level = BLANKING_LEVEL; 129 130 if (config->awg_fwgen_fct(&fw_gen_params, &timing)) { 131 DRM_ERROR("AWG firmware not properly generated\n"); 132 return -EINVAL; 133 } 134 135 *ram_size = fw_gen_params.instruction_offset; 136 137 return 0; 138 } 139 140 /* Configure AWG, writing instructions 141 * 142 * @dvo: pointer to DVO structure 143 * @awg_ram_code: pointer to AWG instructions table 144 * @nb: nb of AWG instructions 145 */ 146 static void dvo_awg_configure(struct sti_dvo *dvo, u32 *awg_ram_code, int nb) 147 { 148 int i; 149 150 DRM_DEBUG_DRIVER("\n"); 151 152 for (i = 0; i < nb; i++) 153 writel(awg_ram_code[i], 154 dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4); 155 for (i = nb; i < AWG_MAX_INST; i++) 156 writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4); 157 158 writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL); 159 } 160 161 #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \ 162 readl(dvo->regs + reg)) 163 164 static void dvo_dbg_awg_microcode(struct seq_file *s, void __iomem *reg) 165 { 166 unsigned int i; 167 168 seq_puts(s, "\n\n"); 169 seq_puts(s, " DVO AWG microcode:"); 170 for (i = 0; i < AWG_MAX_INST; i++) { 171 if (i % 8 == 0) 172 seq_printf(s, "\n %04X:", i); 173 seq_printf(s, " %04X", readl(reg + i * 4)); 174 } 175 } 176 177 static int dvo_dbg_show(struct seq_file *s, void *data) 178 { 179 struct drm_info_node *node = s->private; 180 struct sti_dvo *dvo = (struct sti_dvo *)node->info_ent->data; 181 182 seq_printf(s, "DVO: (vaddr = 0x%p)", dvo->regs); 183 DBGFS_DUMP(DVO_AWG_DIGSYNC_CTRL); 184 DBGFS_DUMP(DVO_DOF_CFG); 185 DBGFS_DUMP(DVO_LUT_PROG_LOW); 186 DBGFS_DUMP(DVO_LUT_PROG_MID); 187 DBGFS_DUMP(DVO_LUT_PROG_HIGH); 188 dvo_dbg_awg_microcode(s, dvo->regs + DVO_DIGSYNC_INSTR_I); 189 seq_putc(s, '\n'); 190 return 0; 191 } 192 193 static struct drm_info_list dvo_debugfs_files[] = { 194 { "dvo", dvo_dbg_show, 0, NULL }, 195 }; 196 197 static int dvo_debugfs_init(struct sti_dvo *dvo, struct drm_minor *minor) 198 { 199 unsigned int i; 200 201 for (i = 0; i < ARRAY_SIZE(dvo_debugfs_files); i++) 202 dvo_debugfs_files[i].data = dvo; 203 204 return drm_debugfs_create_files(dvo_debugfs_files, 205 ARRAY_SIZE(dvo_debugfs_files), 206 minor->debugfs_root, minor); 207 } 208 209 static void sti_dvo_disable(struct drm_bridge *bridge) 210 { 211 struct sti_dvo *dvo = bridge->driver_private; 212 213 if (!dvo->enabled) 214 return; 215 216 DRM_DEBUG_DRIVER("\n"); 217 218 if (dvo->config->awg_fwgen_fct) 219 writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL); 220 221 writel(0x00000000, dvo->regs + DVO_DOF_CFG); 222 223 if (dvo->panel) 224 dvo->panel->funcs->disable(dvo->panel); 225 226 /* Disable/unprepare dvo clock */ 227 clk_disable_unprepare(dvo->clk_pix); 228 clk_disable_unprepare(dvo->clk); 229 230 dvo->enabled = false; 231 } 232 233 static void sti_dvo_pre_enable(struct drm_bridge *bridge) 234 { 235 struct sti_dvo *dvo = bridge->driver_private; 236 struct dvo_config *config = dvo->config; 237 u32 val; 238 239 DRM_DEBUG_DRIVER("\n"); 240 241 if (dvo->enabled) 242 return; 243 244 /* Make sure DVO is disabled */ 245 writel(0x00000000, dvo->regs + DVO_DOF_CFG); 246 writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL); 247 248 if (config->awg_fwgen_fct) { 249 u8 nb_instr; 250 u32 awg_ram_code[AWG_MAX_INST]; 251 /* Configure AWG */ 252 if (!dvo_awg_generate_code(dvo, &nb_instr, awg_ram_code)) 253 dvo_awg_configure(dvo, awg_ram_code, nb_instr); 254 else 255 return; 256 } 257 258 /* Prepare/enable clocks */ 259 if (clk_prepare_enable(dvo->clk_pix)) 260 DRM_ERROR("Failed to prepare/enable dvo_pix clk\n"); 261 if (clk_prepare_enable(dvo->clk)) 262 DRM_ERROR("Failed to prepare/enable dvo clk\n"); 263 264 if (dvo->panel) 265 dvo->panel->funcs->enable(dvo->panel); 266 267 /* Set LUT */ 268 writel(config->lowbyte, dvo->regs + DVO_LUT_PROG_LOW); 269 writel(config->midbyte, dvo->regs + DVO_LUT_PROG_MID); 270 writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH); 271 272 /* Digital output formatter config */ 273 val = (config->flags | DVO_DOF_EN); 274 writel(val, dvo->regs + DVO_DOF_CFG); 275 276 dvo->enabled = true; 277 } 278 279 static void sti_dvo_set_mode(struct drm_bridge *bridge, 280 struct drm_display_mode *mode, 281 struct drm_display_mode *adjusted_mode) 282 { 283 struct sti_dvo *dvo = bridge->driver_private; 284 struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc); 285 int rate = mode->clock * 1000; 286 struct clk *clkp; 287 int ret; 288 289 DRM_DEBUG_DRIVER("\n"); 290 291 memcpy(&dvo->mode, mode, sizeof(struct drm_display_mode)); 292 293 /* According to the path used (main or aux), the dvo clocks should 294 * have a different parent clock. */ 295 if (mixer->id == STI_MIXER_MAIN) 296 clkp = dvo->clk_main_parent; 297 else 298 clkp = dvo->clk_aux_parent; 299 300 if (clkp) { 301 clk_set_parent(dvo->clk_pix, clkp); 302 clk_set_parent(dvo->clk, clkp); 303 } 304 305 /* DVO clocks = compositor clock */ 306 ret = clk_set_rate(dvo->clk_pix, rate); 307 if (ret < 0) { 308 DRM_ERROR("Cannot set rate (%dHz) for dvo_pix clk\n", rate); 309 return; 310 } 311 312 ret = clk_set_rate(dvo->clk, rate); 313 if (ret < 0) { 314 DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate); 315 return; 316 } 317 318 /* For now, we only support 24bit data enable (DE) synchro format */ 319 dvo->config = &rgb_24bit_de_cfg; 320 } 321 322 static void sti_dvo_bridge_nope(struct drm_bridge *bridge) 323 { 324 /* do nothing */ 325 } 326 327 static const struct drm_bridge_funcs sti_dvo_bridge_funcs = { 328 .pre_enable = sti_dvo_pre_enable, 329 .enable = sti_dvo_bridge_nope, 330 .disable = sti_dvo_disable, 331 .post_disable = sti_dvo_bridge_nope, 332 .mode_set = sti_dvo_set_mode, 333 }; 334 335 static int sti_dvo_connector_get_modes(struct drm_connector *connector) 336 { 337 struct sti_dvo_connector *dvo_connector 338 = to_sti_dvo_connector(connector); 339 struct sti_dvo *dvo = dvo_connector->dvo; 340 341 if (dvo->panel) 342 return dvo->panel->funcs->get_modes(dvo->panel); 343 344 return 0; 345 } 346 347 #define CLK_TOLERANCE_HZ 50 348 349 static int sti_dvo_connector_mode_valid(struct drm_connector *connector, 350 struct drm_display_mode *mode) 351 { 352 int target = mode->clock * 1000; 353 int target_min = target - CLK_TOLERANCE_HZ; 354 int target_max = target + CLK_TOLERANCE_HZ; 355 int result; 356 struct sti_dvo_connector *dvo_connector 357 = to_sti_dvo_connector(connector); 358 struct sti_dvo *dvo = dvo_connector->dvo; 359 360 result = clk_round_rate(dvo->clk_pix, target); 361 362 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n", 363 target, result); 364 365 if ((result < target_min) || (result > target_max)) { 366 DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target); 367 return MODE_BAD; 368 } 369 370 return MODE_OK; 371 } 372 373 static const 374 struct drm_connector_helper_funcs sti_dvo_connector_helper_funcs = { 375 .get_modes = sti_dvo_connector_get_modes, 376 .mode_valid = sti_dvo_connector_mode_valid, 377 }; 378 379 static enum drm_connector_status 380 sti_dvo_connector_detect(struct drm_connector *connector, bool force) 381 { 382 struct sti_dvo_connector *dvo_connector 383 = to_sti_dvo_connector(connector); 384 struct sti_dvo *dvo = dvo_connector->dvo; 385 386 DRM_DEBUG_DRIVER("\n"); 387 388 if (!dvo->panel) { 389 dvo->panel = of_drm_find_panel(dvo->panel_node); 390 if (dvo->panel) 391 drm_panel_attach(dvo->panel, connector); 392 } 393 394 if (dvo->panel) 395 return connector_status_connected; 396 397 return connector_status_disconnected; 398 } 399 400 static int sti_dvo_late_register(struct drm_connector *connector) 401 { 402 struct sti_dvo_connector *dvo_connector 403 = to_sti_dvo_connector(connector); 404 struct sti_dvo *dvo = dvo_connector->dvo; 405 406 if (dvo_debugfs_init(dvo, dvo->drm_dev->primary)) { 407 DRM_ERROR("DVO debugfs setup failed\n"); 408 return -EINVAL; 409 } 410 411 return 0; 412 } 413 414 static const struct drm_connector_funcs sti_dvo_connector_funcs = { 415 .fill_modes = drm_helper_probe_single_connector_modes, 416 .detect = sti_dvo_connector_detect, 417 .destroy = drm_connector_cleanup, 418 .reset = drm_atomic_helper_connector_reset, 419 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 420 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 421 .late_register = sti_dvo_late_register, 422 }; 423 424 static struct drm_encoder *sti_dvo_find_encoder(struct drm_device *dev) 425 { 426 struct drm_encoder *encoder; 427 428 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 429 if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS) 430 return encoder; 431 } 432 433 return NULL; 434 } 435 436 static int sti_dvo_bind(struct device *dev, struct device *master, void *data) 437 { 438 struct sti_dvo *dvo = dev_get_drvdata(dev); 439 struct drm_device *drm_dev = data; 440 struct drm_encoder *encoder; 441 struct sti_dvo_connector *connector; 442 struct drm_connector *drm_connector; 443 struct drm_bridge *bridge; 444 int err; 445 446 /* Set the drm device handle */ 447 dvo->drm_dev = drm_dev; 448 449 encoder = sti_dvo_find_encoder(drm_dev); 450 if (!encoder) 451 return -ENOMEM; 452 453 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL); 454 if (!connector) 455 return -ENOMEM; 456 457 connector->dvo = dvo; 458 459 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL); 460 if (!bridge) 461 return -ENOMEM; 462 463 bridge->driver_private = dvo; 464 bridge->funcs = &sti_dvo_bridge_funcs; 465 bridge->of_node = dvo->dev.of_node; 466 err = drm_bridge_add(bridge); 467 if (err) { 468 DRM_ERROR("Failed to add bridge\n"); 469 return err; 470 } 471 472 err = drm_bridge_attach(encoder, bridge, NULL); 473 if (err) { 474 DRM_ERROR("Failed to attach bridge\n"); 475 return err; 476 } 477 478 dvo->bridge = bridge; 479 connector->encoder = encoder; 480 dvo->encoder = encoder; 481 482 drm_connector = (struct drm_connector *)connector; 483 484 drm_connector->polled = DRM_CONNECTOR_POLL_HPD; 485 486 drm_connector_init(drm_dev, drm_connector, 487 &sti_dvo_connector_funcs, DRM_MODE_CONNECTOR_LVDS); 488 drm_connector_helper_add(drm_connector, 489 &sti_dvo_connector_helper_funcs); 490 491 err = drm_mode_connector_attach_encoder(drm_connector, encoder); 492 if (err) { 493 DRM_ERROR("Failed to attach a connector to a encoder\n"); 494 goto err_sysfs; 495 } 496 497 return 0; 498 499 err_sysfs: 500 drm_bridge_remove(bridge); 501 return -EINVAL; 502 } 503 504 static void sti_dvo_unbind(struct device *dev, 505 struct device *master, void *data) 506 { 507 struct sti_dvo *dvo = dev_get_drvdata(dev); 508 509 drm_bridge_remove(dvo->bridge); 510 } 511 512 static const struct component_ops sti_dvo_ops = { 513 .bind = sti_dvo_bind, 514 .unbind = sti_dvo_unbind, 515 }; 516 517 static int sti_dvo_probe(struct platform_device *pdev) 518 { 519 struct device *dev = &pdev->dev; 520 struct sti_dvo *dvo; 521 struct resource *res; 522 struct device_node *np = dev->of_node; 523 524 DRM_INFO("%s\n", __func__); 525 526 dvo = devm_kzalloc(dev, sizeof(*dvo), GFP_KERNEL); 527 if (!dvo) { 528 DRM_ERROR("Failed to allocate memory for DVO\n"); 529 return -ENOMEM; 530 } 531 532 dvo->dev = pdev->dev; 533 534 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dvo-reg"); 535 if (!res) { 536 DRM_ERROR("Invalid dvo resource\n"); 537 return -ENOMEM; 538 } 539 dvo->regs = devm_ioremap_nocache(dev, res->start, 540 resource_size(res)); 541 if (!dvo->regs) 542 return -ENOMEM; 543 544 dvo->clk_pix = devm_clk_get(dev, "dvo_pix"); 545 if (IS_ERR(dvo->clk_pix)) { 546 DRM_ERROR("Cannot get dvo_pix clock\n"); 547 return PTR_ERR(dvo->clk_pix); 548 } 549 550 dvo->clk = devm_clk_get(dev, "dvo"); 551 if (IS_ERR(dvo->clk)) { 552 DRM_ERROR("Cannot get dvo clock\n"); 553 return PTR_ERR(dvo->clk); 554 } 555 556 dvo->clk_main_parent = devm_clk_get(dev, "main_parent"); 557 if (IS_ERR(dvo->clk_main_parent)) { 558 DRM_DEBUG_DRIVER("Cannot get main_parent clock\n"); 559 dvo->clk_main_parent = NULL; 560 } 561 562 dvo->clk_aux_parent = devm_clk_get(dev, "aux_parent"); 563 if (IS_ERR(dvo->clk_aux_parent)) { 564 DRM_DEBUG_DRIVER("Cannot get aux_parent clock\n"); 565 dvo->clk_aux_parent = NULL; 566 } 567 568 dvo->panel_node = of_parse_phandle(np, "sti,panel", 0); 569 if (!dvo->panel_node) 570 DRM_ERROR("No panel associated to the dvo output\n"); 571 of_node_put(dvo->panel_node); 572 573 platform_set_drvdata(pdev, dvo); 574 575 return component_add(&pdev->dev, &sti_dvo_ops); 576 } 577 578 static int sti_dvo_remove(struct platform_device *pdev) 579 { 580 component_del(&pdev->dev, &sti_dvo_ops); 581 return 0; 582 } 583 584 static const struct of_device_id dvo_of_match[] = { 585 { .compatible = "st,stih407-dvo", }, 586 { /* end node */ } 587 }; 588 MODULE_DEVICE_TABLE(of, dvo_of_match); 589 590 struct platform_driver sti_dvo_driver = { 591 .driver = { 592 .name = "sti-dvo", 593 .owner = THIS_MODULE, 594 .of_match_table = dvo_of_match, 595 }, 596 .probe = sti_dvo_probe, 597 .remove = sti_dvo_remove, 598 }; 599 600 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); 601 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver"); 602 MODULE_LICENSE("GPL"); 603