xref: /openbmc/linux/drivers/gpu/drm/solomon/ssd130x.c (revision 747f7a29)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * DRM driver for Solomon SSD130x OLED displays
4  *
5  * Copyright 2022 Red Hat Inc.
6  * Author: Javier Martinez Canillas <javierm@redhat.com>
7  *
8  * Based on drivers/video/fbdev/ssd1307fb.c
9  * Copyright 2012 Free Electrons
10  */
11 
12 #include <linux/backlight.h>
13 #include <linux/bitfield.h>
14 #include <linux/bits.h>
15 #include <linux/delay.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/property.h>
18 #include <linux/pwm.h>
19 #include <linux/regulator/consumer.h>
20 
21 #include <drm/drm_atomic_helper.h>
22 #include <drm/drm_damage_helper.h>
23 #include <drm/drm_edid.h>
24 #include <drm/drm_fb_cma_helper.h>
25 #include <drm/drm_fb_helper.h>
26 #include <drm/drm_format_helper.h>
27 #include <drm/drm_framebuffer.h>
28 #include <drm/drm_gem_atomic_helper.h>
29 #include <drm/drm_gem_framebuffer_helper.h>
30 #include <drm/drm_gem_shmem_helper.h>
31 #include <drm/drm_managed.h>
32 #include <drm/drm_modes.h>
33 #include <drm/drm_rect.h>
34 #include <drm/drm_probe_helper.h>
35 
36 #include "ssd130x.h"
37 
38 #define DRIVER_NAME	"ssd130x"
39 #define DRIVER_DESC	"DRM driver for Solomon SSD130x OLED displays"
40 #define DRIVER_DATE	"20220131"
41 #define DRIVER_MAJOR	1
42 #define DRIVER_MINOR	0
43 
44 #define SSD130X_PAGE_COL_START_LOW		0x00
45 #define SSD130X_PAGE_COL_START_HIGH		0x10
46 #define SSD130X_SET_ADDRESS_MODE		0x20
47 #define SSD130X_SET_COL_RANGE			0x21
48 #define SSD130X_SET_PAGE_RANGE			0x22
49 #define SSD130X_CONTRAST			0x81
50 #define SSD130X_SET_LOOKUP_TABLE		0x91
51 #define SSD130X_CHARGE_PUMP			0x8d
52 #define SSD130X_SET_SEG_REMAP			0xa0
53 #define SSD130X_DISPLAY_OFF			0xae
54 #define SSD130X_SET_MULTIPLEX_RATIO		0xa8
55 #define SSD130X_DISPLAY_ON			0xaf
56 #define SSD130X_START_PAGE_ADDRESS		0xb0
57 #define SSD130X_SET_COM_SCAN_DIR		0xc0
58 #define SSD130X_SET_DISPLAY_OFFSET		0xd3
59 #define SSD130X_SET_CLOCK_FREQ			0xd5
60 #define SSD130X_SET_AREA_COLOR_MODE		0xd8
61 #define SSD130X_SET_PRECHARGE_PERIOD		0xd9
62 #define SSD130X_SET_COM_PINS_CONFIG		0xda
63 #define SSD130X_SET_VCOMH			0xdb
64 
65 #define SSD130X_PAGE_COL_START_MASK		GENMASK(3, 0)
66 #define SSD130X_PAGE_COL_START_HIGH_SET(val)	FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val) >> 4)
67 #define SSD130X_PAGE_COL_START_LOW_SET(val)	FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val))
68 #define SSD130X_START_PAGE_ADDRESS_MASK		GENMASK(2, 0)
69 #define SSD130X_START_PAGE_ADDRESS_SET(val)	FIELD_PREP(SSD130X_START_PAGE_ADDRESS_MASK, (val))
70 #define SSD130X_SET_SEG_REMAP_MASK		GENMASK(0, 0)
71 #define SSD130X_SET_SEG_REMAP_SET(val)		FIELD_PREP(SSD130X_SET_SEG_REMAP_MASK, (val))
72 #define SSD130X_SET_COM_SCAN_DIR_MASK		GENMASK(3, 3)
73 #define SSD130X_SET_COM_SCAN_DIR_SET(val)	FIELD_PREP(SSD130X_SET_COM_SCAN_DIR_MASK, (val))
74 #define SSD130X_SET_CLOCK_DIV_MASK		GENMASK(3, 0)
75 #define SSD130X_SET_CLOCK_DIV_SET(val)		FIELD_PREP(SSD130X_SET_CLOCK_DIV_MASK, (val))
76 #define SSD130X_SET_CLOCK_FREQ_MASK		GENMASK(7, 4)
77 #define SSD130X_SET_CLOCK_FREQ_SET(val)		FIELD_PREP(SSD130X_SET_CLOCK_FREQ_MASK, (val))
78 #define SSD130X_SET_PRECHARGE_PERIOD1_MASK	GENMASK(3, 0)
79 #define SSD130X_SET_PRECHARGE_PERIOD1_SET(val)	FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD1_MASK, (val))
80 #define SSD130X_SET_PRECHARGE_PERIOD2_MASK	GENMASK(7, 4)
81 #define SSD130X_SET_PRECHARGE_PERIOD2_SET(val)	FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD2_MASK, (val))
82 #define SSD130X_SET_COM_PINS_CONFIG1_MASK	GENMASK(4, 4)
83 #define SSD130X_SET_COM_PINS_CONFIG1_SET(val)	FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG1_MASK, !(val))
84 #define SSD130X_SET_COM_PINS_CONFIG2_MASK	GENMASK(5, 5)
85 #define SSD130X_SET_COM_PINS_CONFIG2_SET(val)	FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG2_MASK, (val))
86 
87 #define SSD130X_SET_ADDRESS_MODE_HORIZONTAL	0x00
88 #define SSD130X_SET_ADDRESS_MODE_VERTICAL	0x01
89 #define SSD130X_SET_ADDRESS_MODE_PAGE		0x02
90 
91 #define SSD130X_SET_AREA_COLOR_MODE_ENABLE	0x1e
92 #define SSD130X_SET_AREA_COLOR_MODE_LOW_POWER	0x05
93 
94 #define MAX_CONTRAST 255
95 
96 const struct ssd130x_deviceinfo ssd130x_variants[] = {
97 	[SH1106_ID] = {
98 		.default_vcomh = 0x40,
99 		.default_dclk_div = 1,
100 		.default_dclk_frq = 5,
101 		.page_mode_only = 1,
102 	},
103 	[SSD1305_ID] = {
104 		.default_vcomh = 0x34,
105 		.default_dclk_div = 1,
106 		.default_dclk_frq = 7,
107 	},
108 	[SSD1306_ID] = {
109 		.default_vcomh = 0x20,
110 		.default_dclk_div = 1,
111 		.default_dclk_frq = 8,
112 		.need_chargepump = 1,
113 	},
114 	[SSD1307_ID] = {
115 		.default_vcomh = 0x20,
116 		.default_dclk_div = 2,
117 		.default_dclk_frq = 12,
118 		.need_pwm = 1,
119 	},
120 	[SSD1309_ID] = {
121 		.default_vcomh = 0x34,
122 		.default_dclk_div = 1,
123 		.default_dclk_frq = 10,
124 	}
125 };
126 EXPORT_SYMBOL_NS_GPL(ssd130x_variants, DRM_SSD130X);
127 
128 static inline struct ssd130x_device *drm_to_ssd130x(struct drm_device *drm)
129 {
130 	return container_of(drm, struct ssd130x_device, drm);
131 }
132 
133 /*
134  * Helper to write data (SSD130X_DATA) to the device.
135  */
136 static int ssd130x_write_data(struct ssd130x_device *ssd130x, u8 *values, int count)
137 {
138 	return regmap_bulk_write(ssd130x->regmap, SSD130X_DATA, values, count);
139 }
140 
141 /*
142  * Helper to write command (SSD130X_COMMAND). The fist variadic argument
143  * is the command to write and the following are the command options.
144  *
145  * Note that the ssd130x protocol requires each command and option to be
146  * written as a SSD130X_COMMAND device register value. That is why a call
147  * to regmap_write(..., SSD130X_COMMAND, ...) is done for each argument.
148  */
149 static int ssd130x_write_cmd(struct ssd130x_device *ssd130x, int count,
150 			     /* u8 cmd, u8 option, ... */...)
151 {
152 	va_list ap;
153 	u8 value;
154 	int ret;
155 
156 	va_start(ap, count);
157 
158 	do {
159 		value = va_arg(ap, int);
160 		ret = regmap_write(ssd130x->regmap, SSD130X_COMMAND, value);
161 		if (ret)
162 			goto out_end;
163 	} while (--count);
164 
165 out_end:
166 	va_end(ap);
167 
168 	return ret;
169 }
170 
171 /* Set address range for horizontal/vertical addressing modes */
172 static int ssd130x_set_col_range(struct ssd130x_device *ssd130x,
173 				 u8 col_start, u8 cols)
174 {
175 	u8 col_end = col_start + cols - 1;
176 	int ret;
177 
178 	if (col_start == ssd130x->col_start && col_end == ssd130x->col_end)
179 		return 0;
180 
181 	ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_COL_RANGE, col_start, col_end);
182 	if (ret < 0)
183 		return ret;
184 
185 	ssd130x->col_start = col_start;
186 	ssd130x->col_end = col_end;
187 	return 0;
188 }
189 
190 static int ssd130x_set_page_range(struct ssd130x_device *ssd130x,
191 				  u8 page_start, u8 pages)
192 {
193 	u8 page_end = page_start + pages - 1;
194 	int ret;
195 
196 	if (page_start == ssd130x->page_start && page_end == ssd130x->page_end)
197 		return 0;
198 
199 	ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_PAGE_RANGE, page_start, page_end);
200 	if (ret < 0)
201 		return ret;
202 
203 	ssd130x->page_start = page_start;
204 	ssd130x->page_end = page_end;
205 	return 0;
206 }
207 
208 /* Set page and column start address for page addressing mode */
209 static int ssd130x_set_page_pos(struct ssd130x_device *ssd130x,
210 				u8 page_start, u8 col_start)
211 {
212 	int ret;
213 	u32 page, col_low, col_high;
214 
215 	page = SSD130X_START_PAGE_ADDRESS |
216 	       SSD130X_START_PAGE_ADDRESS_SET(page_start);
217 	col_low = SSD130X_PAGE_COL_START_LOW |
218 		  SSD130X_PAGE_COL_START_LOW_SET(col_start);
219 	col_high = SSD130X_PAGE_COL_START_HIGH |
220 		   SSD130X_PAGE_COL_START_HIGH_SET(col_start);
221 	ret = ssd130x_write_cmd(ssd130x, 3, page, col_low, col_high);
222 	if (ret < 0)
223 		return ret;
224 
225 	return 0;
226 }
227 
228 static int ssd130x_pwm_enable(struct ssd130x_device *ssd130x)
229 {
230 	struct device *dev = ssd130x->dev;
231 	struct pwm_state pwmstate;
232 
233 	ssd130x->pwm = pwm_get(dev, NULL);
234 	if (IS_ERR(ssd130x->pwm)) {
235 		dev_err(dev, "Could not get PWM from firmware description!\n");
236 		return PTR_ERR(ssd130x->pwm);
237 	}
238 
239 	pwm_init_state(ssd130x->pwm, &pwmstate);
240 	pwm_set_relative_duty_cycle(&pwmstate, 50, 100);
241 	pwm_apply_state(ssd130x->pwm, &pwmstate);
242 
243 	/* Enable the PWM */
244 	pwm_enable(ssd130x->pwm);
245 
246 	dev_dbg(dev, "Using PWM%d with a %lluns period.\n",
247 		ssd130x->pwm->pwm, pwm_get_period(ssd130x->pwm));
248 
249 	return 0;
250 }
251 
252 static void ssd130x_reset(struct ssd130x_device *ssd130x)
253 {
254 	if (!ssd130x->reset)
255 		return;
256 
257 	/* Reset the screen */
258 	gpiod_set_value_cansleep(ssd130x->reset, 1);
259 	udelay(4);
260 	gpiod_set_value_cansleep(ssd130x->reset, 0);
261 	udelay(4);
262 }
263 
264 static int ssd130x_power_on(struct ssd130x_device *ssd130x)
265 {
266 	struct device *dev = ssd130x->dev;
267 	int ret;
268 
269 	ssd130x_reset(ssd130x);
270 
271 	ret = regulator_enable(ssd130x->vcc_reg);
272 	if (ret) {
273 		dev_err(dev, "Failed to enable VCC: %d\n", ret);
274 		return ret;
275 	}
276 
277 	if (ssd130x->device_info->need_pwm) {
278 		ret = ssd130x_pwm_enable(ssd130x);
279 		if (ret) {
280 			dev_err(dev, "Failed to enable PWM: %d\n", ret);
281 			regulator_disable(ssd130x->vcc_reg);
282 			return ret;
283 		}
284 	}
285 
286 	return 0;
287 }
288 
289 static void ssd130x_power_off(struct ssd130x_device *ssd130x)
290 {
291 	pwm_disable(ssd130x->pwm);
292 	pwm_put(ssd130x->pwm);
293 
294 	regulator_disable(ssd130x->vcc_reg);
295 }
296 
297 static int ssd130x_init(struct ssd130x_device *ssd130x)
298 {
299 	u32 precharge, dclk, com_invdir, compins, chargepump, seg_remap;
300 	int ret;
301 
302 	/* Set initial contrast */
303 	ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CONTRAST, ssd130x->contrast);
304 	if (ret < 0)
305 		return ret;
306 
307 	/* Set segment re-map */
308 	seg_remap = (SSD130X_SET_SEG_REMAP |
309 		     SSD130X_SET_SEG_REMAP_SET(ssd130x->seg_remap));
310 	ret = ssd130x_write_cmd(ssd130x, 1, seg_remap);
311 	if (ret < 0)
312 		return ret;
313 
314 	/* Set COM direction */
315 	com_invdir = (SSD130X_SET_COM_SCAN_DIR |
316 		      SSD130X_SET_COM_SCAN_DIR_SET(ssd130x->com_invdir));
317 	ret = ssd130x_write_cmd(ssd130x,  1, com_invdir);
318 	if (ret < 0)
319 		return ret;
320 
321 	/* Set multiplex ratio value */
322 	ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_MULTIPLEX_RATIO, ssd130x->height - 1);
323 	if (ret < 0)
324 		return ret;
325 
326 	/* set display offset value */
327 	ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_DISPLAY_OFFSET, ssd130x->com_offset);
328 	if (ret < 0)
329 		return ret;
330 
331 	/* Set clock frequency */
332 	dclk = (SSD130X_SET_CLOCK_DIV_SET(ssd130x->dclk_div - 1) |
333 		SSD130X_SET_CLOCK_FREQ_SET(ssd130x->dclk_frq));
334 	ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_CLOCK_FREQ, dclk);
335 	if (ret < 0)
336 		return ret;
337 
338 	/* Set Area Color Mode ON/OFF & Low Power Display Mode */
339 	if (ssd130x->area_color_enable || ssd130x->low_power) {
340 		u32 mode = 0;
341 
342 		if (ssd130x->area_color_enable)
343 			mode |= SSD130X_SET_AREA_COLOR_MODE_ENABLE;
344 
345 		if (ssd130x->low_power)
346 			mode |= SSD130X_SET_AREA_COLOR_MODE_LOW_POWER;
347 
348 		ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_AREA_COLOR_MODE, mode);
349 		if (ret < 0)
350 			return ret;
351 	}
352 
353 	/* Set precharge period in number of ticks from the internal clock */
354 	precharge = (SSD130X_SET_PRECHARGE_PERIOD1_SET(ssd130x->prechargep1) |
355 		     SSD130X_SET_PRECHARGE_PERIOD2_SET(ssd130x->prechargep2));
356 	ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_PRECHARGE_PERIOD, precharge);
357 	if (ret < 0)
358 		return ret;
359 
360 	/* Set COM pins configuration */
361 	compins = BIT(1);
362 	compins |= (SSD130X_SET_COM_PINS_CONFIG1_SET(ssd130x->com_seq) |
363 		    SSD130X_SET_COM_PINS_CONFIG2_SET(ssd130x->com_lrremap));
364 	ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_COM_PINS_CONFIG, compins);
365 	if (ret < 0)
366 		return ret;
367 
368 	/* Set VCOMH */
369 	ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_VCOMH, ssd130x->vcomh);
370 	if (ret < 0)
371 		return ret;
372 
373 	/* Turn on the DC-DC Charge Pump */
374 	chargepump = BIT(4);
375 
376 	if (ssd130x->device_info->need_chargepump)
377 		chargepump |= BIT(2);
378 
379 	ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CHARGE_PUMP, chargepump);
380 	if (ret < 0)
381 		return ret;
382 
383 	/* Set lookup table */
384 	if (ssd130x->lookup_table_set) {
385 		int i;
386 
387 		ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_SET_LOOKUP_TABLE);
388 		if (ret < 0)
389 			return ret;
390 
391 		for (i = 0; i < ARRAY_SIZE(ssd130x->lookup_table); i++) {
392 			u8 val = ssd130x->lookup_table[i];
393 
394 			if (val < 31 || val > 63)
395 				dev_warn(ssd130x->dev,
396 					 "lookup table index %d value out of range 31 <= %d <= 63\n",
397 					 i, val);
398 			ret = ssd130x_write_cmd(ssd130x, 1, val);
399 			if (ret < 0)
400 				return ret;
401 		}
402 	}
403 
404 	/* Switch to page addressing mode */
405 	if (ssd130x->page_address_mode)
406 		return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE,
407 					 SSD130X_SET_ADDRESS_MODE_PAGE);
408 
409 	/* Switch to horizontal addressing mode */
410 	return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE,
411 				 SSD130X_SET_ADDRESS_MODE_HORIZONTAL);
412 }
413 
414 static int ssd130x_update_rect(struct ssd130x_device *ssd130x, u8 *buf,
415 			       struct drm_rect *rect)
416 {
417 	unsigned int x = rect->x1;
418 	unsigned int y = rect->y1;
419 	unsigned int width = drm_rect_width(rect);
420 	unsigned int height = drm_rect_height(rect);
421 	unsigned int line_length = DIV_ROUND_UP(width, 8);
422 	unsigned int pages = DIV_ROUND_UP(height, 8);
423 	struct drm_device *drm = &ssd130x->drm;
424 	u32 array_idx = 0;
425 	int ret, i, j, k;
426 	u8 *data_array = NULL;
427 
428 	drm_WARN_ONCE(drm, y % 8 != 0, "y must be aligned to screen page\n");
429 
430 	data_array = kcalloc(width, pages, GFP_KERNEL);
431 	if (!data_array)
432 		return -ENOMEM;
433 
434 	/*
435 	 * The screen is divided in pages, each having a height of 8
436 	 * pixels, and the width of the screen. When sending a byte of
437 	 * data to the controller, it gives the 8 bits for the current
438 	 * column. I.e, the first byte are the 8 bits of the first
439 	 * column, then the 8 bits for the second column, etc.
440 	 *
441 	 *
442 	 * Representation of the screen, assuming it is 5 bits
443 	 * wide. Each letter-number combination is a bit that controls
444 	 * one pixel.
445 	 *
446 	 * A0 A1 A2 A3 A4
447 	 * B0 B1 B2 B3 B4
448 	 * C0 C1 C2 C3 C4
449 	 * D0 D1 D2 D3 D4
450 	 * E0 E1 E2 E3 E4
451 	 * F0 F1 F2 F3 F4
452 	 * G0 G1 G2 G3 G4
453 	 * H0 H1 H2 H3 H4
454 	 *
455 	 * If you want to update this screen, you need to send 5 bytes:
456 	 *  (1) A0 B0 C0 D0 E0 F0 G0 H0
457 	 *  (2) A1 B1 C1 D1 E1 F1 G1 H1
458 	 *  (3) A2 B2 C2 D2 E2 F2 G2 H2
459 	 *  (4) A3 B3 C3 D3 E3 F3 G3 H3
460 	 *  (5) A4 B4 C4 D4 E4 F4 G4 H4
461 	 */
462 
463 	if (!ssd130x->page_address_mode) {
464 		/* Set address range for horizontal addressing mode */
465 		ret = ssd130x_set_col_range(ssd130x, ssd130x->col_offset + x, width);
466 		if (ret < 0)
467 			goto out_free;
468 
469 		ret = ssd130x_set_page_range(ssd130x, ssd130x->page_offset + y / 8, pages);
470 		if (ret < 0)
471 			goto out_free;
472 	}
473 
474 	for (i = 0; i < pages; i++) {
475 		int m = 8;
476 
477 		/* Last page may be partial */
478 		if (8 * (y / 8 + i + 1) > ssd130x->height)
479 			m = ssd130x->height % 8;
480 		for (j = 0; j < width; j++) {
481 			u8 data = 0;
482 
483 			for (k = 0; k < m; k++) {
484 				u8 byte = buf[(8 * i + k) * line_length + j / 8];
485 				u8 bit = (byte >> (j % 8)) & 1;
486 
487 				data |= bit << k;
488 			}
489 			data_array[array_idx++] = data;
490 		}
491 
492 		/*
493 		 * In page addressing mode, the start address needs to be reset,
494 		 * and each page then needs to be written out separately.
495 		 */
496 		if (ssd130x->page_address_mode) {
497 			ret = ssd130x_set_page_pos(ssd130x,
498 						   ssd130x->page_offset + i,
499 						   ssd130x->col_offset + x);
500 			if (ret < 0)
501 				goto out_free;
502 
503 			ret = ssd130x_write_data(ssd130x, data_array, width);
504 			if (ret < 0)
505 				goto out_free;
506 
507 			array_idx = 0;
508 		}
509 	}
510 
511 	/* Write out update in one go if we aren't using page addressing mode */
512 	if (!ssd130x->page_address_mode)
513 		ret = ssd130x_write_data(ssd130x, data_array, width * pages);
514 
515 out_free:
516 	kfree(data_array);
517 	return ret;
518 }
519 
520 static void ssd130x_clear_screen(struct ssd130x_device *ssd130x)
521 {
522 	u8 *buf = NULL;
523 	struct drm_rect fullscreen = {
524 		.x1 = 0,
525 		.x2 = ssd130x->width,
526 		.y1 = 0,
527 		.y2 = ssd130x->height,
528 	};
529 
530 	buf = kcalloc(DIV_ROUND_UP(ssd130x->width, 8), ssd130x->height,
531 		      GFP_KERNEL);
532 	if (!buf)
533 		return;
534 
535 	ssd130x_update_rect(ssd130x, buf, &fullscreen);
536 
537 	kfree(buf);
538 }
539 
540 static int ssd130x_fb_blit_rect(struct drm_framebuffer *fb, const struct iosys_map *map,
541 				struct drm_rect *rect)
542 {
543 	struct ssd130x_device *ssd130x = drm_to_ssd130x(fb->dev);
544 	void *vmap = map->vaddr; /* TODO: Use mapping abstraction properly */
545 	unsigned int dst_pitch;
546 	int ret = 0;
547 	u8 *buf = NULL;
548 
549 	/* Align y to display page boundaries */
550 	rect->y1 = round_down(rect->y1, 8);
551 	rect->y2 = min_t(unsigned int, round_up(rect->y2, 8), ssd130x->height);
552 
553 	dst_pitch = DIV_ROUND_UP(drm_rect_width(rect), 8);
554 	buf = kcalloc(dst_pitch, drm_rect_height(rect), GFP_KERNEL);
555 	if (!buf)
556 		return -ENOMEM;
557 
558 	drm_fb_xrgb8888_to_mono(buf, dst_pitch, vmap, fb, rect);
559 
560 	ssd130x_update_rect(ssd130x, buf, rect);
561 
562 	kfree(buf);
563 
564 	return ret;
565 }
566 
567 static int ssd130x_display_pipe_mode_valid(struct drm_simple_display_pipe *pipe,
568 					   const struct drm_display_mode *mode)
569 {
570 	struct ssd130x_device *ssd130x = drm_to_ssd130x(pipe->crtc.dev);
571 
572 	if (mode->hdisplay != ssd130x->mode.hdisplay &&
573 	    mode->vdisplay != ssd130x->mode.vdisplay)
574 		return MODE_ONE_SIZE;
575 
576 	if (mode->hdisplay != ssd130x->mode.hdisplay)
577 		return MODE_ONE_WIDTH;
578 
579 	if (mode->vdisplay != ssd130x->mode.vdisplay)
580 		return MODE_ONE_HEIGHT;
581 
582 	return MODE_OK;
583 }
584 
585 static void ssd130x_display_pipe_enable(struct drm_simple_display_pipe *pipe,
586 					struct drm_crtc_state *crtc_state,
587 					struct drm_plane_state *plane_state)
588 {
589 	struct ssd130x_device *ssd130x = drm_to_ssd130x(pipe->crtc.dev);
590 	struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
591 	struct drm_device *drm = &ssd130x->drm;
592 	int idx, ret;
593 
594 	ret = ssd130x_power_on(ssd130x);
595 	if (ret)
596 		return;
597 
598 	ret = ssd130x_init(ssd130x);
599 	if (ret)
600 		goto out_power_off;
601 
602 	if (!drm_dev_enter(drm, &idx))
603 		goto out_power_off;
604 
605 	ssd130x_fb_blit_rect(plane_state->fb, &shadow_plane_state->data[0], &plane_state->dst);
606 
607 	ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_ON);
608 
609 	backlight_enable(ssd130x->bl_dev);
610 
611 	drm_dev_exit(idx);
612 
613 	return;
614 out_power_off:
615 	ssd130x_power_off(ssd130x);
616 }
617 
618 static void ssd130x_display_pipe_disable(struct drm_simple_display_pipe *pipe)
619 {
620 	struct ssd130x_device *ssd130x = drm_to_ssd130x(pipe->crtc.dev);
621 	struct drm_device *drm = &ssd130x->drm;
622 	int idx;
623 
624 	if (!drm_dev_enter(drm, &idx))
625 		return;
626 
627 	ssd130x_clear_screen(ssd130x);
628 
629 	backlight_disable(ssd130x->bl_dev);
630 
631 	ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_OFF);
632 
633 	ssd130x_power_off(ssd130x);
634 
635 	drm_dev_exit(idx);
636 }
637 
638 static void ssd130x_display_pipe_update(struct drm_simple_display_pipe *pipe,
639 					struct drm_plane_state *old_plane_state)
640 {
641 	struct ssd130x_device *ssd130x = drm_to_ssd130x(pipe->crtc.dev);
642 	struct drm_plane_state *plane_state = pipe->plane.state;
643 	struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
644 	struct drm_framebuffer *fb = plane_state->fb;
645 	struct drm_device *drm = &ssd130x->drm;
646 	struct drm_rect src_clip, dst_clip;
647 	int idx;
648 
649 	if (!fb)
650 		return;
651 
652 	if (!pipe->crtc.state->active)
653 		return;
654 
655 	if (!drm_atomic_helper_damage_merged(old_plane_state, plane_state, &src_clip))
656 		return;
657 
658 	dst_clip = plane_state->dst;
659 	if (!drm_rect_intersect(&dst_clip, &src_clip))
660 		return;
661 
662 	if (!drm_dev_enter(drm, &idx))
663 		return;
664 
665 	ssd130x_fb_blit_rect(plane_state->fb, &shadow_plane_state->data[0], &dst_clip);
666 
667 	drm_dev_exit(idx);
668 }
669 
670 static const struct drm_simple_display_pipe_funcs ssd130x_pipe_funcs = {
671 	.mode_valid = ssd130x_display_pipe_mode_valid,
672 	.enable = ssd130x_display_pipe_enable,
673 	.disable = ssd130x_display_pipe_disable,
674 	.update = ssd130x_display_pipe_update,
675 	DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS,
676 };
677 
678 static int ssd130x_connector_get_modes(struct drm_connector *connector)
679 {
680 	struct ssd130x_device *ssd130x = drm_to_ssd130x(connector->dev);
681 	struct drm_display_mode *mode;
682 	struct device *dev = ssd130x->dev;
683 
684 	mode = drm_mode_duplicate(connector->dev, &ssd130x->mode);
685 	if (!mode) {
686 		dev_err(dev, "Failed to duplicated mode\n");
687 		return 0;
688 	}
689 
690 	drm_mode_probed_add(connector, mode);
691 	drm_set_preferred_mode(connector, mode->hdisplay, mode->vdisplay);
692 
693 	/* There is only a single mode */
694 	return 1;
695 }
696 
697 static const struct drm_connector_helper_funcs ssd130x_connector_helper_funcs = {
698 	.get_modes = ssd130x_connector_get_modes,
699 };
700 
701 static const struct drm_connector_funcs ssd130x_connector_funcs = {
702 	.reset = drm_atomic_helper_connector_reset,
703 	.fill_modes = drm_helper_probe_single_connector_modes,
704 	.destroy = drm_connector_cleanup,
705 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
706 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
707 };
708 
709 static const struct drm_mode_config_funcs ssd130x_mode_config_funcs = {
710 	.fb_create = drm_gem_fb_create_with_dirty,
711 	.atomic_check = drm_atomic_helper_check,
712 	.atomic_commit = drm_atomic_helper_commit,
713 };
714 
715 static const uint32_t ssd130x_formats[] = {
716 	DRM_FORMAT_XRGB8888,
717 };
718 
719 DEFINE_DRM_GEM_FOPS(ssd130x_fops);
720 
721 static const struct drm_driver ssd130x_drm_driver = {
722 	DRM_GEM_SHMEM_DRIVER_OPS,
723 	.name			= DRIVER_NAME,
724 	.desc			= DRIVER_DESC,
725 	.date			= DRIVER_DATE,
726 	.major			= DRIVER_MAJOR,
727 	.minor			= DRIVER_MINOR,
728 	.driver_features	= DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET,
729 	.fops			= &ssd130x_fops,
730 };
731 
732 static int ssd130x_update_bl(struct backlight_device *bdev)
733 {
734 	struct ssd130x_device *ssd130x = bl_get_data(bdev);
735 	int brightness = backlight_get_brightness(bdev);
736 	int ret;
737 
738 	ssd130x->contrast = brightness;
739 
740 	ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_CONTRAST);
741 	if (ret < 0)
742 		return ret;
743 
744 	ret = ssd130x_write_cmd(ssd130x, 1, ssd130x->contrast);
745 	if (ret < 0)
746 		return ret;
747 
748 	return 0;
749 }
750 
751 static const struct backlight_ops ssd130xfb_bl_ops = {
752 	.update_status	= ssd130x_update_bl,
753 };
754 
755 static void ssd130x_parse_properties(struct ssd130x_device *ssd130x)
756 {
757 	struct device *dev = ssd130x->dev;
758 
759 	if (device_property_read_u32(dev, "solomon,width", &ssd130x->width))
760 		ssd130x->width = 96;
761 
762 	if (device_property_read_u32(dev, "solomon,height", &ssd130x->height))
763 		ssd130x->height = 16;
764 
765 	if (device_property_read_u32(dev, "solomon,page-offset", &ssd130x->page_offset))
766 		ssd130x->page_offset = 1;
767 
768 	if (device_property_read_u32(dev, "solomon,col-offset", &ssd130x->col_offset))
769 		ssd130x->col_offset = 0;
770 
771 	if (device_property_read_u32(dev, "solomon,com-offset", &ssd130x->com_offset))
772 		ssd130x->com_offset = 0;
773 
774 	if (device_property_read_u32(dev, "solomon,prechargep1", &ssd130x->prechargep1))
775 		ssd130x->prechargep1 = 2;
776 
777 	if (device_property_read_u32(dev, "solomon,prechargep2", &ssd130x->prechargep2))
778 		ssd130x->prechargep2 = 2;
779 
780 	if (!device_property_read_u8_array(dev, "solomon,lookup-table",
781 					   ssd130x->lookup_table,
782 					   ARRAY_SIZE(ssd130x->lookup_table)))
783 		ssd130x->lookup_table_set = 1;
784 
785 	ssd130x->seg_remap = !device_property_read_bool(dev, "solomon,segment-no-remap");
786 	ssd130x->com_seq = device_property_read_bool(dev, "solomon,com-seq");
787 	ssd130x->com_lrremap = device_property_read_bool(dev, "solomon,com-lrremap");
788 	ssd130x->com_invdir = device_property_read_bool(dev, "solomon,com-invdir");
789 	ssd130x->area_color_enable =
790 		device_property_read_bool(dev, "solomon,area-color-enable");
791 	ssd130x->low_power = device_property_read_bool(dev, "solomon,low-power");
792 
793 	ssd130x->contrast = 127;
794 	ssd130x->vcomh = ssd130x->device_info->default_vcomh;
795 
796 	/* Setup display timing */
797 	if (device_property_read_u32(dev, "solomon,dclk-div", &ssd130x->dclk_div))
798 		ssd130x->dclk_div = ssd130x->device_info->default_dclk_div;
799 	if (device_property_read_u32(dev, "solomon,dclk-frq", &ssd130x->dclk_frq))
800 		ssd130x->dclk_frq = ssd130x->device_info->default_dclk_frq;
801 }
802 
803 static int ssd130x_init_modeset(struct ssd130x_device *ssd130x)
804 {
805 	struct drm_display_mode *mode = &ssd130x->mode;
806 	struct device *dev = ssd130x->dev;
807 	struct drm_device *drm = &ssd130x->drm;
808 	unsigned long max_width, max_height;
809 	int ret;
810 
811 	ret = drmm_mode_config_init(drm);
812 	if (ret) {
813 		dev_err(dev, "DRM mode config init failed: %d\n", ret);
814 		return ret;
815 	}
816 
817 	mode->type = DRM_MODE_TYPE_DRIVER;
818 	mode->clock = 1;
819 	mode->hdisplay = mode->htotal = ssd130x->width;
820 	mode->hsync_start = mode->hsync_end = ssd130x->width;
821 	mode->vdisplay = mode->vtotal = ssd130x->height;
822 	mode->vsync_start = mode->vsync_end = ssd130x->height;
823 	mode->width_mm = 27;
824 	mode->height_mm = 27;
825 
826 	max_width = max_t(unsigned long, mode->hdisplay, DRM_SHADOW_PLANE_MAX_WIDTH);
827 	max_height = max_t(unsigned long, mode->vdisplay, DRM_SHADOW_PLANE_MAX_HEIGHT);
828 
829 	drm->mode_config.min_width = mode->hdisplay;
830 	drm->mode_config.max_width = max_width;
831 	drm->mode_config.min_height = mode->vdisplay;
832 	drm->mode_config.max_height = max_height;
833 	drm->mode_config.preferred_depth = 32;
834 	drm->mode_config.funcs = &ssd130x_mode_config_funcs;
835 
836 	ret = drm_connector_init(drm, &ssd130x->connector, &ssd130x_connector_funcs,
837 				 DRM_MODE_CONNECTOR_Unknown);
838 	if (ret) {
839 		dev_err(dev, "DRM connector init failed: %d\n", ret);
840 		return ret;
841 	}
842 
843 	drm_connector_helper_add(&ssd130x->connector, &ssd130x_connector_helper_funcs);
844 
845 	ret = drm_simple_display_pipe_init(drm, &ssd130x->pipe, &ssd130x_pipe_funcs,
846 					   ssd130x_formats, ARRAY_SIZE(ssd130x_formats),
847 					   NULL, &ssd130x->connector);
848 	if (ret) {
849 		dev_err(dev, "DRM simple display pipeline init failed: %d\n", ret);
850 		return ret;
851 	}
852 
853 	drm_plane_enable_fb_damage_clips(&ssd130x->pipe.plane);
854 
855 	drm_mode_config_reset(drm);
856 
857 	return 0;
858 }
859 
860 static int ssd130x_get_resources(struct ssd130x_device *ssd130x)
861 {
862 	struct device *dev = ssd130x->dev;
863 
864 	ssd130x->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
865 	if (IS_ERR(ssd130x->reset))
866 		return dev_err_probe(dev, PTR_ERR(ssd130x->reset),
867 				     "Failed to get reset gpio\n");
868 
869 	ssd130x->vcc_reg = devm_regulator_get(dev, "vcc");
870 	if (IS_ERR(ssd130x->vcc_reg))
871 		return dev_err_probe(dev, PTR_ERR(ssd130x->vcc_reg),
872 				     "Failed to get VCC regulator\n");
873 
874 	return 0;
875 }
876 
877 struct ssd130x_device *ssd130x_probe(struct device *dev, struct regmap *regmap)
878 {
879 	struct ssd130x_device *ssd130x;
880 	struct backlight_device *bl;
881 	struct drm_device *drm;
882 	int ret;
883 
884 	ssd130x = devm_drm_dev_alloc(dev, &ssd130x_drm_driver,
885 				     struct ssd130x_device, drm);
886 	if (IS_ERR(ssd130x))
887 		return ERR_PTR(dev_err_probe(dev, PTR_ERR(ssd130x),
888 					     "Failed to allocate DRM device\n"));
889 
890 	drm = &ssd130x->drm;
891 
892 	ssd130x->dev = dev;
893 	ssd130x->regmap = regmap;
894 	ssd130x->device_info = device_get_match_data(dev);
895 
896 	if (ssd130x->device_info->page_mode_only)
897 		ssd130x->page_address_mode = 1;
898 
899 	ssd130x_parse_properties(ssd130x);
900 
901 	ret = ssd130x_get_resources(ssd130x);
902 	if (ret)
903 		return ERR_PTR(ret);
904 
905 	bl = devm_backlight_device_register(dev, dev_name(dev), dev, ssd130x,
906 					    &ssd130xfb_bl_ops, NULL);
907 	if (IS_ERR(bl))
908 		return ERR_PTR(dev_err_probe(dev, PTR_ERR(bl),
909 					     "Unable to register backlight device\n"));
910 
911 	bl->props.brightness = ssd130x->contrast;
912 	bl->props.max_brightness = MAX_CONTRAST;
913 	ssd130x->bl_dev = bl;
914 
915 	ret = ssd130x_init_modeset(ssd130x);
916 	if (ret)
917 		return ERR_PTR(ret);
918 
919 	ret = drm_dev_register(drm, 0);
920 	if (ret)
921 		return ERR_PTR(dev_err_probe(dev, ret, "DRM device register failed\n"));
922 
923 	drm_fbdev_generic_setup(drm, 0);
924 
925 	return ssd130x;
926 }
927 EXPORT_SYMBOL_GPL(ssd130x_probe);
928 
929 void ssd130x_remove(struct ssd130x_device *ssd130x)
930 {
931 	drm_dev_unplug(&ssd130x->drm);
932 }
933 EXPORT_SYMBOL_GPL(ssd130x_remove);
934 
935 void ssd130x_shutdown(struct ssd130x_device *ssd130x)
936 {
937 	drm_atomic_helper_shutdown(&ssd130x->drm);
938 }
939 EXPORT_SYMBOL_GPL(ssd130x_shutdown);
940 
941 MODULE_DESCRIPTION(DRIVER_DESC);
942 MODULE_AUTHOR("Javier Martinez Canillas <javierm@redhat.com>");
943 MODULE_LICENSE("GPL v2");
944