1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * DRM driver for Solomon SSD130x OLED displays 4 * 5 * Copyright 2022 Red Hat Inc. 6 * Author: Javier Martinez Canillas <javierm@redhat.com> 7 * 8 * Based on drivers/video/fbdev/ssd1307fb.c 9 * Copyright 2012 Free Electrons 10 */ 11 12 #include <linux/backlight.h> 13 #include <linux/bitfield.h> 14 #include <linux/bits.h> 15 #include <linux/delay.h> 16 #include <linux/gpio/consumer.h> 17 #include <linux/property.h> 18 #include <linux/pwm.h> 19 #include <linux/regulator/consumer.h> 20 21 #include <drm/drm_atomic.h> 22 #include <drm/drm_atomic_helper.h> 23 #include <drm/drm_crtc_helper.h> 24 #include <drm/drm_damage_helper.h> 25 #include <drm/drm_edid.h> 26 #include <drm/drm_fbdev_generic.h> 27 #include <drm/drm_format_helper.h> 28 #include <drm/drm_framebuffer.h> 29 #include <drm/drm_gem_atomic_helper.h> 30 #include <drm/drm_gem_framebuffer_helper.h> 31 #include <drm/drm_gem_shmem_helper.h> 32 #include <drm/drm_managed.h> 33 #include <drm/drm_modes.h> 34 #include <drm/drm_rect.h> 35 #include <drm/drm_probe_helper.h> 36 37 #include "ssd130x.h" 38 39 #define DRIVER_NAME "ssd130x" 40 #define DRIVER_DESC "DRM driver for Solomon SSD130x OLED displays" 41 #define DRIVER_DATE "20220131" 42 #define DRIVER_MAJOR 1 43 #define DRIVER_MINOR 0 44 45 #define SSD130X_PAGE_COL_START_LOW 0x00 46 #define SSD130X_PAGE_COL_START_HIGH 0x10 47 #define SSD130X_SET_ADDRESS_MODE 0x20 48 #define SSD130X_SET_COL_RANGE 0x21 49 #define SSD130X_SET_PAGE_RANGE 0x22 50 #define SSD130X_CONTRAST 0x81 51 #define SSD130X_SET_LOOKUP_TABLE 0x91 52 #define SSD130X_CHARGE_PUMP 0x8d 53 #define SSD130X_SET_SEG_REMAP 0xa0 54 #define SSD130X_DISPLAY_OFF 0xae 55 #define SSD130X_SET_MULTIPLEX_RATIO 0xa8 56 #define SSD130X_DISPLAY_ON 0xaf 57 #define SSD130X_START_PAGE_ADDRESS 0xb0 58 #define SSD130X_SET_COM_SCAN_DIR 0xc0 59 #define SSD130X_SET_DISPLAY_OFFSET 0xd3 60 #define SSD130X_SET_CLOCK_FREQ 0xd5 61 #define SSD130X_SET_AREA_COLOR_MODE 0xd8 62 #define SSD130X_SET_PRECHARGE_PERIOD 0xd9 63 #define SSD130X_SET_COM_PINS_CONFIG 0xda 64 #define SSD130X_SET_VCOMH 0xdb 65 66 #define SSD130X_PAGE_COL_START_MASK GENMASK(3, 0) 67 #define SSD130X_PAGE_COL_START_HIGH_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val) >> 4) 68 #define SSD130X_PAGE_COL_START_LOW_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val)) 69 #define SSD130X_START_PAGE_ADDRESS_MASK GENMASK(2, 0) 70 #define SSD130X_START_PAGE_ADDRESS_SET(val) FIELD_PREP(SSD130X_START_PAGE_ADDRESS_MASK, (val)) 71 #define SSD130X_SET_SEG_REMAP_MASK GENMASK(0, 0) 72 #define SSD130X_SET_SEG_REMAP_SET(val) FIELD_PREP(SSD130X_SET_SEG_REMAP_MASK, (val)) 73 #define SSD130X_SET_COM_SCAN_DIR_MASK GENMASK(3, 3) 74 #define SSD130X_SET_COM_SCAN_DIR_SET(val) FIELD_PREP(SSD130X_SET_COM_SCAN_DIR_MASK, (val)) 75 #define SSD130X_SET_CLOCK_DIV_MASK GENMASK(3, 0) 76 #define SSD130X_SET_CLOCK_DIV_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_DIV_MASK, (val)) 77 #define SSD130X_SET_CLOCK_FREQ_MASK GENMASK(7, 4) 78 #define SSD130X_SET_CLOCK_FREQ_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_FREQ_MASK, (val)) 79 #define SSD130X_SET_PRECHARGE_PERIOD1_MASK GENMASK(3, 0) 80 #define SSD130X_SET_PRECHARGE_PERIOD1_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD1_MASK, (val)) 81 #define SSD130X_SET_PRECHARGE_PERIOD2_MASK GENMASK(7, 4) 82 #define SSD130X_SET_PRECHARGE_PERIOD2_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD2_MASK, (val)) 83 #define SSD130X_SET_COM_PINS_CONFIG1_MASK GENMASK(4, 4) 84 #define SSD130X_SET_COM_PINS_CONFIG1_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG1_MASK, (val)) 85 #define SSD130X_SET_COM_PINS_CONFIG2_MASK GENMASK(5, 5) 86 #define SSD130X_SET_COM_PINS_CONFIG2_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG2_MASK, (val)) 87 88 #define SSD130X_SET_ADDRESS_MODE_HORIZONTAL 0x00 89 #define SSD130X_SET_ADDRESS_MODE_VERTICAL 0x01 90 #define SSD130X_SET_ADDRESS_MODE_PAGE 0x02 91 92 #define SSD130X_SET_AREA_COLOR_MODE_ENABLE 0x1e 93 #define SSD130X_SET_AREA_COLOR_MODE_LOW_POWER 0x05 94 95 #define MAX_CONTRAST 255 96 97 const struct ssd130x_deviceinfo ssd130x_variants[] = { 98 [SH1106_ID] = { 99 .default_vcomh = 0x40, 100 .default_dclk_div = 1, 101 .default_dclk_frq = 5, 102 .default_width = 132, 103 .default_height = 64, 104 .page_mode_only = 1, 105 .page_height = 8, 106 }, 107 [SSD1305_ID] = { 108 .default_vcomh = 0x34, 109 .default_dclk_div = 1, 110 .default_dclk_frq = 7, 111 .default_width = 132, 112 .default_height = 64, 113 .page_height = 8, 114 }, 115 [SSD1306_ID] = { 116 .default_vcomh = 0x20, 117 .default_dclk_div = 1, 118 .default_dclk_frq = 8, 119 .need_chargepump = 1, 120 .default_width = 128, 121 .default_height = 64, 122 .page_height = 8, 123 }, 124 [SSD1307_ID] = { 125 .default_vcomh = 0x20, 126 .default_dclk_div = 2, 127 .default_dclk_frq = 12, 128 .need_pwm = 1, 129 .default_width = 128, 130 .default_height = 39, 131 .page_height = 8, 132 }, 133 [SSD1309_ID] = { 134 .default_vcomh = 0x34, 135 .default_dclk_div = 1, 136 .default_dclk_frq = 10, 137 .default_width = 128, 138 .default_height = 64, 139 .page_height = 8, 140 } 141 }; 142 EXPORT_SYMBOL_NS_GPL(ssd130x_variants, DRM_SSD130X); 143 144 static inline struct ssd130x_device *drm_to_ssd130x(struct drm_device *drm) 145 { 146 return container_of(drm, struct ssd130x_device, drm); 147 } 148 149 static int ssd130x_buf_alloc(struct ssd130x_device *ssd130x) 150 { 151 unsigned int page_height = ssd130x->device_info->page_height; 152 unsigned int pages = DIV_ROUND_UP(ssd130x->height, page_height); 153 const struct drm_format_info *fi; 154 unsigned int pitch; 155 156 fi = drm_format_info(DRM_FORMAT_R1); 157 if (!fi) 158 return -EINVAL; 159 160 pitch = drm_format_info_min_pitch(fi, 0, ssd130x->width); 161 162 ssd130x->buffer = kcalloc(pitch, ssd130x->height, GFP_KERNEL); 163 if (!ssd130x->buffer) 164 return -ENOMEM; 165 166 ssd130x->data_array = kcalloc(ssd130x->width, pages, GFP_KERNEL); 167 if (!ssd130x->data_array) { 168 kfree(ssd130x->buffer); 169 return -ENOMEM; 170 } 171 172 return 0; 173 } 174 175 static void ssd130x_buf_free(struct ssd130x_device *ssd130x) 176 { 177 kfree(ssd130x->data_array); 178 kfree(ssd130x->buffer); 179 } 180 181 /* 182 * Helper to write data (SSD130X_DATA) to the device. 183 */ 184 static int ssd130x_write_data(struct ssd130x_device *ssd130x, u8 *values, int count) 185 { 186 return regmap_bulk_write(ssd130x->regmap, SSD130X_DATA, values, count); 187 } 188 189 /* 190 * Helper to write command (SSD130X_COMMAND). The fist variadic argument 191 * is the command to write and the following are the command options. 192 * 193 * Note that the ssd130x protocol requires each command and option to be 194 * written as a SSD130X_COMMAND device register value. That is why a call 195 * to regmap_write(..., SSD130X_COMMAND, ...) is done for each argument. 196 */ 197 static int ssd130x_write_cmd(struct ssd130x_device *ssd130x, int count, 198 /* u8 cmd, u8 option, ... */...) 199 { 200 va_list ap; 201 u8 value; 202 int ret; 203 204 va_start(ap, count); 205 206 do { 207 value = va_arg(ap, int); 208 ret = regmap_write(ssd130x->regmap, SSD130X_COMMAND, value); 209 if (ret) 210 goto out_end; 211 } while (--count); 212 213 out_end: 214 va_end(ap); 215 216 return ret; 217 } 218 219 /* Set address range for horizontal/vertical addressing modes */ 220 static int ssd130x_set_col_range(struct ssd130x_device *ssd130x, 221 u8 col_start, u8 cols) 222 { 223 u8 col_end = col_start + cols - 1; 224 int ret; 225 226 if (col_start == ssd130x->col_start && col_end == ssd130x->col_end) 227 return 0; 228 229 ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_COL_RANGE, col_start, col_end); 230 if (ret < 0) 231 return ret; 232 233 ssd130x->col_start = col_start; 234 ssd130x->col_end = col_end; 235 return 0; 236 } 237 238 static int ssd130x_set_page_range(struct ssd130x_device *ssd130x, 239 u8 page_start, u8 pages) 240 { 241 u8 page_end = page_start + pages - 1; 242 int ret; 243 244 if (page_start == ssd130x->page_start && page_end == ssd130x->page_end) 245 return 0; 246 247 ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_PAGE_RANGE, page_start, page_end); 248 if (ret < 0) 249 return ret; 250 251 ssd130x->page_start = page_start; 252 ssd130x->page_end = page_end; 253 return 0; 254 } 255 256 /* Set page and column start address for page addressing mode */ 257 static int ssd130x_set_page_pos(struct ssd130x_device *ssd130x, 258 u8 page_start, u8 col_start) 259 { 260 int ret; 261 u32 page, col_low, col_high; 262 263 page = SSD130X_START_PAGE_ADDRESS | 264 SSD130X_START_PAGE_ADDRESS_SET(page_start); 265 col_low = SSD130X_PAGE_COL_START_LOW | 266 SSD130X_PAGE_COL_START_LOW_SET(col_start); 267 col_high = SSD130X_PAGE_COL_START_HIGH | 268 SSD130X_PAGE_COL_START_HIGH_SET(col_start); 269 ret = ssd130x_write_cmd(ssd130x, 3, page, col_low, col_high); 270 if (ret < 0) 271 return ret; 272 273 return 0; 274 } 275 276 static int ssd130x_pwm_enable(struct ssd130x_device *ssd130x) 277 { 278 struct device *dev = ssd130x->dev; 279 struct pwm_state pwmstate; 280 281 ssd130x->pwm = pwm_get(dev, NULL); 282 if (IS_ERR(ssd130x->pwm)) { 283 dev_err(dev, "Could not get PWM from firmware description!\n"); 284 return PTR_ERR(ssd130x->pwm); 285 } 286 287 pwm_init_state(ssd130x->pwm, &pwmstate); 288 pwm_set_relative_duty_cycle(&pwmstate, 50, 100); 289 pwm_apply_state(ssd130x->pwm, &pwmstate); 290 291 /* Enable the PWM */ 292 pwm_enable(ssd130x->pwm); 293 294 dev_dbg(dev, "Using PWM%d with a %lluns period.\n", 295 ssd130x->pwm->pwm, pwm_get_period(ssd130x->pwm)); 296 297 return 0; 298 } 299 300 static void ssd130x_reset(struct ssd130x_device *ssd130x) 301 { 302 if (!ssd130x->reset) 303 return; 304 305 /* Reset the screen */ 306 gpiod_set_value_cansleep(ssd130x->reset, 1); 307 udelay(4); 308 gpiod_set_value_cansleep(ssd130x->reset, 0); 309 udelay(4); 310 } 311 312 static int ssd130x_power_on(struct ssd130x_device *ssd130x) 313 { 314 struct device *dev = ssd130x->dev; 315 int ret; 316 317 ssd130x_reset(ssd130x); 318 319 ret = regulator_enable(ssd130x->vcc_reg); 320 if (ret) { 321 dev_err(dev, "Failed to enable VCC: %d\n", ret); 322 return ret; 323 } 324 325 if (ssd130x->device_info->need_pwm) { 326 ret = ssd130x_pwm_enable(ssd130x); 327 if (ret) { 328 dev_err(dev, "Failed to enable PWM: %d\n", ret); 329 regulator_disable(ssd130x->vcc_reg); 330 return ret; 331 } 332 } 333 334 return 0; 335 } 336 337 static void ssd130x_power_off(struct ssd130x_device *ssd130x) 338 { 339 pwm_disable(ssd130x->pwm); 340 pwm_put(ssd130x->pwm); 341 342 regulator_disable(ssd130x->vcc_reg); 343 } 344 345 static int ssd130x_init(struct ssd130x_device *ssd130x) 346 { 347 u32 precharge, dclk, com_invdir, compins, chargepump, seg_remap; 348 bool scan_mode; 349 int ret; 350 351 /* Set initial contrast */ 352 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CONTRAST, ssd130x->contrast); 353 if (ret < 0) 354 return ret; 355 356 /* Set segment re-map */ 357 seg_remap = (SSD130X_SET_SEG_REMAP | 358 SSD130X_SET_SEG_REMAP_SET(ssd130x->seg_remap)); 359 ret = ssd130x_write_cmd(ssd130x, 1, seg_remap); 360 if (ret < 0) 361 return ret; 362 363 /* Set COM direction */ 364 com_invdir = (SSD130X_SET_COM_SCAN_DIR | 365 SSD130X_SET_COM_SCAN_DIR_SET(ssd130x->com_invdir)); 366 ret = ssd130x_write_cmd(ssd130x, 1, com_invdir); 367 if (ret < 0) 368 return ret; 369 370 /* Set multiplex ratio value */ 371 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_MULTIPLEX_RATIO, ssd130x->height - 1); 372 if (ret < 0) 373 return ret; 374 375 /* set display offset value */ 376 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_DISPLAY_OFFSET, ssd130x->com_offset); 377 if (ret < 0) 378 return ret; 379 380 /* Set clock frequency */ 381 dclk = (SSD130X_SET_CLOCK_DIV_SET(ssd130x->dclk_div - 1) | 382 SSD130X_SET_CLOCK_FREQ_SET(ssd130x->dclk_frq)); 383 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_CLOCK_FREQ, dclk); 384 if (ret < 0) 385 return ret; 386 387 /* Set Area Color Mode ON/OFF & Low Power Display Mode */ 388 if (ssd130x->area_color_enable || ssd130x->low_power) { 389 u32 mode = 0; 390 391 if (ssd130x->area_color_enable) 392 mode |= SSD130X_SET_AREA_COLOR_MODE_ENABLE; 393 394 if (ssd130x->low_power) 395 mode |= SSD130X_SET_AREA_COLOR_MODE_LOW_POWER; 396 397 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_AREA_COLOR_MODE, mode); 398 if (ret < 0) 399 return ret; 400 } 401 402 /* Set precharge period in number of ticks from the internal clock */ 403 precharge = (SSD130X_SET_PRECHARGE_PERIOD1_SET(ssd130x->prechargep1) | 404 SSD130X_SET_PRECHARGE_PERIOD2_SET(ssd130x->prechargep2)); 405 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_PRECHARGE_PERIOD, precharge); 406 if (ret < 0) 407 return ret; 408 409 /* Set COM pins configuration */ 410 compins = BIT(1); 411 /* 412 * The COM scan mode field values are the inverse of the boolean DT 413 * property "solomon,com-seq". The value 0b means scan from COM0 to 414 * COM[N - 1] while 1b means scan from COM[N - 1] to COM0. 415 */ 416 scan_mode = !ssd130x->com_seq; 417 compins |= (SSD130X_SET_COM_PINS_CONFIG1_SET(scan_mode) | 418 SSD130X_SET_COM_PINS_CONFIG2_SET(ssd130x->com_lrremap)); 419 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_COM_PINS_CONFIG, compins); 420 if (ret < 0) 421 return ret; 422 423 /* Set VCOMH */ 424 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_VCOMH, ssd130x->vcomh); 425 if (ret < 0) 426 return ret; 427 428 /* Turn on the DC-DC Charge Pump */ 429 chargepump = BIT(4); 430 431 if (ssd130x->device_info->need_chargepump) 432 chargepump |= BIT(2); 433 434 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CHARGE_PUMP, chargepump); 435 if (ret < 0) 436 return ret; 437 438 /* Set lookup table */ 439 if (ssd130x->lookup_table_set) { 440 int i; 441 442 ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_SET_LOOKUP_TABLE); 443 if (ret < 0) 444 return ret; 445 446 for (i = 0; i < ARRAY_SIZE(ssd130x->lookup_table); i++) { 447 u8 val = ssd130x->lookup_table[i]; 448 449 if (val < 31 || val > 63) 450 dev_warn(ssd130x->dev, 451 "lookup table index %d value out of range 31 <= %d <= 63\n", 452 i, val); 453 ret = ssd130x_write_cmd(ssd130x, 1, val); 454 if (ret < 0) 455 return ret; 456 } 457 } 458 459 /* Switch to page addressing mode */ 460 if (ssd130x->page_address_mode) 461 return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE, 462 SSD130X_SET_ADDRESS_MODE_PAGE); 463 464 /* Switch to horizontal addressing mode */ 465 return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE, 466 SSD130X_SET_ADDRESS_MODE_HORIZONTAL); 467 } 468 469 static int ssd130x_update_rect(struct ssd130x_device *ssd130x, struct drm_rect *rect) 470 { 471 unsigned int x = rect->x1; 472 unsigned int y = rect->y1; 473 u8 *buf = ssd130x->buffer; 474 u8 *data_array = ssd130x->data_array; 475 unsigned int width = drm_rect_width(rect); 476 unsigned int height = drm_rect_height(rect); 477 unsigned int line_length = DIV_ROUND_UP(width, 8); 478 unsigned int page_height = ssd130x->device_info->page_height; 479 unsigned int pages = DIV_ROUND_UP(height, page_height); 480 struct drm_device *drm = &ssd130x->drm; 481 u32 array_idx = 0; 482 int ret, i, j, k; 483 484 drm_WARN_ONCE(drm, y % 8 != 0, "y must be aligned to screen page\n"); 485 486 /* 487 * The screen is divided in pages, each having a height of 8 488 * pixels, and the width of the screen. When sending a byte of 489 * data to the controller, it gives the 8 bits for the current 490 * column. I.e, the first byte are the 8 bits of the first 491 * column, then the 8 bits for the second column, etc. 492 * 493 * 494 * Representation of the screen, assuming it is 5 bits 495 * wide. Each letter-number combination is a bit that controls 496 * one pixel. 497 * 498 * A0 A1 A2 A3 A4 499 * B0 B1 B2 B3 B4 500 * C0 C1 C2 C3 C4 501 * D0 D1 D2 D3 D4 502 * E0 E1 E2 E3 E4 503 * F0 F1 F2 F3 F4 504 * G0 G1 G2 G3 G4 505 * H0 H1 H2 H3 H4 506 * 507 * If you want to update this screen, you need to send 5 bytes: 508 * (1) A0 B0 C0 D0 E0 F0 G0 H0 509 * (2) A1 B1 C1 D1 E1 F1 G1 H1 510 * (3) A2 B2 C2 D2 E2 F2 G2 H2 511 * (4) A3 B3 C3 D3 E3 F3 G3 H3 512 * (5) A4 B4 C4 D4 E4 F4 G4 H4 513 */ 514 515 if (!ssd130x->page_address_mode) { 516 /* Set address range for horizontal addressing mode */ 517 ret = ssd130x_set_col_range(ssd130x, ssd130x->col_offset + x, width); 518 if (ret < 0) 519 return ret; 520 521 ret = ssd130x_set_page_range(ssd130x, ssd130x->page_offset + y / 8, pages); 522 if (ret < 0) 523 return ret; 524 } 525 526 for (i = 0; i < pages; i++) { 527 int m = 8; 528 529 /* Last page may be partial */ 530 if (8 * (y / 8 + i + 1) > ssd130x->height) 531 m = ssd130x->height % 8; 532 for (j = 0; j < width; j++) { 533 u8 data = 0; 534 535 for (k = 0; k < m; k++) { 536 u8 byte = buf[(8 * i + k) * line_length + j / 8]; 537 u8 bit = (byte >> (j % 8)) & 1; 538 539 data |= bit << k; 540 } 541 data_array[array_idx++] = data; 542 } 543 544 /* 545 * In page addressing mode, the start address needs to be reset, 546 * and each page then needs to be written out separately. 547 */ 548 if (ssd130x->page_address_mode) { 549 ret = ssd130x_set_page_pos(ssd130x, 550 ssd130x->page_offset + i, 551 ssd130x->col_offset + x); 552 if (ret < 0) 553 return ret; 554 555 ret = ssd130x_write_data(ssd130x, data_array, width); 556 if (ret < 0) 557 return ret; 558 559 array_idx = 0; 560 } 561 } 562 563 /* Write out update in one go if we aren't using page addressing mode */ 564 if (!ssd130x->page_address_mode) 565 ret = ssd130x_write_data(ssd130x, data_array, width * pages); 566 567 return ret; 568 } 569 570 static void ssd130x_clear_screen(struct ssd130x_device *ssd130x) 571 { 572 struct drm_rect fullscreen = { 573 .x1 = 0, 574 .x2 = ssd130x->width, 575 .y1 = 0, 576 .y2 = ssd130x->height, 577 }; 578 579 ssd130x_update_rect(ssd130x, &fullscreen); 580 } 581 582 static int ssd130x_fb_blit_rect(struct drm_framebuffer *fb, const struct iosys_map *vmap, 583 struct drm_rect *rect) 584 { 585 struct ssd130x_device *ssd130x = drm_to_ssd130x(fb->dev); 586 unsigned int page_height = ssd130x->device_info->page_height; 587 struct iosys_map dst; 588 unsigned int dst_pitch; 589 int ret = 0; 590 u8 *buf = ssd130x->buffer; 591 592 if (!buf) 593 return 0; 594 595 /* Align y to display page boundaries */ 596 rect->y1 = round_down(rect->y1, page_height); 597 rect->y2 = min_t(unsigned int, round_up(rect->y2, page_height), ssd130x->height); 598 599 dst_pitch = DIV_ROUND_UP(drm_rect_width(rect), 8); 600 601 ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE); 602 if (ret) 603 return ret; 604 605 iosys_map_set_vaddr(&dst, buf); 606 drm_fb_xrgb8888_to_mono(&dst, &dst_pitch, vmap, fb, rect); 607 608 drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE); 609 610 ssd130x_update_rect(ssd130x, rect); 611 612 return ret; 613 } 614 615 static void ssd130x_primary_plane_helper_atomic_update(struct drm_plane *plane, 616 struct drm_atomic_state *state) 617 { 618 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 619 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); 620 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 621 struct drm_atomic_helper_damage_iter iter; 622 struct drm_device *drm = plane->dev; 623 struct drm_rect dst_clip; 624 struct drm_rect damage; 625 int idx; 626 627 if (!drm_dev_enter(drm, &idx)) 628 return; 629 630 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state); 631 drm_atomic_for_each_plane_damage(&iter, &damage) { 632 dst_clip = plane_state->dst; 633 634 if (!drm_rect_intersect(&dst_clip, &damage)) 635 continue; 636 637 ssd130x_fb_blit_rect(plane_state->fb, &shadow_plane_state->data[0], &dst_clip); 638 } 639 640 drm_dev_exit(idx); 641 } 642 643 static void ssd130x_primary_plane_helper_atomic_disable(struct drm_plane *plane, 644 struct drm_atomic_state *state) 645 { 646 struct drm_device *drm = plane->dev; 647 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm); 648 int idx; 649 650 if (!drm_dev_enter(drm, &idx)) 651 return; 652 653 ssd130x_clear_screen(ssd130x); 654 655 drm_dev_exit(idx); 656 } 657 658 static const struct drm_plane_helper_funcs ssd130x_primary_plane_helper_funcs = { 659 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 660 .atomic_check = drm_plane_helper_atomic_check, 661 .atomic_update = ssd130x_primary_plane_helper_atomic_update, 662 .atomic_disable = ssd130x_primary_plane_helper_atomic_disable, 663 }; 664 665 static const struct drm_plane_funcs ssd130x_primary_plane_funcs = { 666 .update_plane = drm_atomic_helper_update_plane, 667 .disable_plane = drm_atomic_helper_disable_plane, 668 .destroy = drm_plane_cleanup, 669 DRM_GEM_SHADOW_PLANE_FUNCS, 670 }; 671 672 static enum drm_mode_status ssd130x_crtc_helper_mode_valid(struct drm_crtc *crtc, 673 const struct drm_display_mode *mode) 674 { 675 struct ssd130x_device *ssd130x = drm_to_ssd130x(crtc->dev); 676 677 if (mode->hdisplay != ssd130x->mode.hdisplay && 678 mode->vdisplay != ssd130x->mode.vdisplay) 679 return MODE_ONE_SIZE; 680 else if (mode->hdisplay != ssd130x->mode.hdisplay) 681 return MODE_ONE_WIDTH; 682 else if (mode->vdisplay != ssd130x->mode.vdisplay) 683 return MODE_ONE_HEIGHT; 684 685 return MODE_OK; 686 } 687 688 /* 689 * The CRTC is always enabled. Screen updates are performed by 690 * the primary plane's atomic_update function. Disabling clears 691 * the screen in the primary plane's atomic_disable function. 692 */ 693 static const struct drm_crtc_helper_funcs ssd130x_crtc_helper_funcs = { 694 .mode_valid = ssd130x_crtc_helper_mode_valid, 695 .atomic_check = drm_crtc_helper_atomic_check, 696 }; 697 698 static const struct drm_crtc_funcs ssd130x_crtc_funcs = { 699 .reset = drm_atomic_helper_crtc_reset, 700 .destroy = drm_crtc_cleanup, 701 .set_config = drm_atomic_helper_set_config, 702 .page_flip = drm_atomic_helper_page_flip, 703 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, 704 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, 705 }; 706 707 static void ssd130x_encoder_helper_atomic_enable(struct drm_encoder *encoder, 708 struct drm_atomic_state *state) 709 { 710 struct drm_device *drm = encoder->dev; 711 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm); 712 int ret; 713 714 ret = ssd130x_power_on(ssd130x); 715 if (ret) 716 return; 717 718 ret = ssd130x_init(ssd130x); 719 if (ret) 720 goto power_off; 721 722 ret = ssd130x_buf_alloc(ssd130x); 723 if (ret) 724 goto power_off; 725 726 ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_ON); 727 728 backlight_enable(ssd130x->bl_dev); 729 730 return; 731 732 power_off: 733 ssd130x_power_off(ssd130x); 734 return; 735 } 736 737 static void ssd130x_encoder_helper_atomic_disable(struct drm_encoder *encoder, 738 struct drm_atomic_state *state) 739 { 740 struct drm_device *drm = encoder->dev; 741 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm); 742 743 backlight_disable(ssd130x->bl_dev); 744 745 ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_OFF); 746 747 ssd130x_buf_free(ssd130x); 748 749 ssd130x_power_off(ssd130x); 750 } 751 752 static const struct drm_encoder_helper_funcs ssd130x_encoder_helper_funcs = { 753 .atomic_enable = ssd130x_encoder_helper_atomic_enable, 754 .atomic_disable = ssd130x_encoder_helper_atomic_disable, 755 }; 756 757 static const struct drm_encoder_funcs ssd130x_encoder_funcs = { 758 .destroy = drm_encoder_cleanup, 759 }; 760 761 static int ssd130x_connector_helper_get_modes(struct drm_connector *connector) 762 { 763 struct ssd130x_device *ssd130x = drm_to_ssd130x(connector->dev); 764 struct drm_display_mode *mode; 765 struct device *dev = ssd130x->dev; 766 767 mode = drm_mode_duplicate(connector->dev, &ssd130x->mode); 768 if (!mode) { 769 dev_err(dev, "Failed to duplicated mode\n"); 770 return 0; 771 } 772 773 drm_mode_probed_add(connector, mode); 774 drm_set_preferred_mode(connector, mode->hdisplay, mode->vdisplay); 775 776 /* There is only a single mode */ 777 return 1; 778 } 779 780 static const struct drm_connector_helper_funcs ssd130x_connector_helper_funcs = { 781 .get_modes = ssd130x_connector_helper_get_modes, 782 }; 783 784 static const struct drm_connector_funcs ssd130x_connector_funcs = { 785 .reset = drm_atomic_helper_connector_reset, 786 .fill_modes = drm_helper_probe_single_connector_modes, 787 .destroy = drm_connector_cleanup, 788 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 789 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 790 }; 791 792 static const struct drm_mode_config_funcs ssd130x_mode_config_funcs = { 793 .fb_create = drm_gem_fb_create_with_dirty, 794 .atomic_check = drm_atomic_helper_check, 795 .atomic_commit = drm_atomic_helper_commit, 796 }; 797 798 static const uint32_t ssd130x_formats[] = { 799 DRM_FORMAT_XRGB8888, 800 }; 801 802 DEFINE_DRM_GEM_FOPS(ssd130x_fops); 803 804 static const struct drm_driver ssd130x_drm_driver = { 805 DRM_GEM_SHMEM_DRIVER_OPS, 806 .name = DRIVER_NAME, 807 .desc = DRIVER_DESC, 808 .date = DRIVER_DATE, 809 .major = DRIVER_MAJOR, 810 .minor = DRIVER_MINOR, 811 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET, 812 .fops = &ssd130x_fops, 813 }; 814 815 static int ssd130x_update_bl(struct backlight_device *bdev) 816 { 817 struct ssd130x_device *ssd130x = bl_get_data(bdev); 818 int brightness = backlight_get_brightness(bdev); 819 int ret; 820 821 ssd130x->contrast = brightness; 822 823 ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_CONTRAST); 824 if (ret < 0) 825 return ret; 826 827 ret = ssd130x_write_cmd(ssd130x, 1, ssd130x->contrast); 828 if (ret < 0) 829 return ret; 830 831 return 0; 832 } 833 834 static const struct backlight_ops ssd130xfb_bl_ops = { 835 .update_status = ssd130x_update_bl, 836 }; 837 838 static void ssd130x_parse_properties(struct ssd130x_device *ssd130x) 839 { 840 struct device *dev = ssd130x->dev; 841 842 if (device_property_read_u32(dev, "solomon,width", &ssd130x->width)) 843 ssd130x->width = ssd130x->device_info->default_width; 844 845 if (device_property_read_u32(dev, "solomon,height", &ssd130x->height)) 846 ssd130x->height = ssd130x->device_info->default_height; 847 848 if (device_property_read_u32(dev, "solomon,page-offset", &ssd130x->page_offset)) 849 ssd130x->page_offset = 1; 850 851 if (device_property_read_u32(dev, "solomon,col-offset", &ssd130x->col_offset)) 852 ssd130x->col_offset = 0; 853 854 if (device_property_read_u32(dev, "solomon,com-offset", &ssd130x->com_offset)) 855 ssd130x->com_offset = 0; 856 857 if (device_property_read_u32(dev, "solomon,prechargep1", &ssd130x->prechargep1)) 858 ssd130x->prechargep1 = 2; 859 860 if (device_property_read_u32(dev, "solomon,prechargep2", &ssd130x->prechargep2)) 861 ssd130x->prechargep2 = 2; 862 863 if (!device_property_read_u8_array(dev, "solomon,lookup-table", 864 ssd130x->lookup_table, 865 ARRAY_SIZE(ssd130x->lookup_table))) 866 ssd130x->lookup_table_set = 1; 867 868 ssd130x->seg_remap = !device_property_read_bool(dev, "solomon,segment-no-remap"); 869 ssd130x->com_seq = device_property_read_bool(dev, "solomon,com-seq"); 870 ssd130x->com_lrremap = device_property_read_bool(dev, "solomon,com-lrremap"); 871 ssd130x->com_invdir = device_property_read_bool(dev, "solomon,com-invdir"); 872 ssd130x->area_color_enable = 873 device_property_read_bool(dev, "solomon,area-color-enable"); 874 ssd130x->low_power = device_property_read_bool(dev, "solomon,low-power"); 875 876 ssd130x->contrast = 127; 877 ssd130x->vcomh = ssd130x->device_info->default_vcomh; 878 879 /* Setup display timing */ 880 if (device_property_read_u32(dev, "solomon,dclk-div", &ssd130x->dclk_div)) 881 ssd130x->dclk_div = ssd130x->device_info->default_dclk_div; 882 if (device_property_read_u32(dev, "solomon,dclk-frq", &ssd130x->dclk_frq)) 883 ssd130x->dclk_frq = ssd130x->device_info->default_dclk_frq; 884 } 885 886 static int ssd130x_init_modeset(struct ssd130x_device *ssd130x) 887 { 888 struct drm_display_mode *mode = &ssd130x->mode; 889 struct device *dev = ssd130x->dev; 890 struct drm_device *drm = &ssd130x->drm; 891 unsigned long max_width, max_height; 892 struct drm_plane *primary_plane; 893 struct drm_crtc *crtc; 894 struct drm_encoder *encoder; 895 struct drm_connector *connector; 896 int ret; 897 898 /* 899 * Modesetting 900 */ 901 902 ret = drmm_mode_config_init(drm); 903 if (ret) { 904 dev_err(dev, "DRM mode config init failed: %d\n", ret); 905 return ret; 906 } 907 908 mode->type = DRM_MODE_TYPE_DRIVER; 909 mode->clock = 1; 910 mode->hdisplay = mode->htotal = ssd130x->width; 911 mode->hsync_start = mode->hsync_end = ssd130x->width; 912 mode->vdisplay = mode->vtotal = ssd130x->height; 913 mode->vsync_start = mode->vsync_end = ssd130x->height; 914 mode->width_mm = 27; 915 mode->height_mm = 27; 916 917 max_width = max_t(unsigned long, mode->hdisplay, DRM_SHADOW_PLANE_MAX_WIDTH); 918 max_height = max_t(unsigned long, mode->vdisplay, DRM_SHADOW_PLANE_MAX_HEIGHT); 919 920 drm->mode_config.min_width = mode->hdisplay; 921 drm->mode_config.max_width = max_width; 922 drm->mode_config.min_height = mode->vdisplay; 923 drm->mode_config.max_height = max_height; 924 drm->mode_config.preferred_depth = 24; 925 drm->mode_config.funcs = &ssd130x_mode_config_funcs; 926 927 /* Primary plane */ 928 929 primary_plane = &ssd130x->primary_plane; 930 ret = drm_universal_plane_init(drm, primary_plane, 0, &ssd130x_primary_plane_funcs, 931 ssd130x_formats, ARRAY_SIZE(ssd130x_formats), 932 NULL, DRM_PLANE_TYPE_PRIMARY, NULL); 933 if (ret) { 934 dev_err(dev, "DRM primary plane init failed: %d\n", ret); 935 return ret; 936 } 937 938 drm_plane_helper_add(primary_plane, &ssd130x_primary_plane_helper_funcs); 939 940 drm_plane_enable_fb_damage_clips(primary_plane); 941 942 /* CRTC */ 943 944 crtc = &ssd130x->crtc; 945 ret = drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL, 946 &ssd130x_crtc_funcs, NULL); 947 if (ret) { 948 dev_err(dev, "DRM crtc init failed: %d\n", ret); 949 return ret; 950 } 951 952 drm_crtc_helper_add(crtc, &ssd130x_crtc_helper_funcs); 953 954 /* Encoder */ 955 956 encoder = &ssd130x->encoder; 957 ret = drm_encoder_init(drm, encoder, &ssd130x_encoder_funcs, 958 DRM_MODE_ENCODER_NONE, NULL); 959 if (ret) { 960 dev_err(dev, "DRM encoder init failed: %d\n", ret); 961 return ret; 962 } 963 964 drm_encoder_helper_add(encoder, &ssd130x_encoder_helper_funcs); 965 966 encoder->possible_crtcs = drm_crtc_mask(crtc); 967 968 /* Connector */ 969 970 connector = &ssd130x->connector; 971 ret = drm_connector_init(drm, connector, &ssd130x_connector_funcs, 972 DRM_MODE_CONNECTOR_Unknown); 973 if (ret) { 974 dev_err(dev, "DRM connector init failed: %d\n", ret); 975 return ret; 976 } 977 978 drm_connector_helper_add(connector, &ssd130x_connector_helper_funcs); 979 980 ret = drm_connector_attach_encoder(connector, encoder); 981 if (ret) { 982 dev_err(dev, "DRM attach connector to encoder failed: %d\n", ret); 983 return ret; 984 } 985 986 drm_mode_config_reset(drm); 987 988 return 0; 989 } 990 991 static int ssd130x_get_resources(struct ssd130x_device *ssd130x) 992 { 993 struct device *dev = ssd130x->dev; 994 995 ssd130x->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); 996 if (IS_ERR(ssd130x->reset)) 997 return dev_err_probe(dev, PTR_ERR(ssd130x->reset), 998 "Failed to get reset gpio\n"); 999 1000 ssd130x->vcc_reg = devm_regulator_get(dev, "vcc"); 1001 if (IS_ERR(ssd130x->vcc_reg)) 1002 return dev_err_probe(dev, PTR_ERR(ssd130x->vcc_reg), 1003 "Failed to get VCC regulator\n"); 1004 1005 return 0; 1006 } 1007 1008 struct ssd130x_device *ssd130x_probe(struct device *dev, struct regmap *regmap) 1009 { 1010 struct ssd130x_device *ssd130x; 1011 struct backlight_device *bl; 1012 struct drm_device *drm; 1013 int ret; 1014 1015 ssd130x = devm_drm_dev_alloc(dev, &ssd130x_drm_driver, 1016 struct ssd130x_device, drm); 1017 if (IS_ERR(ssd130x)) 1018 return ERR_PTR(dev_err_probe(dev, PTR_ERR(ssd130x), 1019 "Failed to allocate DRM device\n")); 1020 1021 drm = &ssd130x->drm; 1022 1023 ssd130x->dev = dev; 1024 ssd130x->regmap = regmap; 1025 ssd130x->device_info = device_get_match_data(dev); 1026 1027 if (ssd130x->device_info->page_mode_only) 1028 ssd130x->page_address_mode = 1; 1029 1030 ssd130x_parse_properties(ssd130x); 1031 1032 ret = ssd130x_get_resources(ssd130x); 1033 if (ret) 1034 return ERR_PTR(ret); 1035 1036 bl = devm_backlight_device_register(dev, dev_name(dev), dev, ssd130x, 1037 &ssd130xfb_bl_ops, NULL); 1038 if (IS_ERR(bl)) 1039 return ERR_PTR(dev_err_probe(dev, PTR_ERR(bl), 1040 "Unable to register backlight device\n")); 1041 1042 bl->props.brightness = ssd130x->contrast; 1043 bl->props.max_brightness = MAX_CONTRAST; 1044 ssd130x->bl_dev = bl; 1045 1046 ret = ssd130x_init_modeset(ssd130x); 1047 if (ret) 1048 return ERR_PTR(ret); 1049 1050 ret = drm_dev_register(drm, 0); 1051 if (ret) 1052 return ERR_PTR(dev_err_probe(dev, ret, "DRM device register failed\n")); 1053 1054 drm_fbdev_generic_setup(drm, 32); 1055 1056 return ssd130x; 1057 } 1058 EXPORT_SYMBOL_GPL(ssd130x_probe); 1059 1060 void ssd130x_remove(struct ssd130x_device *ssd130x) 1061 { 1062 drm_dev_unplug(&ssd130x->drm); 1063 } 1064 EXPORT_SYMBOL_GPL(ssd130x_remove); 1065 1066 void ssd130x_shutdown(struct ssd130x_device *ssd130x) 1067 { 1068 drm_atomic_helper_shutdown(&ssd130x->drm); 1069 } 1070 EXPORT_SYMBOL_GPL(ssd130x_shutdown); 1071 1072 MODULE_DESCRIPTION(DRIVER_DESC); 1073 MODULE_AUTHOR("Javier Martinez Canillas <javierm@redhat.com>"); 1074 MODULE_LICENSE("GPL v2"); 1075