11b1f42d8SLucas Stach /*
21b1f42d8SLucas Stach * Copyright 2015 Advanced Micro Devices, Inc.
31b1f42d8SLucas Stach *
41b1f42d8SLucas Stach * Permission is hereby granted, free of charge, to any person obtaining a
51b1f42d8SLucas Stach * copy of this software and associated documentation files (the "Software"),
61b1f42d8SLucas Stach * to deal in the Software without restriction, including without limitation
71b1f42d8SLucas Stach * the rights to use, copy, modify, merge, publish, distribute, sublicense,
81b1f42d8SLucas Stach * and/or sell copies of the Software, and to permit persons to whom the
91b1f42d8SLucas Stach * Software is furnished to do so, subject to the following conditions:
101b1f42d8SLucas Stach *
111b1f42d8SLucas Stach * The above copyright notice and this permission notice shall be included in
121b1f42d8SLucas Stach * all copies or substantial portions of the Software.
131b1f42d8SLucas Stach *
141b1f42d8SLucas Stach * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
151b1f42d8SLucas Stach * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
161b1f42d8SLucas Stach * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
171b1f42d8SLucas Stach * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
181b1f42d8SLucas Stach * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
191b1f42d8SLucas Stach * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
201b1f42d8SLucas Stach * OTHER DEALINGS IN THE SOFTWARE.
211b1f42d8SLucas Stach *
221b1f42d8SLucas Stach */
231b1f42d8SLucas Stach
241b1f42d8SLucas Stach #include <linux/kthread.h>
257c1be93cSSam Ravnborg #include <linux/module.h>
261b1f42d8SLucas Stach #include <linux/sched.h>
277c1be93cSSam Ravnborg #include <linux/slab.h>
287c1be93cSSam Ravnborg #include <linux/wait.h>
297c1be93cSSam Ravnborg
301b1f42d8SLucas Stach #include <drm/gpu_scheduler.h>
311b1f42d8SLucas Stach
321b1f42d8SLucas Stach static struct kmem_cache *sched_fence_slab;
331b1f42d8SLucas Stach
drm_sched_fence_slab_init(void)344983e48cSLucas Stach static int __init drm_sched_fence_slab_init(void)
351b1f42d8SLucas Stach {
361b1f42d8SLucas Stach sched_fence_slab = kmem_cache_create(
371b1f42d8SLucas Stach "drm_sched_fence", sizeof(struct drm_sched_fence), 0,
381b1f42d8SLucas Stach SLAB_HWCACHE_ALIGN, NULL);
391b1f42d8SLucas Stach if (!sched_fence_slab)
401b1f42d8SLucas Stach return -ENOMEM;
411b1f42d8SLucas Stach
421b1f42d8SLucas Stach return 0;
431b1f42d8SLucas Stach }
441b1f42d8SLucas Stach
drm_sched_fence_slab_fini(void)454983e48cSLucas Stach static void __exit drm_sched_fence_slab_fini(void)
461b1f42d8SLucas Stach {
471b1f42d8SLucas Stach rcu_barrier();
481b1f42d8SLucas Stach kmem_cache_destroy(sched_fence_slab);
491b1f42d8SLucas Stach }
501b1f42d8SLucas Stach
drm_sched_fence_set_parent(struct drm_sched_fence * s_fence,struct dma_fence * fence)51*db8b4968SBoris Brezillon static void drm_sched_fence_set_parent(struct drm_sched_fence *s_fence,
52*db8b4968SBoris Brezillon struct dma_fence *fence)
531b1f42d8SLucas Stach {
54*db8b4968SBoris Brezillon /*
55*db8b4968SBoris Brezillon * smp_store_release() to ensure another thread racing us
56*db8b4968SBoris Brezillon * in drm_sched_fence_set_deadline_finished() sees the
57*db8b4968SBoris Brezillon * fence's parent set before test_bit()
58*db8b4968SBoris Brezillon */
59*db8b4968SBoris Brezillon smp_store_release(&s_fence->parent, dma_fence_get(fence));
60*db8b4968SBoris Brezillon if (test_bit(DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT,
61*db8b4968SBoris Brezillon &s_fence->finished.flags))
62*db8b4968SBoris Brezillon dma_fence_set_deadline(fence, s_fence->deadline);
63*db8b4968SBoris Brezillon }
64*db8b4968SBoris Brezillon
drm_sched_fence_scheduled(struct drm_sched_fence * fence,struct dma_fence * parent)65*db8b4968SBoris Brezillon void drm_sched_fence_scheduled(struct drm_sched_fence *fence,
66*db8b4968SBoris Brezillon struct dma_fence *parent)
67*db8b4968SBoris Brezillon {
68*db8b4968SBoris Brezillon /* Set the parent before signaling the scheduled fence, such that,
69*db8b4968SBoris Brezillon * any waiter expecting the parent to be filled after the job has
70*db8b4968SBoris Brezillon * been scheduled (which is the case for drivers delegating waits
71*db8b4968SBoris Brezillon * to some firmware) doesn't have to busy wait for parent to show
72*db8b4968SBoris Brezillon * up.
73*db8b4968SBoris Brezillon */
74*db8b4968SBoris Brezillon if (!IS_ERR_OR_NULL(parent))
75*db8b4968SBoris Brezillon drm_sched_fence_set_parent(fence, parent);
76*db8b4968SBoris Brezillon
77d72277b6SChristian König dma_fence_signal(&fence->scheduled);
781b1f42d8SLucas Stach }
791b1f42d8SLucas Stach
drm_sched_fence_finished(struct drm_sched_fence * fence,int result)801b1f42d8SLucas Stach void drm_sched_fence_finished(struct drm_sched_fence *fence, int result)
811b1f42d8SLucas Stach {
82d72277b6SChristian König if (result)
831b1f42d8SLucas Stach dma_fence_set_error(&fence->finished, result);
841b1f42d8SLucas Stach dma_fence_signal(&fence->finished);
851b1f42d8SLucas Stach }
861b1f42d8SLucas Stach
drm_sched_fence_get_driver_name(struct dma_fence * fence)871b1f42d8SLucas Stach static const char *drm_sched_fence_get_driver_name(struct dma_fence *fence)
881b1f42d8SLucas Stach {
891b1f42d8SLucas Stach return "drm_sched";
901b1f42d8SLucas Stach }
911b1f42d8SLucas Stach
drm_sched_fence_get_timeline_name(struct dma_fence * f)921b1f42d8SLucas Stach static const char *drm_sched_fence_get_timeline_name(struct dma_fence *f)
931b1f42d8SLucas Stach {
941b1f42d8SLucas Stach struct drm_sched_fence *fence = to_drm_sched_fence(f);
951b1f42d8SLucas Stach return (const char *)fence->sched->name;
96d4c16733SBoris Brezillon }
971b1f42d8SLucas Stach
drm_sched_fence_free_rcu(struct rcu_head * rcu)981b1f42d8SLucas Stach static void drm_sched_fence_free_rcu(struct rcu_head *rcu)
991b1f42d8SLucas Stach {
1001b1f42d8SLucas Stach struct dma_fence *f = container_of(rcu, struct dma_fence, rcu);
101d4c16733SBoris Brezillon struct drm_sched_fence *fence = to_drm_sched_fence(f);
102d4c16733SBoris Brezillon
103d4c16733SBoris Brezillon if (!WARN_ON_ONCE(!fence))
104d4c16733SBoris Brezillon kmem_cache_free(sched_fence_slab, fence);
105d4c16733SBoris Brezillon }
106d4c16733SBoris Brezillon
107d4c16733SBoris Brezillon /**
108d4c16733SBoris Brezillon * drm_sched_fence_free - free up an uninitialized fence
109d4c16733SBoris Brezillon *
110d4c16733SBoris Brezillon * @fence: fence to free
111d4c16733SBoris Brezillon *
112d4c16733SBoris Brezillon * Free up the fence memory. Should only be used if drm_sched_fence_init()
113d4c16733SBoris Brezillon * has not been called yet.
114d4c16733SBoris Brezillon */
drm_sched_fence_free(struct drm_sched_fence * fence)115d4c16733SBoris Brezillon void drm_sched_fence_free(struct drm_sched_fence *fence)
116d4c16733SBoris Brezillon {
1171b1f42d8SLucas Stach /* This function should not be called if the fence has been initialized. */
1181b1f42d8SLucas Stach if (!WARN_ON_ONCE(fence->sched))
1191b1f42d8SLucas Stach kmem_cache_free(sched_fence_slab, fence);
1201b1f42d8SLucas Stach }
121652470acSNayan Deshmukh
1221b1f42d8SLucas Stach /**
12305f59762STian Tao * drm_sched_fence_release_scheduled - callback that fence can be freed
1241b1f42d8SLucas Stach *
1251b1f42d8SLucas Stach * @f: fence
1261b1f42d8SLucas Stach *
1271b1f42d8SLucas Stach * This function is called when the reference count becomes zero.
1281b1f42d8SLucas Stach * It just RCU schedules freeing up the fence.
1291b1f42d8SLucas Stach */
drm_sched_fence_release_scheduled(struct dma_fence * f)1301b1f42d8SLucas Stach static void drm_sched_fence_release_scheduled(struct dma_fence *f)
1311b1f42d8SLucas Stach {
13252bf20f4SEmily Deng struct drm_sched_fence *fence = to_drm_sched_fence(f);
133d4c16733SBoris Brezillon
1341b1f42d8SLucas Stach dma_fence_put(fence->parent);
1351b1f42d8SLucas Stach call_rcu(&fence->finished.rcu, drm_sched_fence_free_rcu);
1361b1f42d8SLucas Stach }
137652470acSNayan Deshmukh
1381b1f42d8SLucas Stach /**
1391b1f42d8SLucas Stach * drm_sched_fence_release_finished - drop extra reference
1401b1f42d8SLucas Stach *
1411b1f42d8SLucas Stach * @f: fence
1421b1f42d8SLucas Stach *
1431b1f42d8SLucas Stach * Drop the extra reference from the scheduled fence to the base fence.
1441b1f42d8SLucas Stach */
drm_sched_fence_release_finished(struct dma_fence * f)1451b1f42d8SLucas Stach static void drm_sched_fence_release_finished(struct dma_fence *f)
1461b1f42d8SLucas Stach {
1471b1f42d8SLucas Stach struct drm_sched_fence *fence = to_drm_sched_fence(f);
1481b1f42d8SLucas Stach
1491b1f42d8SLucas Stach dma_fence_put(&fence->scheduled);
150f3823da7SRob Clark }
151f3823da7SRob Clark
drm_sched_fence_set_deadline_finished(struct dma_fence * f,ktime_t deadline)152f3823da7SRob Clark static void drm_sched_fence_set_deadline_finished(struct dma_fence *f,
153f3823da7SRob Clark ktime_t deadline)
154f3823da7SRob Clark {
155f3823da7SRob Clark struct drm_sched_fence *fence = to_drm_sched_fence(f);
156f3823da7SRob Clark struct dma_fence *parent;
157f3823da7SRob Clark unsigned long flags;
158f3823da7SRob Clark
159f3823da7SRob Clark spin_lock_irqsave(&fence->lock, flags);
160f3823da7SRob Clark
161f3823da7SRob Clark /* If we already have an earlier deadline, keep it: */
162f3823da7SRob Clark if (test_bit(DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT, &f->flags) &&
163f3823da7SRob Clark ktime_before(fence->deadline, deadline)) {
164f3823da7SRob Clark spin_unlock_irqrestore(&fence->lock, flags);
165f3823da7SRob Clark return;
166f3823da7SRob Clark }
167f3823da7SRob Clark
168f3823da7SRob Clark fence->deadline = deadline;
169f3823da7SRob Clark set_bit(DRM_SCHED_FENCE_FLAG_HAS_DEADLINE_BIT, &f->flags);
170f3823da7SRob Clark
171f3823da7SRob Clark spin_unlock_irqrestore(&fence->lock, flags);
172f3823da7SRob Clark
173f3823da7SRob Clark /*
174f3823da7SRob Clark * smp_load_aquire() to ensure that if we are racing another
175f3823da7SRob Clark * thread calling drm_sched_fence_set_parent(), that we see
176f3823da7SRob Clark * the parent set before it calls test_bit(HAS_DEADLINE_BIT)
177f3823da7SRob Clark */
178f3823da7SRob Clark parent = smp_load_acquire(&fence->parent);
179f3823da7SRob Clark if (parent)
180f3823da7SRob Clark dma_fence_set_deadline(parent, deadline);
1812636a517SBen Dooks }
1821b1f42d8SLucas Stach
1831b1f42d8SLucas Stach static const struct dma_fence_ops drm_sched_fence_ops_scheduled = {
1841b1f42d8SLucas Stach .get_driver_name = drm_sched_fence_get_driver_name,
1851b1f42d8SLucas Stach .get_timeline_name = drm_sched_fence_get_timeline_name,
1861b1f42d8SLucas Stach .release = drm_sched_fence_release_scheduled,
1872636a517SBen Dooks };
1881b1f42d8SLucas Stach
1891b1f42d8SLucas Stach static const struct dma_fence_ops drm_sched_fence_ops_finished = {
1901b1f42d8SLucas Stach .get_driver_name = drm_sched_fence_get_driver_name,
191f3823da7SRob Clark .get_timeline_name = drm_sched_fence_get_timeline_name,
1921b1f42d8SLucas Stach .release = drm_sched_fence_release_finished,
1931b1f42d8SLucas Stach .set_deadline = drm_sched_fence_set_deadline_finished,
1941b1f42d8SLucas Stach };
1951b1f42d8SLucas Stach
to_drm_sched_fence(struct dma_fence * f)1961b1f42d8SLucas Stach struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f)
1971b1f42d8SLucas Stach {
1981b1f42d8SLucas Stach if (f->ops == &drm_sched_fence_ops_scheduled)
1991b1f42d8SLucas Stach return container_of(f, struct drm_sched_fence, scheduled);
2001b1f42d8SLucas Stach
2011b1f42d8SLucas Stach if (f->ops == &drm_sched_fence_ops_finished)
2021b1f42d8SLucas Stach return container_of(f, struct drm_sched_fence, finished);
2031b1f42d8SLucas Stach
2041b1f42d8SLucas Stach return NULL;
2051b1f42d8SLucas Stach }
206dbe48d03SDaniel Vetter EXPORT_SYMBOL(to_drm_sched_fence);
2071b1f42d8SLucas Stach
drm_sched_fence_alloc(struct drm_sched_entity * entity,void * owner)2081b1f42d8SLucas Stach struct drm_sched_fence *drm_sched_fence_alloc(struct drm_sched_entity *entity,
2091b1f42d8SLucas Stach void *owner)
2101b1f42d8SLucas Stach {
2111b1f42d8SLucas Stach struct drm_sched_fence *fence = NULL;
2121b1f42d8SLucas Stach
2131b1f42d8SLucas Stach fence = kmem_cache_zalloc(sched_fence_slab, GFP_KERNEL);
2141b1f42d8SLucas Stach if (fence == NULL)
2151b1f42d8SLucas Stach return NULL;
2161b1f42d8SLucas Stach
2171b1f42d8SLucas Stach fence->owner = owner;
218dbe48d03SDaniel Vetter spin_lock_init(&fence->lock);
219dbe48d03SDaniel Vetter
220dbe48d03SDaniel Vetter return fence;
221dbe48d03SDaniel Vetter }
222dbe48d03SDaniel Vetter
drm_sched_fence_init(struct drm_sched_fence * fence,struct drm_sched_entity * entity)223dbe48d03SDaniel Vetter void drm_sched_fence_init(struct drm_sched_fence *fence,
224dbe48d03SDaniel Vetter struct drm_sched_entity *entity)
225dbe48d03SDaniel Vetter {
226dbe48d03SDaniel Vetter unsigned seq;
2271b1f42d8SLucas Stach
2281b1f42d8SLucas Stach fence->sched = entity->rq->sched;
2291b1f42d8SLucas Stach seq = atomic_inc_return(&entity->fence_seq);
2301b1f42d8SLucas Stach dma_fence_init(&fence->scheduled, &drm_sched_fence_ops_scheduled,
2311b1f42d8SLucas Stach &fence->lock, entity->fence_context, seq);
2321b1f42d8SLucas Stach dma_fence_init(&fence->finished, &drm_sched_fence_ops_finished,
2334983e48cSLucas Stach &fence->lock, entity->fence_context + 1, seq);
2344983e48cSLucas Stach }
2354983e48cSLucas Stach
2364983e48cSLucas Stach module_init(drm_sched_fence_slab_init);
2374983e48cSLucas Stach module_exit(drm_sched_fence_slab_fini);
2384983e48cSLucas Stach
239 MODULE_DESCRIPTION("DRM GPU scheduler");
240 MODULE_LICENSE("GPL and additional rights");
241