19c92ab61SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2a67719d1SMark Yao /* 3a67719d1SMark Yao * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd 4a67719d1SMark Yao * Author:Mark Yao <mark.yao@rock-chips.com> 5a67719d1SMark Yao */ 6a67719d1SMark Yao 7a67719d1SMark Yao #include <linux/component.h> 8c2156ccdSSam Ravnborg #include <linux/mod_devicetable.h> 9c2156ccdSSam Ravnborg #include <linux/module.h> 10c2156ccdSSam Ravnborg #include <linux/of.h> 11c2156ccdSSam Ravnborg #include <linux/platform_device.h> 12c2156ccdSSam Ravnborg 13c2156ccdSSam Ravnborg #include <drm/drm_fourcc.h> 14c2156ccdSSam Ravnborg #include <drm/drm_plane.h> 15c2156ccdSSam Ravnborg #include <drm/drm_print.h> 16a67719d1SMark Yao 17a67719d1SMark Yao #include "rockchip_drm_vop.h" 18a67719d1SMark Yao #include "rockchip_vop_reg.h" 19a67719d1SMark Yao 209548e1b4SMark yao #define _VOP_REG(off, _mask, _shift, _write_mask, _relaxed) \ 219548e1b4SMark yao { \ 229548e1b4SMark yao .offset = off, \ 23a67719d1SMark Yao .mask = _mask, \ 249548e1b4SMark yao .shift = _shift, \ 259548e1b4SMark yao .write_mask = _write_mask, \ 269548e1b4SMark yao .relaxed = _relaxed, \ 279548e1b4SMark yao } 28d49463ecSMark Yao 299548e1b4SMark yao #define VOP_REG(off, _mask, _shift) \ 309548e1b4SMark yao _VOP_REG(off, _mask, _shift, false, true) 319548e1b4SMark yao 329548e1b4SMark yao #define VOP_REG_SYNC(off, _mask, _shift) \ 339548e1b4SMark yao _VOP_REG(off, _mask, _shift, false, false) 349548e1b4SMark yao 359548e1b4SMark yao #define VOP_REG_MASK_SYNC(off, _mask, _shift) \ 369548e1b4SMark yao _VOP_REG(off, _mask, _shift, true, false) 37a67719d1SMark Yao 38f7673453SMark Yao static const uint32_t formats_win_full[] = { 39a67719d1SMark Yao DRM_FORMAT_XRGB8888, 40a67719d1SMark Yao DRM_FORMAT_ARGB8888, 41a67719d1SMark Yao DRM_FORMAT_XBGR8888, 42a67719d1SMark Yao DRM_FORMAT_ABGR8888, 43a67719d1SMark Yao DRM_FORMAT_RGB888, 44a67719d1SMark Yao DRM_FORMAT_BGR888, 45a67719d1SMark Yao DRM_FORMAT_RGB565, 46a67719d1SMark Yao DRM_FORMAT_BGR565, 47a67719d1SMark Yao DRM_FORMAT_NV12, 48a67719d1SMark Yao DRM_FORMAT_NV16, 49a67719d1SMark Yao DRM_FORMAT_NV24, 50a67719d1SMark Yao }; 51a67719d1SMark Yao 52f7673453SMark Yao static const uint32_t formats_win_lite[] = { 53a67719d1SMark Yao DRM_FORMAT_XRGB8888, 54a67719d1SMark Yao DRM_FORMAT_ARGB8888, 55a67719d1SMark Yao DRM_FORMAT_XBGR8888, 56a67719d1SMark Yao DRM_FORMAT_ABGR8888, 57a67719d1SMark Yao DRM_FORMAT_RGB888, 58a67719d1SMark Yao DRM_FORMAT_BGR888, 59a67719d1SMark Yao DRM_FORMAT_RGB565, 60a67719d1SMark Yao DRM_FORMAT_BGR565, 61a67719d1SMark Yao }; 62a67719d1SMark Yao 63b51502adSMark Yao static const struct vop_scl_regs rk3036_win_scl = { 64b51502adSMark Yao .scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), 65b51502adSMark Yao .scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16), 66b51502adSMark Yao .scale_cbcr_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), 67b51502adSMark Yao .scale_cbcr_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 16), 68b51502adSMark Yao }; 69b51502adSMark Yao 70b51502adSMark Yao static const struct vop_win_phy rk3036_win0_data = { 71b51502adSMark Yao .scl = &rk3036_win_scl, 72b51502adSMark Yao .data_formats = formats_win_full, 73b51502adSMark Yao .nformats = ARRAY_SIZE(formats_win_full), 74b51502adSMark Yao .enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 0), 75b51502adSMark Yao .format = VOP_REG(RK3036_SYS_CTRL, 0x7, 3), 76b51502adSMark Yao .rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 15), 77b51502adSMark Yao .act_info = VOP_REG(RK3036_WIN0_ACT_INFO, 0x1fff1fff, 0), 78b51502adSMark Yao .dsp_info = VOP_REG(RK3036_WIN0_DSP_INFO, 0x0fff0fff, 0), 79b51502adSMark Yao .dsp_st = VOP_REG(RK3036_WIN0_DSP_ST, 0x1fff1fff, 0), 80b51502adSMark Yao .yrgb_mst = VOP_REG(RK3036_WIN0_YRGB_MST, 0xffffffff, 0), 81b51502adSMark Yao .uv_mst = VOP_REG(RK3036_WIN0_CBR_MST, 0xffffffff, 0), 82b51502adSMark Yao .yrgb_vir = VOP_REG(RK3036_WIN0_VIR, 0xffff, 0), 83b51502adSMark Yao .uv_vir = VOP_REG(RK3036_WIN0_VIR, 0x1fff, 16), 84b51502adSMark Yao }; 85b51502adSMark Yao 86b51502adSMark Yao static const struct vop_win_phy rk3036_win1_data = { 87b51502adSMark Yao .data_formats = formats_win_lite, 88b51502adSMark Yao .nformats = ARRAY_SIZE(formats_win_lite), 89b51502adSMark Yao .enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1), 90b51502adSMark Yao .format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6), 91b51502adSMark Yao .rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19), 92b51502adSMark Yao .act_info = VOP_REG(RK3036_WIN1_ACT_INFO, 0x1fff1fff, 0), 93b51502adSMark Yao .dsp_info = VOP_REG(RK3036_WIN1_DSP_INFO, 0x0fff0fff, 0), 94b51502adSMark Yao .dsp_st = VOP_REG(RK3036_WIN1_DSP_ST, 0x1fff1fff, 0), 95b51502adSMark Yao .yrgb_mst = VOP_REG(RK3036_WIN1_MST, 0xffffffff, 0), 96b51502adSMark Yao .yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0), 97b51502adSMark Yao }; 98b51502adSMark Yao 99b51502adSMark Yao static const struct vop_win_data rk3036_vop_win_data[] = { 100b51502adSMark Yao { .base = 0x00, .phy = &rk3036_win0_data, 101b51502adSMark Yao .type = DRM_PLANE_TYPE_PRIMARY }, 102b51502adSMark Yao { .base = 0x00, .phy = &rk3036_win1_data, 103b51502adSMark Yao .type = DRM_PLANE_TYPE_CURSOR }, 104b51502adSMark Yao }; 105b51502adSMark Yao 106b51502adSMark Yao static const int rk3036_vop_intrs[] = { 107b51502adSMark Yao DSP_HOLD_VALID_INTR, 108b51502adSMark Yao FS_INTR, 109b51502adSMark Yao LINE_FLAG_INTR, 110b51502adSMark Yao BUS_ERROR_INTR, 111b51502adSMark Yao }; 112b51502adSMark Yao 113b51502adSMark Yao static const struct vop_intr rk3036_intr = { 114b51502adSMark Yao .intrs = rk3036_vop_intrs, 115b51502adSMark Yao .nintrs = ARRAY_SIZE(rk3036_vop_intrs), 116ac6560dfSMark yao .line_flag_num[0] = VOP_REG(RK3036_INT_STATUS, 0xfff, 12), 1179a61c54bSMark yao .status = VOP_REG_SYNC(RK3036_INT_STATUS, 0xf, 0), 1189a61c54bSMark yao .enable = VOP_REG_SYNC(RK3036_INT_STATUS, 0xf, 4), 1199a61c54bSMark yao .clear = VOP_REG_SYNC(RK3036_INT_STATUS, 0xf, 8), 120b51502adSMark Yao }; 121b51502adSMark Yao 1229a61c54bSMark yao static const struct vop_modeset rk3036_modeset = { 123b51502adSMark Yao .htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0), 124b51502adSMark Yao .hact_st_end = VOP_REG(RK3036_DSP_HACT_ST_END, 0x1fff1fff, 0), 125b51502adSMark Yao .vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0), 126b51502adSMark Yao .vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0), 1279a61c54bSMark yao }; 1289a61c54bSMark yao 1299a61c54bSMark yao static const struct vop_output rk3036_output = { 1309a61c54bSMark yao .pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4), 1319a61c54bSMark yao }; 1329a61c54bSMark yao 1339a61c54bSMark yao static const struct vop_common rk3036_common = { 1349a61c54bSMark yao .standby = VOP_REG_SYNC(RK3036_SYS_CTRL, 0x1, 30), 1359a61c54bSMark yao .out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0), 1369a61c54bSMark yao .dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24), 137a5c0fa44SUrja Rannikko .dither_down_sel = VOP_REG(RK3036_DSP_CTRL0, 0x1, 27), 138a5c0fa44SUrja Rannikko .dither_down_en = VOP_REG(RK3036_DSP_CTRL0, 0x1, 11), 139a5c0fa44SUrja Rannikko .dither_down_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 10), 1409548e1b4SMark yao .cfg_done = VOP_REG_SYNC(RK3036_REG_CFG_DONE, 0x1, 0), 141b51502adSMark Yao }; 142b51502adSMark Yao 143b51502adSMark Yao static const struct vop_data rk3036_vop = { 144b51502adSMark Yao .intr = &rk3036_intr, 1459a61c54bSMark yao .common = &rk3036_common, 1469a61c54bSMark yao .modeset = &rk3036_modeset, 1479a61c54bSMark yao .output = &rk3036_output, 148b51502adSMark Yao .win = rk3036_vop_win_data, 149b51502adSMark Yao .win_size = ARRAY_SIZE(rk3036_vop_win_data), 150b51502adSMark Yao }; 151b51502adSMark Yao 152460c3b00SSandy Huang static const struct vop_win_phy rk3126_win1_data = { 153460c3b00SSandy Huang .data_formats = formats_win_lite, 154460c3b00SSandy Huang .nformats = ARRAY_SIZE(formats_win_lite), 155460c3b00SSandy Huang .enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1), 156460c3b00SSandy Huang .format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6), 157460c3b00SSandy Huang .rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19), 158460c3b00SSandy Huang .dsp_info = VOP_REG(RK3126_WIN1_DSP_INFO, 0x0fff0fff, 0), 159460c3b00SSandy Huang .dsp_st = VOP_REG(RK3126_WIN1_DSP_ST, 0x1fff1fff, 0), 160460c3b00SSandy Huang .yrgb_mst = VOP_REG(RK3126_WIN1_MST, 0xffffffff, 0), 161460c3b00SSandy Huang .yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0), 162460c3b00SSandy Huang }; 163460c3b00SSandy Huang 164460c3b00SSandy Huang static const struct vop_win_data rk3126_vop_win_data[] = { 165460c3b00SSandy Huang { .base = 0x00, .phy = &rk3036_win0_data, 166460c3b00SSandy Huang .type = DRM_PLANE_TYPE_PRIMARY }, 167460c3b00SSandy Huang { .base = 0x00, .phy = &rk3126_win1_data, 168460c3b00SSandy Huang .type = DRM_PLANE_TYPE_CURSOR }, 169460c3b00SSandy Huang }; 170460c3b00SSandy Huang 171460c3b00SSandy Huang static const struct vop_data rk3126_vop = { 172460c3b00SSandy Huang .intr = &rk3036_intr, 173460c3b00SSandy Huang .common = &rk3036_common, 174460c3b00SSandy Huang .modeset = &rk3036_modeset, 175460c3b00SSandy Huang .output = &rk3036_output, 176460c3b00SSandy Huang .win = rk3126_vop_win_data, 177460c3b00SSandy Huang .win_size = ARRAY_SIZE(rk3126_vop_win_data), 178460c3b00SSandy Huang }; 179460c3b00SSandy Huang 180570913e0SSandy Huang static const int px30_vop_intrs[] = { 181570913e0SSandy Huang FS_INTR, 182570913e0SSandy Huang 0, 0, 183570913e0SSandy Huang LINE_FLAG_INTR, 184570913e0SSandy Huang 0, 185570913e0SSandy Huang BUS_ERROR_INTR, 186570913e0SSandy Huang 0, 0, 187570913e0SSandy Huang DSP_HOLD_VALID_INTR, 188570913e0SSandy Huang }; 189570913e0SSandy Huang 190570913e0SSandy Huang static const struct vop_intr px30_intr = { 191570913e0SSandy Huang .intrs = px30_vop_intrs, 192570913e0SSandy Huang .nintrs = ARRAY_SIZE(px30_vop_intrs), 193a6edf839SSandy Huang .line_flag_num[0] = VOP_REG(PX30_LINE_FLAG, 0xfff, 0), 194a6edf839SSandy Huang .status = VOP_REG_MASK_SYNC(PX30_INTR_STATUS, 0xffff, 0), 195a6edf839SSandy Huang .enable = VOP_REG_MASK_SYNC(PX30_INTR_EN, 0xffff, 0), 196a6edf839SSandy Huang .clear = VOP_REG_MASK_SYNC(PX30_INTR_CLEAR, 0xffff, 0), 197570913e0SSandy Huang }; 198570913e0SSandy Huang 199570913e0SSandy Huang static const struct vop_common px30_common = { 200570913e0SSandy Huang .standby = VOP_REG_SYNC(PX30_SYS_CTRL2, 0x1, 1), 201570913e0SSandy Huang .out_mode = VOP_REG(PX30_DSP_CTRL2, 0xf, 16), 202570913e0SSandy Huang .dsp_blank = VOP_REG(PX30_DSP_CTRL2, 0x1, 14), 203a5c0fa44SUrja Rannikko .dither_down_en = VOP_REG(PX30_DSP_CTRL2, 0x1, 8), 204a5c0fa44SUrja Rannikko .dither_down_sel = VOP_REG(PX30_DSP_CTRL2, 0x1, 7), 205a5c0fa44SUrja Rannikko .dither_down_mode = VOP_REG(PX30_DSP_CTRL2, 0x1, 6), 206570913e0SSandy Huang .cfg_done = VOP_REG_SYNC(PX30_REG_CFG_DONE, 0x1, 0), 207570913e0SSandy Huang }; 208570913e0SSandy Huang 209570913e0SSandy Huang static const struct vop_modeset px30_modeset = { 210570913e0SSandy Huang .htotal_pw = VOP_REG(PX30_DSP_HTOTAL_HS_END, 0x0fff0fff, 0), 211570913e0SSandy Huang .hact_st_end = VOP_REG(PX30_DSP_HACT_ST_END, 0x0fff0fff, 0), 212570913e0SSandy Huang .vtotal_pw = VOP_REG(PX30_DSP_VTOTAL_VS_END, 0x0fff0fff, 0), 213570913e0SSandy Huang .vact_st_end = VOP_REG(PX30_DSP_VACT_ST_END, 0x0fff0fff, 0), 214570913e0SSandy Huang }; 215570913e0SSandy Huang 216570913e0SSandy Huang static const struct vop_output px30_output = { 217570913e0SSandy Huang .rgb_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0xf, 1), 218570913e0SSandy Huang .mipi_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0xf, 25), 219570913e0SSandy Huang .rgb_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 0), 220570913e0SSandy Huang .mipi_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 24), 221570913e0SSandy Huang }; 222570913e0SSandy Huang 223570913e0SSandy Huang static const struct vop_scl_regs px30_win_scl = { 224570913e0SSandy Huang .scale_yrgb_x = VOP_REG(PX30_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), 225570913e0SSandy Huang .scale_yrgb_y = VOP_REG(PX30_WIN0_SCL_FACTOR_YRGB, 0xffff, 16), 226570913e0SSandy Huang .scale_cbcr_x = VOP_REG(PX30_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), 227570913e0SSandy Huang .scale_cbcr_y = VOP_REG(PX30_WIN0_SCL_FACTOR_CBR, 0xffff, 16), 228570913e0SSandy Huang }; 229570913e0SSandy Huang 230570913e0SSandy Huang static const struct vop_win_phy px30_win0_data = { 231570913e0SSandy Huang .scl = &px30_win_scl, 232570913e0SSandy Huang .data_formats = formats_win_full, 233570913e0SSandy Huang .nformats = ARRAY_SIZE(formats_win_full), 234570913e0SSandy Huang .enable = VOP_REG(PX30_WIN0_CTRL0, 0x1, 0), 235570913e0SSandy Huang .format = VOP_REG(PX30_WIN0_CTRL0, 0x7, 1), 236570913e0SSandy Huang .rb_swap = VOP_REG(PX30_WIN0_CTRL0, 0x1, 12), 237570913e0SSandy Huang .act_info = VOP_REG(PX30_WIN0_ACT_INFO, 0xffffffff, 0), 238570913e0SSandy Huang .dsp_info = VOP_REG(PX30_WIN0_DSP_INFO, 0xffffffff, 0), 239570913e0SSandy Huang .dsp_st = VOP_REG(PX30_WIN0_DSP_ST, 0xffffffff, 0), 240570913e0SSandy Huang .yrgb_mst = VOP_REG(PX30_WIN0_YRGB_MST0, 0xffffffff, 0), 241570913e0SSandy Huang .uv_mst = VOP_REG(PX30_WIN0_CBR_MST0, 0xffffffff, 0), 242570913e0SSandy Huang .yrgb_vir = VOP_REG(PX30_WIN0_VIR, 0x1fff, 0), 243570913e0SSandy Huang .uv_vir = VOP_REG(PX30_WIN0_VIR, 0x1fff, 16), 244570913e0SSandy Huang }; 245570913e0SSandy Huang 246570913e0SSandy Huang static const struct vop_win_phy px30_win1_data = { 247570913e0SSandy Huang .data_formats = formats_win_lite, 248570913e0SSandy Huang .nformats = ARRAY_SIZE(formats_win_lite), 249570913e0SSandy Huang .enable = VOP_REG(PX30_WIN1_CTRL0, 0x1, 0), 250570913e0SSandy Huang .format = VOP_REG(PX30_WIN1_CTRL0, 0x7, 4), 251570913e0SSandy Huang .rb_swap = VOP_REG(PX30_WIN1_CTRL0, 0x1, 12), 252570913e0SSandy Huang .dsp_info = VOP_REG(PX30_WIN1_DSP_INFO, 0xffffffff, 0), 253570913e0SSandy Huang .dsp_st = VOP_REG(PX30_WIN1_DSP_ST, 0xffffffff, 0), 254570913e0SSandy Huang .yrgb_mst = VOP_REG(PX30_WIN1_MST, 0xffffffff, 0), 255570913e0SSandy Huang .yrgb_vir = VOP_REG(PX30_WIN1_VIR, 0x1fff, 0), 256570913e0SSandy Huang }; 257570913e0SSandy Huang 258570913e0SSandy Huang static const struct vop_win_phy px30_win2_data = { 259570913e0SSandy Huang .data_formats = formats_win_lite, 260570913e0SSandy Huang .nformats = ARRAY_SIZE(formats_win_lite), 261a6edf839SSandy Huang .gate = VOP_REG(PX30_WIN2_CTRL0, 0x1, 4), 262a6edf839SSandy Huang .enable = VOP_REG(PX30_WIN2_CTRL0, 0x1, 0), 263570913e0SSandy Huang .format = VOP_REG(PX30_WIN2_CTRL0, 0x3, 5), 264570913e0SSandy Huang .rb_swap = VOP_REG(PX30_WIN2_CTRL0, 0x1, 20), 265570913e0SSandy Huang .dsp_info = VOP_REG(PX30_WIN2_DSP_INFO0, 0x0fff0fff, 0), 266570913e0SSandy Huang .dsp_st = VOP_REG(PX30_WIN2_DSP_ST0, 0x1fff1fff, 0), 267570913e0SSandy Huang .yrgb_mst = VOP_REG(PX30_WIN2_MST0, 0xffffffff, 0), 268570913e0SSandy Huang .yrgb_vir = VOP_REG(PX30_WIN2_VIR0_1, 0x1fff, 0), 269570913e0SSandy Huang }; 270570913e0SSandy Huang 271570913e0SSandy Huang static const struct vop_win_data px30_vop_big_win_data[] = { 272570913e0SSandy Huang { .base = 0x00, .phy = &px30_win0_data, 273570913e0SSandy Huang .type = DRM_PLANE_TYPE_PRIMARY }, 274570913e0SSandy Huang { .base = 0x00, .phy = &px30_win1_data, 275570913e0SSandy Huang .type = DRM_PLANE_TYPE_OVERLAY }, 276570913e0SSandy Huang { .base = 0x00, .phy = &px30_win2_data, 277570913e0SSandy Huang .type = DRM_PLANE_TYPE_CURSOR }, 278570913e0SSandy Huang }; 279570913e0SSandy Huang 280570913e0SSandy Huang static const struct vop_data px30_vop_big = { 281570913e0SSandy Huang .intr = &px30_intr, 2828d544233SSandy Huang .feature = VOP_FEATURE_INTERNAL_RGB, 283570913e0SSandy Huang .common = &px30_common, 284570913e0SSandy Huang .modeset = &px30_modeset, 285570913e0SSandy Huang .output = &px30_output, 286570913e0SSandy Huang .win = px30_vop_big_win_data, 287570913e0SSandy Huang .win_size = ARRAY_SIZE(px30_vop_big_win_data), 288570913e0SSandy Huang }; 289570913e0SSandy Huang 290570913e0SSandy Huang static const struct vop_win_data px30_vop_lit_win_data[] = { 291570913e0SSandy Huang { .base = 0x00, .phy = &px30_win1_data, 292570913e0SSandy Huang .type = DRM_PLANE_TYPE_PRIMARY }, 293570913e0SSandy Huang }; 294570913e0SSandy Huang 295570913e0SSandy Huang static const struct vop_data px30_vop_lit = { 296570913e0SSandy Huang .intr = &px30_intr, 2978d544233SSandy Huang .feature = VOP_FEATURE_INTERNAL_RGB, 298570913e0SSandy Huang .common = &px30_common, 299570913e0SSandy Huang .modeset = &px30_modeset, 300570913e0SSandy Huang .output = &px30_output, 301570913e0SSandy Huang .win = px30_vop_lit_win_data, 302570913e0SSandy Huang .win_size = ARRAY_SIZE(px30_vop_lit_win_data), 303570913e0SSandy Huang }; 304570913e0SSandy Huang 305f4a6de85SMark Yao static const struct vop_scl_regs rk3066_win_scl = { 306f4a6de85SMark Yao .scale_yrgb_x = VOP_REG(RK3066_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), 307f4a6de85SMark Yao .scale_yrgb_y = VOP_REG(RK3066_WIN0_SCL_FACTOR_YRGB, 0xffff, 16), 308f4a6de85SMark Yao .scale_cbcr_x = VOP_REG(RK3066_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), 309f4a6de85SMark Yao .scale_cbcr_y = VOP_REG(RK3066_WIN0_SCL_FACTOR_CBR, 0xffff, 16), 310f4a6de85SMark Yao }; 311f4a6de85SMark Yao 312f4a6de85SMark Yao static const struct vop_win_phy rk3066_win0_data = { 313f4a6de85SMark Yao .scl = &rk3066_win_scl, 314f4a6de85SMark Yao .data_formats = formats_win_full, 315f4a6de85SMark Yao .nformats = ARRAY_SIZE(formats_win_full), 316f4a6de85SMark Yao .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 0), 317f4a6de85SMark Yao .format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 4), 318f4a6de85SMark Yao .rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 19), 319f4a6de85SMark Yao .act_info = VOP_REG(RK3066_WIN0_ACT_INFO, 0x1fff1fff, 0), 320f4a6de85SMark Yao .dsp_info = VOP_REG(RK3066_WIN0_DSP_INFO, 0x0fff0fff, 0), 321f4a6de85SMark Yao .dsp_st = VOP_REG(RK3066_WIN0_DSP_ST, 0x1fff1fff, 0), 322f4a6de85SMark Yao .yrgb_mst = VOP_REG(RK3066_WIN0_YRGB_MST0, 0xffffffff, 0), 323f4a6de85SMark Yao .uv_mst = VOP_REG(RK3066_WIN0_CBR_MST0, 0xffffffff, 0), 324f4a6de85SMark Yao .yrgb_vir = VOP_REG(RK3066_WIN0_VIR, 0xffff, 0), 325f4a6de85SMark Yao .uv_vir = VOP_REG(RK3066_WIN0_VIR, 0x1fff, 16), 326f4a6de85SMark Yao }; 327f4a6de85SMark Yao 328f4a6de85SMark Yao static const struct vop_win_phy rk3066_win1_data = { 329f4a6de85SMark Yao .scl = &rk3066_win_scl, 330f4a6de85SMark Yao .data_formats = formats_win_full, 331f4a6de85SMark Yao .nformats = ARRAY_SIZE(formats_win_full), 332f4a6de85SMark Yao .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 1), 333f4a6de85SMark Yao .format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 7), 334f4a6de85SMark Yao .rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 23), 335f4a6de85SMark Yao .act_info = VOP_REG(RK3066_WIN1_ACT_INFO, 0x1fff1fff, 0), 336f4a6de85SMark Yao .dsp_info = VOP_REG(RK3066_WIN1_DSP_INFO, 0x0fff0fff, 0), 337f4a6de85SMark Yao .dsp_st = VOP_REG(RK3066_WIN1_DSP_ST, 0x1fff1fff, 0), 338f4a6de85SMark Yao .yrgb_mst = VOP_REG(RK3066_WIN1_YRGB_MST, 0xffffffff, 0), 339f4a6de85SMark Yao .uv_mst = VOP_REG(RK3066_WIN1_CBR_MST, 0xffffffff, 0), 340f4a6de85SMark Yao .yrgb_vir = VOP_REG(RK3066_WIN1_VIR, 0xffff, 0), 341f4a6de85SMark Yao .uv_vir = VOP_REG(RK3066_WIN1_VIR, 0x1fff, 16), 342f4a6de85SMark Yao }; 343f4a6de85SMark Yao 344f4a6de85SMark Yao static const struct vop_win_phy rk3066_win2_data = { 345f4a6de85SMark Yao .data_formats = formats_win_lite, 346f4a6de85SMark Yao .nformats = ARRAY_SIZE(formats_win_lite), 347f4a6de85SMark Yao .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 2), 348f4a6de85SMark Yao .format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 10), 349f4a6de85SMark Yao .rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 27), 350f4a6de85SMark Yao .dsp_info = VOP_REG(RK3066_WIN2_DSP_INFO, 0x0fff0fff, 0), 351f4a6de85SMark Yao .dsp_st = VOP_REG(RK3066_WIN2_DSP_ST, 0x1fff1fff, 0), 352f4a6de85SMark Yao .yrgb_mst = VOP_REG(RK3066_WIN2_MST, 0xffffffff, 0), 353f4a6de85SMark Yao .yrgb_vir = VOP_REG(RK3066_WIN2_VIR, 0xffff, 0), 354f4a6de85SMark Yao }; 355f4a6de85SMark Yao 356f4a6de85SMark Yao static const struct vop_modeset rk3066_modeset = { 357f4a6de85SMark Yao .htotal_pw = VOP_REG(RK3066_DSP_HTOTAL_HS_END, 0x1fff1fff, 0), 358f4a6de85SMark Yao .hact_st_end = VOP_REG(RK3066_DSP_HACT_ST_END, 0x1fff1fff, 0), 359f4a6de85SMark Yao .vtotal_pw = VOP_REG(RK3066_DSP_VTOTAL_VS_END, 0x1fff1fff, 0), 360f4a6de85SMark Yao .vact_st_end = VOP_REG(RK3066_DSP_VACT_ST_END, 0x1fff1fff, 0), 361f4a6de85SMark Yao }; 362f4a6de85SMark Yao 363f4a6de85SMark Yao static const struct vop_output rk3066_output = { 364f4a6de85SMark Yao .pin_pol = VOP_REG(RK3066_DSP_CTRL0, 0x7, 4), 365f4a6de85SMark Yao }; 366f4a6de85SMark Yao 367f4a6de85SMark Yao static const struct vop_common rk3066_common = { 368f4a6de85SMark Yao .standby = VOP_REG(RK3066_SYS_CTRL0, 0x1, 1), 369f4a6de85SMark Yao .out_mode = VOP_REG(RK3066_DSP_CTRL0, 0xf, 0), 370f4a6de85SMark Yao .cfg_done = VOP_REG(RK3066_REG_CFG_DONE, 0x1, 0), 371a5c0fa44SUrja Rannikko .dither_down_en = VOP_REG(RK3066_DSP_CTRL0, 0x1, 11), 372a5c0fa44SUrja Rannikko .dither_down_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 10), 373f4a6de85SMark Yao .dsp_blank = VOP_REG(RK3066_DSP_CTRL1, 0x1, 24), 374f4a6de85SMark Yao }; 375f4a6de85SMark Yao 376f4a6de85SMark Yao static const struct vop_win_data rk3066_vop_win_data[] = { 377f4a6de85SMark Yao { .base = 0x00, .phy = &rk3066_win0_data, 378f4a6de85SMark Yao .type = DRM_PLANE_TYPE_PRIMARY }, 379f4a6de85SMark Yao { .base = 0x00, .phy = &rk3066_win1_data, 380f4a6de85SMark Yao .type = DRM_PLANE_TYPE_OVERLAY }, 381f4a6de85SMark Yao { .base = 0x00, .phy = &rk3066_win2_data, 382f4a6de85SMark Yao .type = DRM_PLANE_TYPE_CURSOR }, 383f4a6de85SMark Yao }; 384f4a6de85SMark Yao 385f4a6de85SMark Yao static const int rk3066_vop_intrs[] = { 386f4a6de85SMark Yao /* 387f4a6de85SMark Yao * hs_start interrupt fires at frame-start, so serves 388f4a6de85SMark Yao * the same purpose as dsp_hold in the driver. 389f4a6de85SMark Yao */ 390f4a6de85SMark Yao DSP_HOLD_VALID_INTR, 391f4a6de85SMark Yao FS_INTR, 392f4a6de85SMark Yao LINE_FLAG_INTR, 393f4a6de85SMark Yao BUS_ERROR_INTR, 394f4a6de85SMark Yao }; 395f4a6de85SMark Yao 396f4a6de85SMark Yao static const struct vop_intr rk3066_intr = { 397f4a6de85SMark Yao .intrs = rk3066_vop_intrs, 398f4a6de85SMark Yao .nintrs = ARRAY_SIZE(rk3066_vop_intrs), 399f4a6de85SMark Yao .line_flag_num[0] = VOP_REG(RK3066_INT_STATUS, 0xfff, 12), 400f4a6de85SMark Yao .status = VOP_REG(RK3066_INT_STATUS, 0xf, 0), 401f4a6de85SMark Yao .enable = VOP_REG(RK3066_INT_STATUS, 0xf, 4), 402f4a6de85SMark Yao .clear = VOP_REG(RK3066_INT_STATUS, 0xf, 8), 403f4a6de85SMark Yao }; 404f4a6de85SMark Yao 405f4a6de85SMark Yao static const struct vop_data rk3066_vop = { 406f4a6de85SMark Yao .version = VOP_VERSION(2, 1), 407f4a6de85SMark Yao .intr = &rk3066_intr, 408f4a6de85SMark Yao .common = &rk3066_common, 409f4a6de85SMark Yao .modeset = &rk3066_modeset, 410f4a6de85SMark Yao .output = &rk3066_output, 411f4a6de85SMark Yao .win = rk3066_vop_win_data, 412f4a6de85SMark Yao .win_size = ARRAY_SIZE(rk3066_vop_win_data), 413f4a6de85SMark Yao }; 414f4a6de85SMark Yao 415428e15ccSHeiko Stuebner static const struct vop_scl_regs rk3188_win_scl = { 416428e15ccSHeiko Stuebner .scale_yrgb_x = VOP_REG(RK3188_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), 417428e15ccSHeiko Stuebner .scale_yrgb_y = VOP_REG(RK3188_WIN0_SCL_FACTOR_YRGB, 0xffff, 16), 418428e15ccSHeiko Stuebner .scale_cbcr_x = VOP_REG(RK3188_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), 419428e15ccSHeiko Stuebner .scale_cbcr_y = VOP_REG(RK3188_WIN0_SCL_FACTOR_CBR, 0xffff, 16), 420428e15ccSHeiko Stuebner }; 421428e15ccSHeiko Stuebner 422428e15ccSHeiko Stuebner static const struct vop_win_phy rk3188_win0_data = { 423428e15ccSHeiko Stuebner .scl = &rk3188_win_scl, 424428e15ccSHeiko Stuebner .data_formats = formats_win_full, 425428e15ccSHeiko Stuebner .nformats = ARRAY_SIZE(formats_win_full), 426428e15ccSHeiko Stuebner .enable = VOP_REG(RK3188_SYS_CTRL, 0x1, 0), 427428e15ccSHeiko Stuebner .format = VOP_REG(RK3188_SYS_CTRL, 0x7, 3), 428428e15ccSHeiko Stuebner .rb_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 15), 429428e15ccSHeiko Stuebner .act_info = VOP_REG(RK3188_WIN0_ACT_INFO, 0x1fff1fff, 0), 430428e15ccSHeiko Stuebner .dsp_info = VOP_REG(RK3188_WIN0_DSP_INFO, 0x0fff0fff, 0), 431428e15ccSHeiko Stuebner .dsp_st = VOP_REG(RK3188_WIN0_DSP_ST, 0x1fff1fff, 0), 432428e15ccSHeiko Stuebner .yrgb_mst = VOP_REG(RK3188_WIN0_YRGB_MST0, 0xffffffff, 0), 433428e15ccSHeiko Stuebner .uv_mst = VOP_REG(RK3188_WIN0_CBR_MST0, 0xffffffff, 0), 434428e15ccSHeiko Stuebner .yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 0), 435428e15ccSHeiko Stuebner }; 436428e15ccSHeiko Stuebner 437428e15ccSHeiko Stuebner static const struct vop_win_phy rk3188_win1_data = { 438428e15ccSHeiko Stuebner .data_formats = formats_win_lite, 439428e15ccSHeiko Stuebner .nformats = ARRAY_SIZE(formats_win_lite), 440428e15ccSHeiko Stuebner .enable = VOP_REG(RK3188_SYS_CTRL, 0x1, 1), 441428e15ccSHeiko Stuebner .format = VOP_REG(RK3188_SYS_CTRL, 0x7, 6), 442428e15ccSHeiko Stuebner .rb_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 19), 443428e15ccSHeiko Stuebner /* no act_info on window1 */ 444428e15ccSHeiko Stuebner .dsp_info = VOP_REG(RK3188_WIN1_DSP_INFO, 0x07ff07ff, 0), 445428e15ccSHeiko Stuebner .dsp_st = VOP_REG(RK3188_WIN1_DSP_ST, 0x0fff0fff, 0), 446428e15ccSHeiko Stuebner .yrgb_mst = VOP_REG(RK3188_WIN1_MST, 0xffffffff, 0), 447428e15ccSHeiko Stuebner .yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 16), 448428e15ccSHeiko Stuebner }; 449428e15ccSHeiko Stuebner 450428e15ccSHeiko Stuebner static const struct vop_modeset rk3188_modeset = { 451428e15ccSHeiko Stuebner .htotal_pw = VOP_REG(RK3188_DSP_HTOTAL_HS_END, 0x0fff0fff, 0), 452428e15ccSHeiko Stuebner .hact_st_end = VOP_REG(RK3188_DSP_HACT_ST_END, 0x0fff0fff, 0), 453428e15ccSHeiko Stuebner .vtotal_pw = VOP_REG(RK3188_DSP_VTOTAL_VS_END, 0x0fff0fff, 0), 454428e15ccSHeiko Stuebner .vact_st_end = VOP_REG(RK3188_DSP_VACT_ST_END, 0x0fff0fff, 0), 455428e15ccSHeiko Stuebner }; 456428e15ccSHeiko Stuebner 457428e15ccSHeiko Stuebner static const struct vop_output rk3188_output = { 458428e15ccSHeiko Stuebner .pin_pol = VOP_REG(RK3188_DSP_CTRL0, 0xf, 4), 459428e15ccSHeiko Stuebner }; 460428e15ccSHeiko Stuebner 461428e15ccSHeiko Stuebner static const struct vop_common rk3188_common = { 462428e15ccSHeiko Stuebner .gate_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 31), 463428e15ccSHeiko Stuebner .standby = VOP_REG(RK3188_SYS_CTRL, 0x1, 30), 464428e15ccSHeiko Stuebner .out_mode = VOP_REG(RK3188_DSP_CTRL0, 0xf, 0), 465428e15ccSHeiko Stuebner .cfg_done = VOP_REG(RK3188_REG_CFG_DONE, 0x1, 0), 466a5c0fa44SUrja Rannikko .dither_down_sel = VOP_REG(RK3188_DSP_CTRL0, 0x1, 27), 467a5c0fa44SUrja Rannikko .dither_down_en = VOP_REG(RK3188_DSP_CTRL0, 0x1, 11), 468a5c0fa44SUrja Rannikko .dither_down_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 10), 469428e15ccSHeiko Stuebner .dsp_blank = VOP_REG(RK3188_DSP_CTRL1, 0x3, 24), 470428e15ccSHeiko Stuebner }; 471428e15ccSHeiko Stuebner 472428e15ccSHeiko Stuebner static const struct vop_win_data rk3188_vop_win_data[] = { 473428e15ccSHeiko Stuebner { .base = 0x00, .phy = &rk3188_win0_data, 474428e15ccSHeiko Stuebner .type = DRM_PLANE_TYPE_PRIMARY }, 475428e15ccSHeiko Stuebner { .base = 0x00, .phy = &rk3188_win1_data, 476428e15ccSHeiko Stuebner .type = DRM_PLANE_TYPE_CURSOR }, 477428e15ccSHeiko Stuebner }; 478428e15ccSHeiko Stuebner 479428e15ccSHeiko Stuebner static const int rk3188_vop_intrs[] = { 4804f297df8SHeiko Stuebner /* 4814f297df8SHeiko Stuebner * hs_start interrupt fires at frame-start, so serves 4824f297df8SHeiko Stuebner * the same purpose as dsp_hold in the driver. 4834f297df8SHeiko Stuebner */ 4844f297df8SHeiko Stuebner DSP_HOLD_VALID_INTR, 485428e15ccSHeiko Stuebner FS_INTR, 486428e15ccSHeiko Stuebner LINE_FLAG_INTR, 487428e15ccSHeiko Stuebner BUS_ERROR_INTR, 488428e15ccSHeiko Stuebner }; 489428e15ccSHeiko Stuebner 490428e15ccSHeiko Stuebner static const struct vop_intr rk3188_vop_intr = { 491428e15ccSHeiko Stuebner .intrs = rk3188_vop_intrs, 492428e15ccSHeiko Stuebner .nintrs = ARRAY_SIZE(rk3188_vop_intrs), 493428e15ccSHeiko Stuebner .line_flag_num[0] = VOP_REG(RK3188_INT_STATUS, 0xfff, 12), 494428e15ccSHeiko Stuebner .status = VOP_REG(RK3188_INT_STATUS, 0xf, 0), 495428e15ccSHeiko Stuebner .enable = VOP_REG(RK3188_INT_STATUS, 0xf, 4), 496428e15ccSHeiko Stuebner .clear = VOP_REG(RK3188_INT_STATUS, 0xf, 8), 497428e15ccSHeiko Stuebner }; 498428e15ccSHeiko Stuebner 499428e15ccSHeiko Stuebner static const struct vop_data rk3188_vop = { 500428e15ccSHeiko Stuebner .intr = &rk3188_vop_intr, 501428e15ccSHeiko Stuebner .common = &rk3188_common, 502428e15ccSHeiko Stuebner .modeset = &rk3188_modeset, 503428e15ccSHeiko Stuebner .output = &rk3188_output, 504428e15ccSHeiko Stuebner .win = rk3188_vop_win_data, 505428e15ccSHeiko Stuebner .win_size = ARRAY_SIZE(rk3188_vop_win_data), 506428e15ccSHeiko Stuebner .feature = VOP_FEATURE_INTERNAL_RGB, 507428e15ccSHeiko Stuebner }; 508428e15ccSHeiko Stuebner 509f7673453SMark Yao static const struct vop_scl_extension rk3288_win_full_scl_ext = { 510f7673453SMark Yao .cbcr_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 31), 511f7673453SMark Yao .cbcr_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 30), 512f7673453SMark Yao .cbcr_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 28), 513f7673453SMark Yao .cbcr_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 26), 514f7673453SMark Yao .cbcr_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 24), 515f7673453SMark Yao .yrgb_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 23), 516f7673453SMark Yao .yrgb_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 22), 517f7673453SMark Yao .yrgb_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 20), 518f7673453SMark Yao .yrgb_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 18), 519f7673453SMark Yao .yrgb_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 16), 520f7673453SMark Yao .line_load_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 15), 521f7673453SMark Yao .cbcr_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0x7, 12), 522f7673453SMark Yao .yrgb_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0xf, 8), 523f7673453SMark Yao .vsd_cbcr_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 7), 524f7673453SMark Yao .vsd_cbcr_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 6), 525f7673453SMark Yao .vsd_yrgb_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 5), 526f7673453SMark Yao .vsd_yrgb_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 4), 527f7673453SMark Yao .bic_coe_sel = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 2), 528f7673453SMark Yao .cbcr_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 1), 529f7673453SMark Yao .yrgb_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 0), 530f7673453SMark Yao .lb_mode = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 5), 5311194fffbSMark Yao }; 5321194fffbSMark Yao 533f7673453SMark Yao static const struct vop_scl_regs rk3288_win_full_scl = { 534f7673453SMark Yao .ext = &rk3288_win_full_scl_ext, 535f7673453SMark Yao .scale_yrgb_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), 536f7673453SMark Yao .scale_yrgb_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 16), 537f7673453SMark Yao .scale_cbcr_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), 538f7673453SMark Yao .scale_cbcr_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 16), 539a67719d1SMark Yao }; 540a67719d1SMark Yao 541f7673453SMark Yao static const struct vop_win_phy rk3288_win01_data = { 542f7673453SMark Yao .scl = &rk3288_win_full_scl, 543f7673453SMark Yao .data_formats = formats_win_full, 544f7673453SMark Yao .nformats = ARRAY_SIZE(formats_win_full), 545f7673453SMark Yao .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0), 546f7673453SMark Yao .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1), 547f7673453SMark Yao .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12), 548f7673453SMark Yao .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0), 549f7673453SMark Yao .dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0), 550f7673453SMark Yao .dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0), 551f7673453SMark Yao .yrgb_mst = VOP_REG(RK3288_WIN0_YRGB_MST, 0xffffffff, 0), 552f7673453SMark Yao .uv_mst = VOP_REG(RK3288_WIN0_CBR_MST, 0xffffffff, 0), 553f7673453SMark Yao .yrgb_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 0), 554f7673453SMark Yao .uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16), 555f7673453SMark Yao .src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0), 556f7673453SMark Yao .dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0), 5579dd2aca4SMark yao .channel = VOP_REG(RK3288_WIN0_CTRL2, 0xff, 0), 558a67719d1SMark Yao }; 559a67719d1SMark Yao 560f7673453SMark Yao static const struct vop_win_phy rk3288_win23_data = { 561f7673453SMark Yao .data_formats = formats_win_lite, 562f7673453SMark Yao .nformats = ARRAY_SIZE(formats_win_lite), 56360b7ae7fSMark yao .enable = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 4), 56460b7ae7fSMark yao .gate = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0), 565f7673453SMark Yao .format = VOP_REG(RK3288_WIN2_CTRL0, 0x7, 1), 566f7673453SMark Yao .rb_swap = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 12), 567f7673453SMark Yao .dsp_info = VOP_REG(RK3288_WIN2_DSP_INFO0, 0x0fff0fff, 0), 568f7673453SMark Yao .dsp_st = VOP_REG(RK3288_WIN2_DSP_ST0, 0x1fff1fff, 0), 569f7673453SMark Yao .yrgb_mst = VOP_REG(RK3288_WIN2_MST0, 0xffffffff, 0), 570f7673453SMark Yao .yrgb_vir = VOP_REG(RK3288_WIN2_VIR0_1, 0x1fff, 0), 571f7673453SMark Yao .src_alpha_ctl = VOP_REG(RK3288_WIN2_SRC_ALPHA_CTRL, 0xff, 0), 572f7673453SMark Yao .dst_alpha_ctl = VOP_REG(RK3288_WIN2_DST_ALPHA_CTRL, 0xff, 0), 573a67719d1SMark Yao }; 574a67719d1SMark Yao 5759a61c54bSMark yao static const struct vop_modeset rk3288_modeset = { 576f7673453SMark Yao .htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0), 577f7673453SMark Yao .hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0), 578f7673453SMark Yao .vtotal_pw = VOP_REG(RK3288_DSP_VTOTAL_VS_END, 0x1fff1fff, 0), 579f7673453SMark Yao .vact_st_end = VOP_REG(RK3288_DSP_VACT_ST_END, 0x1fff1fff, 0), 580f7673453SMark Yao .hpost_st_end = VOP_REG(RK3288_POST_DSP_HACT_INFO, 0x1fff1fff, 0), 581f7673453SMark Yao .vpost_st_end = VOP_REG(RK3288_POST_DSP_VACT_INFO, 0x1fff1fff, 0), 5829a61c54bSMark yao }; 5839a61c54bSMark yao 5849a61c54bSMark yao static const struct vop_output rk3288_output = { 5859a61c54bSMark yao .pin_pol = VOP_REG(RK3288_DSP_CTRL0, 0xf, 4), 5869a61c54bSMark yao .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12), 5879a61c54bSMark yao .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13), 5889a61c54bSMark yao .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14), 5899a61c54bSMark yao .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15), 5909a61c54bSMark yao }; 5919a61c54bSMark yao 5929a61c54bSMark yao static const struct vop_common rk3288_common = { 5939a61c54bSMark yao .standby = VOP_REG_SYNC(RK3288_SYS_CTRL, 0x1, 22), 5949a61c54bSMark yao .gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23), 5959a61c54bSMark yao .mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20), 596a5c0fa44SUrja Rannikko .dither_down_sel = VOP_REG(RK3288_DSP_CTRL1, 0x1, 4), 597a5c0fa44SUrja Rannikko .dither_down_mode = VOP_REG(RK3288_DSP_CTRL1, 0x1, 3), 598a5c0fa44SUrja Rannikko .dither_down_en = VOP_REG(RK3288_DSP_CTRL1, 0x1, 2), 5996bda8112SMark Yao .pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1), 6009a61c54bSMark yao .dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6), 6019a61c54bSMark yao .data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19), 6029a61c54bSMark yao .dsp_blank = VOP_REG(RK3288_DSP_CTRL0, 0x3, 18), 6039a61c54bSMark yao .out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0), 6049548e1b4SMark yao .cfg_done = VOP_REG_SYNC(RK3288_REG_CFG_DONE, 0x1, 0), 605a67719d1SMark Yao }; 606a67719d1SMark Yao 607a67719d1SMark Yao /* 608a67719d1SMark Yao * Note: rk3288 has a dedicated 'cursor' window, however, that window requires 609a67719d1SMark Yao * special support to get alpha blending working. For now, just use overlay 610a67719d1SMark Yao * window 3 for the drm cursor. 611a67719d1SMark Yao * 612a67719d1SMark Yao */ 613a67719d1SMark Yao static const struct vop_win_data rk3288_vop_win_data[] = { 614f7673453SMark Yao { .base = 0x00, .phy = &rk3288_win01_data, 615f7673453SMark Yao .type = DRM_PLANE_TYPE_PRIMARY }, 616f7673453SMark Yao { .base = 0x40, .phy = &rk3288_win01_data, 617f7673453SMark Yao .type = DRM_PLANE_TYPE_OVERLAY }, 618f7673453SMark Yao { .base = 0x00, .phy = &rk3288_win23_data, 619f7673453SMark Yao .type = DRM_PLANE_TYPE_OVERLAY }, 620f7673453SMark Yao { .base = 0x50, .phy = &rk3288_win23_data, 621f7673453SMark Yao .type = DRM_PLANE_TYPE_CURSOR }, 622a67719d1SMark Yao }; 623a67719d1SMark Yao 624a67719d1SMark Yao static const int rk3288_vop_intrs[] = { 625a67719d1SMark Yao DSP_HOLD_VALID_INTR, 626a67719d1SMark Yao FS_INTR, 627a67719d1SMark Yao LINE_FLAG_INTR, 628a67719d1SMark Yao BUS_ERROR_INTR, 629a67719d1SMark Yao }; 630a67719d1SMark Yao 631a67719d1SMark Yao static const struct vop_intr rk3288_vop_intr = { 632a67719d1SMark Yao .intrs = rk3288_vop_intrs, 633a67719d1SMark Yao .nintrs = ARRAY_SIZE(rk3288_vop_intrs), 634ac6560dfSMark yao .line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12), 635f7673453SMark Yao .status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0), 636f7673453SMark Yao .enable = VOP_REG(RK3288_INTR_CTRL0, 0xf, 4), 637f7673453SMark Yao .clear = VOP_REG(RK3288_INTR_CTRL0, 0xf, 8), 638a67719d1SMark Yao }; 639a67719d1SMark Yao 640a67719d1SMark Yao static const struct vop_data rk3288_vop = { 641eb5cb6aaSMark yao .version = VOP_VERSION(3, 1), 642efd11cc8SMark yao .feature = VOP_FEATURE_OUTPUT_RGB10, 643a67719d1SMark Yao .intr = &rk3288_vop_intr, 6449a61c54bSMark yao .common = &rk3288_common, 6459a61c54bSMark yao .modeset = &rk3288_modeset, 6469a61c54bSMark yao .output = &rk3288_output, 647a67719d1SMark Yao .win = rk3288_vop_win_data, 648a67719d1SMark Yao .win_size = ARRAY_SIZE(rk3288_vop_win_data), 649a67719d1SMark Yao }; 650a67719d1SMark Yao 651eb5cb6aaSMark yao static const int rk3368_vop_intrs[] = { 6520a63bfd0SMark Yao FS_INTR, 6530a63bfd0SMark Yao 0, 0, 6540a63bfd0SMark Yao LINE_FLAG_INTR, 6550a63bfd0SMark Yao 0, 6560a63bfd0SMark Yao BUS_ERROR_INTR, 6570a63bfd0SMark Yao 0, 0, 0, 0, 0, 0, 0, 6580a63bfd0SMark Yao DSP_HOLD_VALID_INTR, 659f7673453SMark Yao }; 660f7673453SMark Yao 661eb5cb6aaSMark yao static const struct vop_intr rk3368_vop_intr = { 662eb5cb6aaSMark yao .intrs = rk3368_vop_intrs, 663eb5cb6aaSMark yao .nintrs = ARRAY_SIZE(rk3368_vop_intrs), 664eb5cb6aaSMark yao .line_flag_num[0] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 0), 665eb5cb6aaSMark yao .line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16), 666eb5cb6aaSMark yao .status = VOP_REG_MASK_SYNC(RK3368_INTR_STATUS, 0x3fff, 0), 667eb5cb6aaSMark yao .enable = VOP_REG_MASK_SYNC(RK3368_INTR_EN, 0x3fff, 0), 668eb5cb6aaSMark yao .clear = VOP_REG_MASK_SYNC(RK3368_INTR_CLEAR, 0x3fff, 0), 669eb5cb6aaSMark yao }; 670eb5cb6aaSMark yao 671fbb1c738SEzequiel Garcia static const struct vop_win_phy rk3368_win01_data = { 672fbb1c738SEzequiel Garcia .scl = &rk3288_win_full_scl, 673fbb1c738SEzequiel Garcia .data_formats = formats_win_full, 674fbb1c738SEzequiel Garcia .nformats = ARRAY_SIZE(formats_win_full), 675fbb1c738SEzequiel Garcia .enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0), 676fbb1c738SEzequiel Garcia .format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1), 677fbb1c738SEzequiel Garcia .rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12), 678677e8bbcSDaniele Castagna .x_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 21), 679677e8bbcSDaniele Castagna .y_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 22), 680fbb1c738SEzequiel Garcia .act_info = VOP_REG(RK3368_WIN0_ACT_INFO, 0x1fff1fff, 0), 681fbb1c738SEzequiel Garcia .dsp_info = VOP_REG(RK3368_WIN0_DSP_INFO, 0x0fff0fff, 0), 682fbb1c738SEzequiel Garcia .dsp_st = VOP_REG(RK3368_WIN0_DSP_ST, 0x1fff1fff, 0), 683fbb1c738SEzequiel Garcia .yrgb_mst = VOP_REG(RK3368_WIN0_YRGB_MST, 0xffffffff, 0), 684fbb1c738SEzequiel Garcia .uv_mst = VOP_REG(RK3368_WIN0_CBR_MST, 0xffffffff, 0), 685fbb1c738SEzequiel Garcia .yrgb_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 0), 686fbb1c738SEzequiel Garcia .uv_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 16), 687fbb1c738SEzequiel Garcia .src_alpha_ctl = VOP_REG(RK3368_WIN0_SRC_ALPHA_CTRL, 0xff, 0), 688fbb1c738SEzequiel Garcia .dst_alpha_ctl = VOP_REG(RK3368_WIN0_DST_ALPHA_CTRL, 0xff, 0), 689fbb1c738SEzequiel Garcia .channel = VOP_REG(RK3368_WIN0_CTRL2, 0xff, 0), 690fbb1c738SEzequiel Garcia }; 691fbb1c738SEzequiel Garcia 692eb5cb6aaSMark yao static const struct vop_win_phy rk3368_win23_data = { 693eb5cb6aaSMark yao .data_formats = formats_win_lite, 694eb5cb6aaSMark yao .nformats = ARRAY_SIZE(formats_win_lite), 695eb5cb6aaSMark yao .gate = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 0), 696eb5cb6aaSMark yao .enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 4), 697eb5cb6aaSMark yao .format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5), 698eb5cb6aaSMark yao .rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 20), 699677e8bbcSDaniele Castagna .y_mir_en = VOP_REG(RK3368_WIN2_CTRL1, 0x1, 15), 700eb5cb6aaSMark yao .dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO0, 0x0fff0fff, 0), 701eb5cb6aaSMark yao .dsp_st = VOP_REG(RK3368_WIN2_DSP_ST0, 0x1fff1fff, 0), 702eb5cb6aaSMark yao .yrgb_mst = VOP_REG(RK3368_WIN2_MST0, 0xffffffff, 0), 703eb5cb6aaSMark yao .yrgb_vir = VOP_REG(RK3368_WIN2_VIR0_1, 0x1fff, 0), 704eb5cb6aaSMark yao .src_alpha_ctl = VOP_REG(RK3368_WIN2_SRC_ALPHA_CTRL, 0xff, 0), 705eb5cb6aaSMark yao .dst_alpha_ctl = VOP_REG(RK3368_WIN2_DST_ALPHA_CTRL, 0xff, 0), 706eb5cb6aaSMark yao }; 707eb5cb6aaSMark yao 708eb5cb6aaSMark yao static const struct vop_win_data rk3368_vop_win_data[] = { 709fbb1c738SEzequiel Garcia { .base = 0x00, .phy = &rk3368_win01_data, 710eb5cb6aaSMark yao .type = DRM_PLANE_TYPE_PRIMARY }, 711fbb1c738SEzequiel Garcia { .base = 0x40, .phy = &rk3368_win01_data, 712eb5cb6aaSMark yao .type = DRM_PLANE_TYPE_OVERLAY }, 713eb5cb6aaSMark yao { .base = 0x00, .phy = &rk3368_win23_data, 714eb5cb6aaSMark yao .type = DRM_PLANE_TYPE_OVERLAY }, 715eb5cb6aaSMark yao { .base = 0x50, .phy = &rk3368_win23_data, 716eb5cb6aaSMark yao .type = DRM_PLANE_TYPE_CURSOR }, 717eb5cb6aaSMark yao }; 718eb5cb6aaSMark yao 719eb5cb6aaSMark yao static const struct vop_output rk3368_output = { 720eb5cb6aaSMark yao .rgb_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 16), 721eb5cb6aaSMark yao .hdmi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 20), 722eb5cb6aaSMark yao .edp_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 24), 723eb5cb6aaSMark yao .mipi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 28), 724eb5cb6aaSMark yao .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12), 725eb5cb6aaSMark yao .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13), 726eb5cb6aaSMark yao .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14), 727eb5cb6aaSMark yao .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15), 728eb5cb6aaSMark yao }; 729eb5cb6aaSMark yao 730eb5cb6aaSMark yao static const struct vop_misc rk3368_misc = { 731eb5cb6aaSMark yao .global_regdone_en = VOP_REG(RK3368_SYS_CTRL, 0x1, 11), 732eb5cb6aaSMark yao }; 733eb5cb6aaSMark yao 734eb5cb6aaSMark yao static const struct vop_data rk3368_vop = { 735eb5cb6aaSMark yao .version = VOP_VERSION(3, 2), 736eb5cb6aaSMark yao .intr = &rk3368_vop_intr, 737eb5cb6aaSMark yao .common = &rk3288_common, 738eb5cb6aaSMark yao .modeset = &rk3288_modeset, 739eb5cb6aaSMark yao .output = &rk3368_output, 740eb5cb6aaSMark yao .misc = &rk3368_misc, 741eb5cb6aaSMark yao .win = rk3368_vop_win_data, 742eb5cb6aaSMark yao .win_size = ARRAY_SIZE(rk3368_vop_win_data), 743eb5cb6aaSMark yao }; 744eb5cb6aaSMark yao 745eb5cb6aaSMark yao static const struct vop_intr rk3366_vop_intr = { 746eb5cb6aaSMark yao .intrs = rk3368_vop_intrs, 747eb5cb6aaSMark yao .nintrs = ARRAY_SIZE(rk3368_vop_intrs), 748eb5cb6aaSMark yao .line_flag_num[0] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 0), 749eb5cb6aaSMark yao .line_flag_num[1] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 16), 750eb5cb6aaSMark yao .status = VOP_REG_MASK_SYNC(RK3366_INTR_STATUS0, 0xffff, 0), 751eb5cb6aaSMark yao .enable = VOP_REG_MASK_SYNC(RK3366_INTR_EN0, 0xffff, 0), 752eb5cb6aaSMark yao .clear = VOP_REG_MASK_SYNC(RK3366_INTR_CLEAR0, 0xffff, 0), 753eb5cb6aaSMark yao }; 754eb5cb6aaSMark yao 755eb5cb6aaSMark yao static const struct vop_data rk3366_vop = { 756eb5cb6aaSMark yao .version = VOP_VERSION(3, 4), 757eb5cb6aaSMark yao .intr = &rk3366_vop_intr, 758eb5cb6aaSMark yao .common = &rk3288_common, 759eb5cb6aaSMark yao .modeset = &rk3288_modeset, 760eb5cb6aaSMark yao .output = &rk3368_output, 761eb5cb6aaSMark yao .misc = &rk3368_misc, 762eb5cb6aaSMark yao .win = rk3368_vop_win_data, 763eb5cb6aaSMark yao .win_size = ARRAY_SIZE(rk3368_vop_win_data), 764f7673453SMark Yao }; 765f7673453SMark Yao 7669a61c54bSMark yao static const struct vop_output rk3399_output = { 7679a61c54bSMark yao .dp_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0xf, 16), 768eb5cb6aaSMark yao .rgb_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 16), 769eb5cb6aaSMark yao .hdmi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 20), 770eb5cb6aaSMark yao .edp_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 24), 771eb5cb6aaSMark yao .mipi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 28), 7729a61c54bSMark yao .dp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 11), 7739a61c54bSMark yao .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12), 7749a61c54bSMark yao .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13), 7759a61c54bSMark yao .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14), 7769a61c54bSMark yao .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15), 777cf6d100dSHeiko Stuebner .mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3), 7789a61c54bSMark yao }; 7799a61c54bSMark yao 7801c21aa8fSDaniele Castagna static const struct vop_yuv2yuv_phy rk3399_yuv2yuv_win01_data = { 7811c21aa8fSDaniele Castagna .y2r_coefficients = { 7821c21aa8fSDaniele Castagna VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 0), 7831c21aa8fSDaniele Castagna VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 16), 7841c21aa8fSDaniele Castagna VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 4, 0xffff, 0), 7851c21aa8fSDaniele Castagna VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 4, 0xffff, 16), 7861c21aa8fSDaniele Castagna VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 8, 0xffff, 0), 7871c21aa8fSDaniele Castagna VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 8, 0xffff, 16), 7881c21aa8fSDaniele Castagna VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 12, 0xffff, 0), 7891c21aa8fSDaniele Castagna VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 12, 0xffff, 16), 7901c21aa8fSDaniele Castagna VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 16, 0xffff, 0), 7911c21aa8fSDaniele Castagna VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 20, 0xffffffff, 0), 7921c21aa8fSDaniele Castagna VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 24, 0xffffffff, 0), 7931c21aa8fSDaniele Castagna VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 28, 0xffffffff, 0), 7941c21aa8fSDaniele Castagna }, 7951c21aa8fSDaniele Castagna }; 7961c21aa8fSDaniele Castagna 7971c21aa8fSDaniele Castagna static const struct vop_yuv2yuv_phy rk3399_yuv2yuv_win23_data = { }; 7981c21aa8fSDaniele Castagna 7991c21aa8fSDaniele Castagna static const struct vop_win_yuv2yuv_data rk3399_vop_big_win_yuv2yuv_data[] = { 8001c21aa8fSDaniele Castagna { .base = 0x00, .phy = &rk3399_yuv2yuv_win01_data, 8011c21aa8fSDaniele Castagna .y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 1) }, 8021c21aa8fSDaniele Castagna { .base = 0x60, .phy = &rk3399_yuv2yuv_win01_data, 8031c21aa8fSDaniele Castagna .y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 9) }, 8041c21aa8fSDaniele Castagna { .base = 0xC0, .phy = &rk3399_yuv2yuv_win23_data }, 8051c21aa8fSDaniele Castagna { .base = 0x120, .phy = &rk3399_yuv2yuv_win23_data }, 8061c21aa8fSDaniele Castagna }; 8071c21aa8fSDaniele Castagna 8080a63bfd0SMark Yao static const struct vop_data rk3399_vop_big = { 809eb5cb6aaSMark yao .version = VOP_VERSION(3, 5), 810efd11cc8SMark yao .feature = VOP_FEATURE_OUTPUT_RGB10, 811eb5cb6aaSMark yao .intr = &rk3366_vop_intr, 8129a61c54bSMark yao .common = &rk3288_common, 8139a61c54bSMark yao .modeset = &rk3288_modeset, 8149a61c54bSMark yao .output = &rk3399_output, 815eb5cb6aaSMark yao .misc = &rk3368_misc, 816eb5cb6aaSMark yao .win = rk3368_vop_win_data, 817eb5cb6aaSMark yao .win_size = ARRAY_SIZE(rk3368_vop_win_data), 8181c21aa8fSDaniele Castagna .win_yuv2yuv = rk3399_vop_big_win_yuv2yuv_data, 8190a63bfd0SMark Yao }; 8200a63bfd0SMark Yao 8210a63bfd0SMark Yao static const struct vop_win_data rk3399_vop_lit_win_data[] = { 822fbb1c738SEzequiel Garcia { .base = 0x00, .phy = &rk3368_win01_data, 823f7673453SMark Yao .type = DRM_PLANE_TYPE_PRIMARY }, 824eb5cb6aaSMark yao { .base = 0x00, .phy = &rk3368_win23_data, 825f7673453SMark Yao .type = DRM_PLANE_TYPE_CURSOR}, 826f7673453SMark Yao }; 827f7673453SMark Yao 8281c21aa8fSDaniele Castagna static const struct vop_win_yuv2yuv_data rk3399_vop_lit_win_yuv2yuv_data[] = { 8291c21aa8fSDaniele Castagna { .base = 0x00, .phy = &rk3399_yuv2yuv_win01_data, 8301c21aa8fSDaniele Castagna .y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 1)}, 8311c21aa8fSDaniele Castagna { .base = 0x60, .phy = &rk3399_yuv2yuv_win23_data }, 8321c21aa8fSDaniele Castagna }; 8331c21aa8fSDaniele Castagna 8340a63bfd0SMark Yao static const struct vop_data rk3399_vop_lit = { 835eb5cb6aaSMark yao .version = VOP_VERSION(3, 6), 836eb5cb6aaSMark yao .intr = &rk3366_vop_intr, 8379a61c54bSMark yao .common = &rk3288_common, 8389a61c54bSMark yao .modeset = &rk3288_modeset, 8399a61c54bSMark yao .output = &rk3399_output, 840eb5cb6aaSMark yao .misc = &rk3368_misc, 8410a63bfd0SMark Yao .win = rk3399_vop_lit_win_data, 8420a63bfd0SMark Yao .win_size = ARRAY_SIZE(rk3399_vop_lit_win_data), 8431c21aa8fSDaniele Castagna .win_yuv2yuv = rk3399_vop_lit_win_yuv2yuv_data, 844f7673453SMark Yao }; 845f7673453SMark Yao 846eb5cb6aaSMark yao static const struct vop_win_data rk3228_vop_win_data[] = { 847eb5cb6aaSMark yao { .base = 0x00, .phy = &rk3288_win01_data, 848eb5cb6aaSMark yao .type = DRM_PLANE_TYPE_PRIMARY }, 849eb5cb6aaSMark yao { .base = 0x40, .phy = &rk3288_win01_data, 850eb5cb6aaSMark yao .type = DRM_PLANE_TYPE_CURSOR }, 851eb5cb6aaSMark yao }; 852eb5cb6aaSMark yao 853eb5cb6aaSMark yao static const struct vop_data rk3228_vop = { 854eb5cb6aaSMark yao .version = VOP_VERSION(3, 7), 855eb5cb6aaSMark yao .feature = VOP_FEATURE_OUTPUT_RGB10, 856eb5cb6aaSMark yao .intr = &rk3366_vop_intr, 857eb5cb6aaSMark yao .common = &rk3288_common, 858eb5cb6aaSMark yao .modeset = &rk3288_modeset, 859eb5cb6aaSMark yao .output = &rk3399_output, 860eb5cb6aaSMark yao .misc = &rk3368_misc, 861eb5cb6aaSMark yao .win = rk3228_vop_win_data, 862eb5cb6aaSMark yao .win_size = ARRAY_SIZE(rk3228_vop_win_data), 863eb5cb6aaSMark yao }; 864eb5cb6aaSMark yao 865eb5cb6aaSMark yao static const struct vop_modeset rk3328_modeset = { 866eb5cb6aaSMark yao .htotal_pw = VOP_REG(RK3328_DSP_HTOTAL_HS_END, 0x1fff1fff, 0), 867eb5cb6aaSMark yao .hact_st_end = VOP_REG(RK3328_DSP_HACT_ST_END, 0x1fff1fff, 0), 868eb5cb6aaSMark yao .vtotal_pw = VOP_REG(RK3328_DSP_VTOTAL_VS_END, 0x1fff1fff, 0), 869eb5cb6aaSMark yao .vact_st_end = VOP_REG(RK3328_DSP_VACT_ST_END, 0x1fff1fff, 0), 870eb5cb6aaSMark yao .hpost_st_end = VOP_REG(RK3328_POST_DSP_HACT_INFO, 0x1fff1fff, 0), 871eb5cb6aaSMark yao .vpost_st_end = VOP_REG(RK3328_POST_DSP_VACT_INFO, 0x1fff1fff, 0), 872eb5cb6aaSMark yao }; 873eb5cb6aaSMark yao 874eb5cb6aaSMark yao static const struct vop_output rk3328_output = { 875eb5cb6aaSMark yao .rgb_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 12), 876eb5cb6aaSMark yao .hdmi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 13), 877eb5cb6aaSMark yao .edp_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 14), 878eb5cb6aaSMark yao .mipi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 15), 879eb5cb6aaSMark yao .rgb_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 16), 880eb5cb6aaSMark yao .hdmi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 20), 881eb5cb6aaSMark yao .edp_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 24), 882eb5cb6aaSMark yao .mipi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 28), 883eb5cb6aaSMark yao }; 884eb5cb6aaSMark yao 885eb5cb6aaSMark yao static const struct vop_misc rk3328_misc = { 886eb5cb6aaSMark yao .global_regdone_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 11), 887eb5cb6aaSMark yao }; 888eb5cb6aaSMark yao 889eb5cb6aaSMark yao static const struct vop_common rk3328_common = { 890eb5cb6aaSMark yao .standby = VOP_REG_SYNC(RK3328_SYS_CTRL, 0x1, 22), 891a5c0fa44SUrja Rannikko .dither_down_sel = VOP_REG(RK3328_DSP_CTRL1, 0x1, 4), 892a5c0fa44SUrja Rannikko .dither_down_mode = VOP_REG(RK3328_DSP_CTRL1, 0x1, 3), 893a5c0fa44SUrja Rannikko .dither_down_en = VOP_REG(RK3328_DSP_CTRL1, 0x1, 2), 894a5c0fa44SUrja Rannikko .pre_dither_down = VOP_REG(RK3328_DSP_CTRL1, 0x1, 1), 895eb5cb6aaSMark yao .dither_up = VOP_REG(RK3328_DSP_CTRL1, 0x1, 6), 896eb5cb6aaSMark yao .dsp_blank = VOP_REG(RK3328_DSP_CTRL0, 0x3, 18), 897eb5cb6aaSMark yao .out_mode = VOP_REG(RK3328_DSP_CTRL0, 0xf, 0), 898eb5cb6aaSMark yao .cfg_done = VOP_REG_SYNC(RK3328_REG_CFG_DONE, 0x1, 0), 899eb5cb6aaSMark yao }; 900eb5cb6aaSMark yao 901eb5cb6aaSMark yao static const struct vop_intr rk3328_vop_intr = { 902eb5cb6aaSMark yao .intrs = rk3368_vop_intrs, 903eb5cb6aaSMark yao .nintrs = ARRAY_SIZE(rk3368_vop_intrs), 904eb5cb6aaSMark yao .line_flag_num[0] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 0), 905eb5cb6aaSMark yao .line_flag_num[1] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 16), 906eb5cb6aaSMark yao .status = VOP_REG_MASK_SYNC(RK3328_INTR_STATUS0, 0xffff, 0), 907eb5cb6aaSMark yao .enable = VOP_REG_MASK_SYNC(RK3328_INTR_EN0, 0xffff, 0), 908eb5cb6aaSMark yao .clear = VOP_REG_MASK_SYNC(RK3328_INTR_CLEAR0, 0xffff, 0), 909eb5cb6aaSMark yao }; 910eb5cb6aaSMark yao 911eb5cb6aaSMark yao static const struct vop_win_data rk3328_vop_win_data[] = { 912fbb1c738SEzequiel Garcia { .base = 0xd0, .phy = &rk3368_win01_data, 913eb5cb6aaSMark yao .type = DRM_PLANE_TYPE_PRIMARY }, 914fbb1c738SEzequiel Garcia { .base = 0x1d0, .phy = &rk3368_win01_data, 915eb5cb6aaSMark yao .type = DRM_PLANE_TYPE_OVERLAY }, 916fbb1c738SEzequiel Garcia { .base = 0x2d0, .phy = &rk3368_win01_data, 917eb5cb6aaSMark yao .type = DRM_PLANE_TYPE_CURSOR }, 918eb5cb6aaSMark yao }; 919eb5cb6aaSMark yao 920eb5cb6aaSMark yao static const struct vop_data rk3328_vop = { 921eb5cb6aaSMark yao .version = VOP_VERSION(3, 8), 922eb5cb6aaSMark yao .feature = VOP_FEATURE_OUTPUT_RGB10, 923eb5cb6aaSMark yao .intr = &rk3328_vop_intr, 924eb5cb6aaSMark yao .common = &rk3328_common, 925eb5cb6aaSMark yao .modeset = &rk3328_modeset, 926eb5cb6aaSMark yao .output = &rk3328_output, 927eb5cb6aaSMark yao .misc = &rk3328_misc, 928eb5cb6aaSMark yao .win = rk3328_vop_win_data, 929eb5cb6aaSMark yao .win_size = ARRAY_SIZE(rk3328_vop_win_data), 930eb5cb6aaSMark yao }; 931eb5cb6aaSMark yao 932a67719d1SMark Yao static const struct of_device_id vop_driver_dt_match[] = { 933f7673453SMark Yao { .compatible = "rockchip,rk3036-vop", 934f7673453SMark Yao .data = &rk3036_vop }, 935460c3b00SSandy Huang { .compatible = "rockchip,rk3126-vop", 936460c3b00SSandy Huang .data = &rk3126_vop }, 937570913e0SSandy Huang { .compatible = "rockchip,px30-vop-big", 938570913e0SSandy Huang .data = &px30_vop_big }, 939570913e0SSandy Huang { .compatible = "rockchip,px30-vop-lit", 940570913e0SSandy Huang .data = &px30_vop_lit }, 941f4a6de85SMark Yao { .compatible = "rockchip,rk3066-vop", 942f4a6de85SMark Yao .data = &rk3066_vop }, 943428e15ccSHeiko Stuebner { .compatible = "rockchip,rk3188-vop", 944428e15ccSHeiko Stuebner .data = &rk3188_vop }, 945b51502adSMark Yao { .compatible = "rockchip,rk3288-vop", 946b51502adSMark Yao .data = &rk3288_vop }, 947eb5cb6aaSMark yao { .compatible = "rockchip,rk3368-vop", 948eb5cb6aaSMark yao .data = &rk3368_vop }, 949eb5cb6aaSMark yao { .compatible = "rockchip,rk3366-vop", 950eb5cb6aaSMark yao .data = &rk3366_vop }, 9510a63bfd0SMark Yao { .compatible = "rockchip,rk3399-vop-big", 9520a63bfd0SMark Yao .data = &rk3399_vop_big }, 9530a63bfd0SMark Yao { .compatible = "rockchip,rk3399-vop-lit", 9540a63bfd0SMark Yao .data = &rk3399_vop_lit }, 955eb5cb6aaSMark yao { .compatible = "rockchip,rk3228-vop", 956eb5cb6aaSMark yao .data = &rk3228_vop }, 957eb5cb6aaSMark yao { .compatible = "rockchip,rk3328-vop", 958eb5cb6aaSMark yao .data = &rk3328_vop }, 959a67719d1SMark Yao {}, 960a67719d1SMark Yao }; 961a67719d1SMark Yao MODULE_DEVICE_TABLE(of, vop_driver_dt_match); 962a67719d1SMark Yao 963a67719d1SMark Yao static int vop_probe(struct platform_device *pdev) 964a67719d1SMark Yao { 965a67719d1SMark Yao struct device *dev = &pdev->dev; 966a67719d1SMark Yao 967a67719d1SMark Yao if (!dev->of_node) { 968d8dd6804SHaneen Mohammed DRM_DEV_ERROR(dev, "can't find vop devices\n"); 969a67719d1SMark Yao return -ENODEV; 970a67719d1SMark Yao } 971a67719d1SMark Yao 972a67719d1SMark Yao return component_add(dev, &vop_component_ops); 973a67719d1SMark Yao } 974a67719d1SMark Yao 975a67719d1SMark Yao static int vop_remove(struct platform_device *pdev) 976a67719d1SMark Yao { 977a67719d1SMark Yao component_del(&pdev->dev, &vop_component_ops); 978a67719d1SMark Yao 979a67719d1SMark Yao return 0; 980a67719d1SMark Yao } 981a67719d1SMark Yao 9828820b68bSJeffy Chen struct platform_driver vop_platform_driver = { 983a67719d1SMark Yao .probe = vop_probe, 984a67719d1SMark Yao .remove = vop_remove, 985a67719d1SMark Yao .driver = { 986a67719d1SMark Yao .name = "rockchip-vop", 987a67719d1SMark Yao .of_match_table = of_match_ptr(vop_driver_dt_match), 988a67719d1SMark Yao }, 989a67719d1SMark Yao }; 990