1 /*
2  * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3  * Author:Mark Yao <mark.yao@rock-chips.com>
4  *
5  * This software is licensed under the terms of the GNU General Public
6  * License version 2, as published by the Free Software Foundation, and
7  * may be copied, distributed, and modified under those terms.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  */
14 
15 #ifndef _ROCKCHIP_DRM_VOP_H
16 #define _ROCKCHIP_DRM_VOP_H
17 
18 /*
19  * major: IP major version, used for IP structure
20  * minor: big feature change under same structure
21  */
22 #define VOP_VERSION(major, minor)	((major) << 8 | (minor))
23 #define VOP_MAJOR(version)		((version) >> 8)
24 #define VOP_MINOR(version)		((version) & 0xff)
25 
26 enum vop_data_format {
27 	VOP_FMT_ARGB8888 = 0,
28 	VOP_FMT_RGB888,
29 	VOP_FMT_RGB565,
30 	VOP_FMT_YUV420SP = 4,
31 	VOP_FMT_YUV422SP,
32 	VOP_FMT_YUV444SP,
33 };
34 
35 struct vop_reg {
36 	uint32_t mask;
37 	uint16_t offset;
38 	uint8_t shift;
39 	bool write_mask;
40 	bool relaxed;
41 };
42 
43 struct vop_modeset {
44 	struct vop_reg htotal_pw;
45 	struct vop_reg hact_st_end;
46 	struct vop_reg hpost_st_end;
47 	struct vop_reg vtotal_pw;
48 	struct vop_reg vact_st_end;
49 	struct vop_reg vpost_st_end;
50 };
51 
52 struct vop_output {
53 	struct vop_reg pin_pol;
54 	struct vop_reg dp_pin_pol;
55 	struct vop_reg edp_pin_pol;
56 	struct vop_reg hdmi_pin_pol;
57 	struct vop_reg mipi_pin_pol;
58 	struct vop_reg rgb_pin_pol;
59 	struct vop_reg dp_en;
60 	struct vop_reg edp_en;
61 	struct vop_reg hdmi_en;
62 	struct vop_reg mipi_en;
63 	struct vop_reg rgb_en;
64 };
65 
66 struct vop_common {
67 	struct vop_reg cfg_done;
68 	struct vop_reg dsp_blank;
69 	struct vop_reg data_blank;
70 	struct vop_reg dither_down;
71 	struct vop_reg dither_up;
72 	struct vop_reg gate_en;
73 	struct vop_reg mmu_en;
74 	struct vop_reg out_mode;
75 	struct vop_reg standby;
76 };
77 
78 struct vop_misc {
79 	struct vop_reg global_regdone_en;
80 };
81 
82 struct vop_intr {
83 	const int *intrs;
84 	uint32_t nintrs;
85 
86 	struct vop_reg line_flag_num[2];
87 	struct vop_reg enable;
88 	struct vop_reg clear;
89 	struct vop_reg status;
90 };
91 
92 struct vop_scl_extension {
93 	struct vop_reg cbcr_vsd_mode;
94 	struct vop_reg cbcr_vsu_mode;
95 	struct vop_reg cbcr_hsd_mode;
96 	struct vop_reg cbcr_ver_scl_mode;
97 	struct vop_reg cbcr_hor_scl_mode;
98 	struct vop_reg yrgb_vsd_mode;
99 	struct vop_reg yrgb_vsu_mode;
100 	struct vop_reg yrgb_hsd_mode;
101 	struct vop_reg yrgb_ver_scl_mode;
102 	struct vop_reg yrgb_hor_scl_mode;
103 	struct vop_reg line_load_mode;
104 	struct vop_reg cbcr_axi_gather_num;
105 	struct vop_reg yrgb_axi_gather_num;
106 	struct vop_reg vsd_cbcr_gt2;
107 	struct vop_reg vsd_cbcr_gt4;
108 	struct vop_reg vsd_yrgb_gt2;
109 	struct vop_reg vsd_yrgb_gt4;
110 	struct vop_reg bic_coe_sel;
111 	struct vop_reg cbcr_axi_gather_en;
112 	struct vop_reg yrgb_axi_gather_en;
113 	struct vop_reg lb_mode;
114 };
115 
116 struct vop_scl_regs {
117 	const struct vop_scl_extension *ext;
118 
119 	struct vop_reg scale_yrgb_x;
120 	struct vop_reg scale_yrgb_y;
121 	struct vop_reg scale_cbcr_x;
122 	struct vop_reg scale_cbcr_y;
123 };
124 
125 struct vop_win_phy {
126 	const struct vop_scl_regs *scl;
127 	const uint32_t *data_formats;
128 	uint32_t nformats;
129 
130 	struct vop_reg enable;
131 	struct vop_reg gate;
132 	struct vop_reg format;
133 	struct vop_reg rb_swap;
134 	struct vop_reg act_info;
135 	struct vop_reg dsp_info;
136 	struct vop_reg dsp_st;
137 	struct vop_reg yrgb_mst;
138 	struct vop_reg uv_mst;
139 	struct vop_reg yrgb_vir;
140 	struct vop_reg uv_vir;
141 
142 	struct vop_reg dst_alpha_ctl;
143 	struct vop_reg src_alpha_ctl;
144 	struct vop_reg channel;
145 };
146 
147 struct vop_win_data {
148 	uint32_t base;
149 	const struct vop_win_phy *phy;
150 	enum drm_plane_type type;
151 };
152 
153 struct vop_data {
154 	uint32_t version;
155 	const struct vop_intr *intr;
156 	const struct vop_common *common;
157 	const struct vop_misc *misc;
158 	const struct vop_modeset *modeset;
159 	const struct vop_output *output;
160 	const struct vop_win_data *win;
161 	unsigned int win_size;
162 
163 #define VOP_FEATURE_OUTPUT_RGB10	BIT(0)
164 	u64 feature;
165 };
166 
167 /* interrupt define */
168 #define DSP_HOLD_VALID_INTR		(1 << 0)
169 #define FS_INTR				(1 << 1)
170 #define LINE_FLAG_INTR			(1 << 2)
171 #define BUS_ERROR_INTR			(1 << 3)
172 
173 #define INTR_MASK			(DSP_HOLD_VALID_INTR | FS_INTR | \
174 					 LINE_FLAG_INTR | BUS_ERROR_INTR)
175 
176 #define DSP_HOLD_VALID_INTR_EN(x)	((x) << 4)
177 #define FS_INTR_EN(x)			((x) << 5)
178 #define LINE_FLAG_INTR_EN(x)		((x) << 6)
179 #define BUS_ERROR_INTR_EN(x)		((x) << 7)
180 #define DSP_HOLD_VALID_INTR_MASK	(1 << 4)
181 #define FS_INTR_MASK			(1 << 5)
182 #define LINE_FLAG_INTR_MASK		(1 << 6)
183 #define BUS_ERROR_INTR_MASK		(1 << 7)
184 
185 #define INTR_CLR_SHIFT			8
186 #define DSP_HOLD_VALID_INTR_CLR		(1 << (INTR_CLR_SHIFT + 0))
187 #define FS_INTR_CLR			(1 << (INTR_CLR_SHIFT + 1))
188 #define LINE_FLAG_INTR_CLR		(1 << (INTR_CLR_SHIFT + 2))
189 #define BUS_ERROR_INTR_CLR		(1 << (INTR_CLR_SHIFT + 3))
190 
191 #define DSP_LINE_NUM(x)			(((x) & 0x1fff) << 12)
192 #define DSP_LINE_NUM_MASK		(0x1fff << 12)
193 
194 /* src alpha ctrl define */
195 #define SRC_FADING_VALUE(x)		(((x) & 0xff) << 24)
196 #define SRC_GLOBAL_ALPHA(x)		(((x) & 0xff) << 16)
197 #define SRC_FACTOR_M0(x)		(((x) & 0x7) << 6)
198 #define SRC_ALPHA_CAL_M0(x)		(((x) & 0x1) << 5)
199 #define SRC_BLEND_M0(x)			(((x) & 0x3) << 3)
200 #define SRC_ALPHA_M0(x)			(((x) & 0x1) << 2)
201 #define SRC_COLOR_M0(x)			(((x) & 0x1) << 1)
202 #define SRC_ALPHA_EN(x)			(((x) & 0x1) << 0)
203 /* dst alpha ctrl define */
204 #define DST_FACTOR_M0(x)		(((x) & 0x7) << 6)
205 
206 /*
207  * display output interface supported by rockchip lcdc
208  */
209 #define ROCKCHIP_OUT_MODE_P888	0
210 #define ROCKCHIP_OUT_MODE_P666	1
211 #define ROCKCHIP_OUT_MODE_P565	2
212 /* for use special outface */
213 #define ROCKCHIP_OUT_MODE_AAAA	15
214 
215 enum alpha_mode {
216 	ALPHA_STRAIGHT,
217 	ALPHA_INVERSE,
218 };
219 
220 enum global_blend_mode {
221 	ALPHA_GLOBAL,
222 	ALPHA_PER_PIX,
223 	ALPHA_PER_PIX_GLOBAL,
224 };
225 
226 enum alpha_cal_mode {
227 	ALPHA_SATURATION,
228 	ALPHA_NO_SATURATION,
229 };
230 
231 enum color_mode {
232 	ALPHA_SRC_PRE_MUL,
233 	ALPHA_SRC_NO_PRE_MUL,
234 };
235 
236 enum factor_mode {
237 	ALPHA_ZERO,
238 	ALPHA_ONE,
239 	ALPHA_SRC,
240 	ALPHA_SRC_INVERSE,
241 	ALPHA_SRC_GLOBAL,
242 };
243 
244 enum scale_mode {
245 	SCALE_NONE = 0x0,
246 	SCALE_UP   = 0x1,
247 	SCALE_DOWN = 0x2
248 };
249 
250 enum lb_mode {
251 	LB_YUV_3840X5 = 0x0,
252 	LB_YUV_2560X8 = 0x1,
253 	LB_RGB_3840X2 = 0x2,
254 	LB_RGB_2560X4 = 0x3,
255 	LB_RGB_1920X5 = 0x4,
256 	LB_RGB_1280X8 = 0x5
257 };
258 
259 enum sacle_up_mode {
260 	SCALE_UP_BIL = 0x0,
261 	SCALE_UP_BIC = 0x1
262 };
263 
264 enum scale_down_mode {
265 	SCALE_DOWN_BIL = 0x0,
266 	SCALE_DOWN_AVG = 0x1
267 };
268 
269 enum vop_pol {
270 	HSYNC_POSITIVE = 0,
271 	VSYNC_POSITIVE = 1,
272 	DEN_NEGATIVE   = 2,
273 	DCLK_INVERT    = 3
274 };
275 
276 #define FRAC_16_16(mult, div)    (((mult) << 16) / (div))
277 #define SCL_FT_DEFAULT_FIXPOINT_SHIFT	12
278 #define SCL_MAX_VSKIPLINES		4
279 #define MIN_SCL_FT_AFTER_VSKIP		1
280 
281 static inline uint16_t scl_cal_scale(int src, int dst, int shift)
282 {
283 	return ((src * 2 - 3) << (shift - 1)) / (dst - 1);
284 }
285 
286 static inline uint16_t scl_cal_scale2(int src, int dst)
287 {
288 	return ((src - 1) << 12) / (dst - 1);
289 }
290 
291 #define GET_SCL_FT_BILI_DN(src, dst)	scl_cal_scale(src, dst, 12)
292 #define GET_SCL_FT_BILI_UP(src, dst)	scl_cal_scale(src, dst, 16)
293 #define GET_SCL_FT_BIC(src, dst)	scl_cal_scale(src, dst, 16)
294 
295 static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h,
296 					     int vskiplines)
297 {
298 	int act_height;
299 
300 	act_height = (src_h + vskiplines - 1) / vskiplines;
301 
302 	if (act_height == dst_h)
303 		return GET_SCL_FT_BILI_DN(src_h, dst_h) / vskiplines;
304 
305 	return GET_SCL_FT_BILI_DN(act_height, dst_h);
306 }
307 
308 static inline enum scale_mode scl_get_scl_mode(int src, int dst)
309 {
310 	if (src < dst)
311 		return SCALE_UP;
312 	else if (src > dst)
313 		return SCALE_DOWN;
314 
315 	return SCALE_NONE;
316 }
317 
318 static inline int scl_get_vskiplines(uint32_t srch, uint32_t dsth)
319 {
320 	uint32_t vskiplines;
321 
322 	for (vskiplines = SCL_MAX_VSKIPLINES; vskiplines > 1; vskiplines /= 2)
323 		if (srch >= vskiplines * dsth * MIN_SCL_FT_AFTER_VSKIP)
324 			break;
325 
326 	return vskiplines;
327 }
328 
329 static inline int scl_vop_cal_lb_mode(int width, bool is_yuv)
330 {
331 	int lb_mode;
332 
333 	if (width > 2560)
334 		lb_mode = LB_RGB_3840X2;
335 	else if (width > 1920)
336 		lb_mode = LB_RGB_2560X4;
337 	else if (!is_yuv)
338 		lb_mode = LB_RGB_1920X5;
339 	else if (width > 1280)
340 		lb_mode = LB_YUV_3840X5;
341 	else
342 		lb_mode = LB_YUV_2560X8;
343 
344 	return lb_mode;
345 }
346 
347 extern const struct component_ops vop_component_ops;
348 #endif /* _ROCKCHIP_DRM_VOP_H */
349