12048e328SMark Yao /* 22048e328SMark Yao * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd 32048e328SMark Yao * Author:Mark Yao <mark.yao@rock-chips.com> 42048e328SMark Yao * 52048e328SMark Yao * This software is licensed under the terms of the GNU General Public 62048e328SMark Yao * License version 2, as published by the Free Software Foundation, and 72048e328SMark Yao * may be copied, distributed, and modified under those terms. 82048e328SMark Yao * 92048e328SMark Yao * This program is distributed in the hope that it will be useful, 102048e328SMark Yao * but WITHOUT ANY WARRANTY; without even the implied warranty of 112048e328SMark Yao * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 122048e328SMark Yao * GNU General Public License for more details. 132048e328SMark Yao */ 142048e328SMark Yao 152048e328SMark Yao #include <drm/drm.h> 162048e328SMark Yao #include <drm/drmP.h> 1763ebb9faSMark Yao #include <drm/drm_atomic.h> 182048e328SMark Yao #include <drm/drm_crtc.h> 192048e328SMark Yao #include <drm/drm_crtc_helper.h> 2047a7eb45STomasz Figa #include <drm/drm_flip_work.h> 212048e328SMark Yao #include <drm/drm_plane_helper.h> 226cca3869SSean Paul #ifdef CONFIG_DRM_ANALOGIX_DP 233190e58dSTomeu Vizoso #include <drm/bridge/analogix_dp.h> 246cca3869SSean Paul #endif 252048e328SMark Yao 262048e328SMark Yao #include <linux/kernel.h> 2700fe6148SPaul Gortmaker #include <linux/module.h> 282048e328SMark Yao #include <linux/platform_device.h> 292048e328SMark Yao #include <linux/clk.h> 307caecdbeSTomasz Figa #include <linux/iopoll.h> 312048e328SMark Yao #include <linux/of.h> 322048e328SMark Yao #include <linux/of_device.h> 332048e328SMark Yao #include <linux/pm_runtime.h> 342048e328SMark Yao #include <linux/component.h> 3529adeb4fSGustavo A. R. Silva #include <linux/overflow.h> 362048e328SMark Yao 372048e328SMark Yao #include <linux/reset.h> 382048e328SMark Yao #include <linux/delay.h> 392048e328SMark Yao 402048e328SMark Yao #include "rockchip_drm_drv.h" 412048e328SMark Yao #include "rockchip_drm_gem.h" 422048e328SMark Yao #include "rockchip_drm_fb.h" 435182c1a5SYakir Yang #include "rockchip_drm_psr.h" 442048e328SMark Yao #include "rockchip_drm_vop.h" 451f0f0151SSandy Huang #include "rockchip_rgb.h" 462048e328SMark Yao 472048e328SMark Yao #define VOP_WIN_SET(x, win, name, v) \ 489a61c54bSMark yao vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name) 494c156c21SMark Yao #define VOP_SCL_SET(x, win, name, v) \ 509a61c54bSMark yao vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name) 511194fffbSMark Yao #define VOP_SCL_SET_EXT(x, win, name, v) \ 529a61c54bSMark yao vop_reg_set(vop, &win->phy->scl->ext->name, \ 539a61c54bSMark yao win->base, ~0, v, #name) 54ac6560dfSMark yao 55ac6560dfSMark yao #define VOP_INTR_SET_MASK(vop, name, mask, v) \ 569a61c54bSMark yao vop_reg_set(vop, &vop->data->intr->name, 0, mask, v, #name) 579a61c54bSMark yao 589a61c54bSMark yao #define VOP_REG_SET(vop, group, name, v) \ 599a61c54bSMark yao vop_reg_set(vop, &vop->data->group->name, 0, ~0, v, #name) 60ac6560dfSMark yao 61dbb3d944SMark Yao #define VOP_INTR_SET_TYPE(vop, name, type, v) \ 62dbb3d944SMark Yao do { \ 63c7647f86SJohn Keeping int i, reg = 0, mask = 0; \ 64dbb3d944SMark Yao for (i = 0; i < vop->data->intr->nintrs; i++) { \ 65c7647f86SJohn Keeping if (vop->data->intr->intrs[i] & type) { \ 66dbb3d944SMark Yao reg |= (v) << i; \ 67c7647f86SJohn Keeping mask |= 1 << i; \ 68dbb3d944SMark Yao } \ 69c7647f86SJohn Keeping } \ 70ac6560dfSMark yao VOP_INTR_SET_MASK(vop, name, mask, reg); \ 71dbb3d944SMark Yao } while (0) 72dbb3d944SMark Yao #define VOP_INTR_GET_TYPE(vop, name, type) \ 73dbb3d944SMark Yao vop_get_intr_type(vop, &vop->data->intr->name, type) 74dbb3d944SMark Yao 752048e328SMark Yao #define VOP_WIN_GET(x, win, name) \ 769a61c54bSMark yao vop_read_reg(x, win->offset, win->phy->name) 772048e328SMark Yao 782048e328SMark Yao #define VOP_WIN_GET_YRGBADDR(vop, win) \ 792048e328SMark Yao vop_readl(vop, win->base + win->phy->yrgb_mst.offset) 802048e328SMark Yao 8158badaa7SKristian H. Kristensen #define VOP_WIN_TO_INDEX(vop_win) \ 8258badaa7SKristian H. Kristensen ((vop_win) - (vop_win)->vop->win) 8358badaa7SKristian H. Kristensen 842048e328SMark Yao #define to_vop(x) container_of(x, struct vop, crtc) 852048e328SMark Yao #define to_vop_win(x) container_of(x, struct vop_win, base) 862048e328SMark Yao 8747a7eb45STomasz Figa enum vop_pending { 8847a7eb45STomasz Figa VOP_PENDING_FB_UNREF, 8947a7eb45STomasz Figa }; 9047a7eb45STomasz Figa 912048e328SMark Yao struct vop_win { 922048e328SMark Yao struct drm_plane base; 932048e328SMark Yao const struct vop_win_data *data; 942048e328SMark Yao struct vop *vop; 952048e328SMark Yao }; 962048e328SMark Yao 971f0f0151SSandy Huang struct rockchip_rgb; 982048e328SMark Yao struct vop { 992048e328SMark Yao struct drm_crtc crtc; 1002048e328SMark Yao struct device *dev; 1012048e328SMark Yao struct drm_device *drm_dev; 10231e980c5SMark Yao bool is_enabled; 1032048e328SMark Yao 1041067219bSMark Yao struct completion dsp_hold_completion; 1054f9d39a7SDaniel Vetter 1064f9d39a7SDaniel Vetter /* protected by dev->event_lock */ 10763ebb9faSMark Yao struct drm_pending_vblank_event *event; 1082048e328SMark Yao 10947a7eb45STomasz Figa struct drm_flip_work fb_unref_work; 11047a7eb45STomasz Figa unsigned long pending; 11147a7eb45STomasz Figa 11269c34e41SYakir Yang struct completion line_flag_completion; 11369c34e41SYakir Yang 1142048e328SMark Yao const struct vop_data *data; 1152048e328SMark Yao 1162048e328SMark Yao uint32_t *regsbak; 1172048e328SMark Yao void __iomem *regs; 1182048e328SMark Yao 1192048e328SMark Yao /* physical map length of vop register */ 1202048e328SMark Yao uint32_t len; 1212048e328SMark Yao 1222048e328SMark Yao /* one time only one process allowed to config the register */ 1232048e328SMark Yao spinlock_t reg_lock; 1242048e328SMark Yao /* lock vop irq reg */ 1252048e328SMark Yao spinlock_t irq_lock; 126e334d48bSzain wang /* protects crtc enable/disable */ 127e334d48bSzain wang struct mutex vop_lock; 1282048e328SMark Yao 1292048e328SMark Yao unsigned int irq; 1302048e328SMark Yao 1312048e328SMark Yao /* vop AHP clk */ 1322048e328SMark Yao struct clk *hclk; 1332048e328SMark Yao /* vop dclk */ 1342048e328SMark Yao struct clk *dclk; 1352048e328SMark Yao /* vop share memory frequency */ 1362048e328SMark Yao struct clk *aclk; 1372048e328SMark Yao 1382048e328SMark Yao /* vop dclk reset */ 1392048e328SMark Yao struct reset_control *dclk_rst; 1402048e328SMark Yao 1411f0f0151SSandy Huang /* optional internal rgb encoder */ 1421f0f0151SSandy Huang struct rockchip_rgb *rgb; 1431f0f0151SSandy Huang 1442048e328SMark Yao struct vop_win win[]; 1452048e328SMark Yao }; 1462048e328SMark Yao 1472048e328SMark Yao static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v) 1482048e328SMark Yao { 1492048e328SMark Yao writel(v, vop->regs + offset); 1502048e328SMark Yao vop->regsbak[offset >> 2] = v; 1512048e328SMark Yao } 1522048e328SMark Yao 1532048e328SMark Yao static inline uint32_t vop_readl(struct vop *vop, uint32_t offset) 1542048e328SMark Yao { 1552048e328SMark Yao return readl(vop->regs + offset); 1562048e328SMark Yao } 1572048e328SMark Yao 1582048e328SMark Yao static inline uint32_t vop_read_reg(struct vop *vop, uint32_t base, 1592048e328SMark Yao const struct vop_reg *reg) 1602048e328SMark Yao { 1612048e328SMark Yao return (vop_readl(vop, base + reg->offset) >> reg->shift) & reg->mask; 1622048e328SMark Yao } 1632048e328SMark Yao 1649a61c54bSMark yao static void vop_reg_set(struct vop *vop, const struct vop_reg *reg, 1659a61c54bSMark yao uint32_t _offset, uint32_t _mask, uint32_t v, 1669a61c54bSMark yao const char *reg_name) 1672048e328SMark Yao { 1689a61c54bSMark yao int offset, mask, shift; 169d49463ecSMark Yao 1709a61c54bSMark yao if (!reg || !reg->mask) { 171d8dd6804SHaneen Mohammed DRM_DEV_DEBUG(vop->dev, "Warning: not support %s\n", reg_name); 1729a61c54bSMark yao return; 1739a61c54bSMark yao } 1749a61c54bSMark yao 1759a61c54bSMark yao offset = reg->offset + _offset; 1769a61c54bSMark yao mask = reg->mask & _mask; 1779a61c54bSMark yao shift = reg->shift; 1789a61c54bSMark yao 1799a61c54bSMark yao if (reg->write_mask) { 180d49463ecSMark Yao v = ((v << shift) & 0xffff) | (mask << (shift + 16)); 181d49463ecSMark Yao } else { 1822048e328SMark Yao uint32_t cached_val = vop->regsbak[offset >> 2]; 1832048e328SMark Yao 184d49463ecSMark Yao v = (cached_val & ~(mask << shift)) | ((v & mask) << shift); 185d49463ecSMark Yao vop->regsbak[offset >> 2] = v; 1862048e328SMark Yao } 1872048e328SMark Yao 1889a61c54bSMark yao if (reg->relaxed) 189d49463ecSMark Yao writel_relaxed(v, vop->regs + offset); 190d49463ecSMark Yao else 191d49463ecSMark Yao writel(v, vop->regs + offset); 1922048e328SMark Yao } 1932048e328SMark Yao 194dbb3d944SMark Yao static inline uint32_t vop_get_intr_type(struct vop *vop, 195dbb3d944SMark Yao const struct vop_reg *reg, int type) 196dbb3d944SMark Yao { 197dbb3d944SMark Yao uint32_t i, ret = 0; 198dbb3d944SMark Yao uint32_t regs = vop_read_reg(vop, 0, reg); 199dbb3d944SMark Yao 200dbb3d944SMark Yao for (i = 0; i < vop->data->intr->nintrs; i++) { 201dbb3d944SMark Yao if ((type & vop->data->intr->intrs[i]) && (regs & 1 << i)) 202dbb3d944SMark Yao ret |= vop->data->intr->intrs[i]; 203dbb3d944SMark Yao } 204dbb3d944SMark Yao 205dbb3d944SMark Yao return ret; 206dbb3d944SMark Yao } 207dbb3d944SMark Yao 2080cf33fe3SMark Yao static inline void vop_cfg_done(struct vop *vop) 2090cf33fe3SMark Yao { 2109a61c54bSMark yao VOP_REG_SET(vop, common, cfg_done, 1); 2110cf33fe3SMark Yao } 2120cf33fe3SMark Yao 21385a359f2STomasz Figa static bool has_rb_swapped(uint32_t format) 21485a359f2STomasz Figa { 21585a359f2STomasz Figa switch (format) { 21685a359f2STomasz Figa case DRM_FORMAT_XBGR8888: 21785a359f2STomasz Figa case DRM_FORMAT_ABGR8888: 21885a359f2STomasz Figa case DRM_FORMAT_BGR888: 21985a359f2STomasz Figa case DRM_FORMAT_BGR565: 22085a359f2STomasz Figa return true; 22185a359f2STomasz Figa default: 22285a359f2STomasz Figa return false; 22385a359f2STomasz Figa } 22485a359f2STomasz Figa } 22585a359f2STomasz Figa 2262048e328SMark Yao static enum vop_data_format vop_convert_format(uint32_t format) 2272048e328SMark Yao { 2282048e328SMark Yao switch (format) { 2292048e328SMark Yao case DRM_FORMAT_XRGB8888: 2302048e328SMark Yao case DRM_FORMAT_ARGB8888: 23185a359f2STomasz Figa case DRM_FORMAT_XBGR8888: 23285a359f2STomasz Figa case DRM_FORMAT_ABGR8888: 2332048e328SMark Yao return VOP_FMT_ARGB8888; 2342048e328SMark Yao case DRM_FORMAT_RGB888: 23585a359f2STomasz Figa case DRM_FORMAT_BGR888: 2362048e328SMark Yao return VOP_FMT_RGB888; 2372048e328SMark Yao case DRM_FORMAT_RGB565: 23885a359f2STomasz Figa case DRM_FORMAT_BGR565: 2392048e328SMark Yao return VOP_FMT_RGB565; 2402048e328SMark Yao case DRM_FORMAT_NV12: 2412048e328SMark Yao return VOP_FMT_YUV420SP; 2422048e328SMark Yao case DRM_FORMAT_NV16: 2432048e328SMark Yao return VOP_FMT_YUV422SP; 2442048e328SMark Yao case DRM_FORMAT_NV24: 2452048e328SMark Yao return VOP_FMT_YUV444SP; 2462048e328SMark Yao default: 247ee4d7899SSean Paul DRM_ERROR("unsupported format[%08x]\n", format); 2482048e328SMark Yao return -EINVAL; 2492048e328SMark Yao } 2502048e328SMark Yao } 2512048e328SMark Yao 2524c156c21SMark Yao static uint16_t scl_vop_cal_scale(enum scale_mode mode, uint32_t src, 2534c156c21SMark Yao uint32_t dst, bool is_horizontal, 2544c156c21SMark Yao int vsu_mode, int *vskiplines) 2554c156c21SMark Yao { 2564c156c21SMark Yao uint16_t val = 1 << SCL_FT_DEFAULT_FIXPOINT_SHIFT; 2574c156c21SMark Yao 258ce91d373SJeffy Chen if (vskiplines) 259ce91d373SJeffy Chen *vskiplines = 0; 260ce91d373SJeffy Chen 2614c156c21SMark Yao if (is_horizontal) { 2624c156c21SMark Yao if (mode == SCALE_UP) 2634c156c21SMark Yao val = GET_SCL_FT_BIC(src, dst); 2644c156c21SMark Yao else if (mode == SCALE_DOWN) 2654c156c21SMark Yao val = GET_SCL_FT_BILI_DN(src, dst); 2664c156c21SMark Yao } else { 2674c156c21SMark Yao if (mode == SCALE_UP) { 2684c156c21SMark Yao if (vsu_mode == SCALE_UP_BIL) 2694c156c21SMark Yao val = GET_SCL_FT_BILI_UP(src, dst); 2704c156c21SMark Yao else 2714c156c21SMark Yao val = GET_SCL_FT_BIC(src, dst); 2724c156c21SMark Yao } else if (mode == SCALE_DOWN) { 2734c156c21SMark Yao if (vskiplines) { 2744c156c21SMark Yao *vskiplines = scl_get_vskiplines(src, dst); 2754c156c21SMark Yao val = scl_get_bili_dn_vskip(src, dst, 2764c156c21SMark Yao *vskiplines); 2774c156c21SMark Yao } else { 2784c156c21SMark Yao val = GET_SCL_FT_BILI_DN(src, dst); 2794c156c21SMark Yao } 2804c156c21SMark Yao } 2814c156c21SMark Yao } 2824c156c21SMark Yao 2834c156c21SMark Yao return val; 2844c156c21SMark Yao } 2854c156c21SMark Yao 2864c156c21SMark Yao static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, 2874c156c21SMark Yao uint32_t src_w, uint32_t src_h, uint32_t dst_w, 2884c156c21SMark Yao uint32_t dst_h, uint32_t pixel_format) 2894c156c21SMark Yao { 2904c156c21SMark Yao uint16_t yrgb_hor_scl_mode, yrgb_ver_scl_mode; 2914c156c21SMark Yao uint16_t cbcr_hor_scl_mode = SCALE_NONE; 2924c156c21SMark Yao uint16_t cbcr_ver_scl_mode = SCALE_NONE; 2934c156c21SMark Yao int hsub = drm_format_horz_chroma_subsampling(pixel_format); 2944c156c21SMark Yao int vsub = drm_format_vert_chroma_subsampling(pixel_format); 295d8bd23d9SAyan Kumar Halder const struct drm_format_info *info; 296d8bd23d9SAyan Kumar Halder bool is_yuv = false; 2974c156c21SMark Yao uint16_t cbcr_src_w = src_w / hsub; 2984c156c21SMark Yao uint16_t cbcr_src_h = src_h / vsub; 2994c156c21SMark Yao uint16_t vsu_mode; 3004c156c21SMark Yao uint16_t lb_mode; 3014c156c21SMark Yao uint32_t val; 302ce91d373SJeffy Chen int vskiplines; 3034c156c21SMark Yao 304d8bd23d9SAyan Kumar Halder info = drm_format_info(pixel_format); 305d8bd23d9SAyan Kumar Halder 306d8bd23d9SAyan Kumar Halder if (info->is_yuv) 307d8bd23d9SAyan Kumar Halder is_yuv = true; 308d8bd23d9SAyan Kumar Halder 3094c156c21SMark Yao if (dst_w > 3840) { 310ee4d7899SSean Paul DRM_DEV_ERROR(vop->dev, "Maximum dst width (3840) exceeded\n"); 3114c156c21SMark Yao return; 3124c156c21SMark Yao } 3134c156c21SMark Yao 3141194fffbSMark Yao if (!win->phy->scl->ext) { 3151194fffbSMark Yao VOP_SCL_SET(vop, win, scale_yrgb_x, 3161194fffbSMark Yao scl_cal_scale2(src_w, dst_w)); 3171194fffbSMark Yao VOP_SCL_SET(vop, win, scale_yrgb_y, 3181194fffbSMark Yao scl_cal_scale2(src_h, dst_h)); 3191194fffbSMark Yao if (is_yuv) { 3201194fffbSMark Yao VOP_SCL_SET(vop, win, scale_cbcr_x, 321ee8662fcSMark Yao scl_cal_scale2(cbcr_src_w, dst_w)); 3221194fffbSMark Yao VOP_SCL_SET(vop, win, scale_cbcr_y, 323ee8662fcSMark Yao scl_cal_scale2(cbcr_src_h, dst_h)); 3241194fffbSMark Yao } 3251194fffbSMark Yao return; 3261194fffbSMark Yao } 3271194fffbSMark Yao 3284c156c21SMark Yao yrgb_hor_scl_mode = scl_get_scl_mode(src_w, dst_w); 3294c156c21SMark Yao yrgb_ver_scl_mode = scl_get_scl_mode(src_h, dst_h); 3304c156c21SMark Yao 3314c156c21SMark Yao if (is_yuv) { 3324c156c21SMark Yao cbcr_hor_scl_mode = scl_get_scl_mode(cbcr_src_w, dst_w); 3334c156c21SMark Yao cbcr_ver_scl_mode = scl_get_scl_mode(cbcr_src_h, dst_h); 3344c156c21SMark Yao if (cbcr_hor_scl_mode == SCALE_DOWN) 3354c156c21SMark Yao lb_mode = scl_vop_cal_lb_mode(dst_w, true); 3364c156c21SMark Yao else 3374c156c21SMark Yao lb_mode = scl_vop_cal_lb_mode(cbcr_src_w, true); 3384c156c21SMark Yao } else { 3394c156c21SMark Yao if (yrgb_hor_scl_mode == SCALE_DOWN) 3404c156c21SMark Yao lb_mode = scl_vop_cal_lb_mode(dst_w, false); 3414c156c21SMark Yao else 3424c156c21SMark Yao lb_mode = scl_vop_cal_lb_mode(src_w, false); 3434c156c21SMark Yao } 3444c156c21SMark Yao 3451194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, lb_mode, lb_mode); 3464c156c21SMark Yao if (lb_mode == LB_RGB_3840X2) { 3474c156c21SMark Yao if (yrgb_ver_scl_mode != SCALE_NONE) { 348ee4d7899SSean Paul DRM_DEV_ERROR(vop->dev, "not allow yrgb ver scale\n"); 3494c156c21SMark Yao return; 3504c156c21SMark Yao } 3514c156c21SMark Yao if (cbcr_ver_scl_mode != SCALE_NONE) { 352ee4d7899SSean Paul DRM_DEV_ERROR(vop->dev, "not allow cbcr ver scale\n"); 3534c156c21SMark Yao return; 3544c156c21SMark Yao } 3554c156c21SMark Yao vsu_mode = SCALE_UP_BIL; 3564c156c21SMark Yao } else if (lb_mode == LB_RGB_2560X4) { 3574c156c21SMark Yao vsu_mode = SCALE_UP_BIL; 3584c156c21SMark Yao } else { 3594c156c21SMark Yao vsu_mode = SCALE_UP_BIC; 3604c156c21SMark Yao } 3614c156c21SMark Yao 3624c156c21SMark Yao val = scl_vop_cal_scale(yrgb_hor_scl_mode, src_w, dst_w, 3634c156c21SMark Yao true, 0, NULL); 3644c156c21SMark Yao VOP_SCL_SET(vop, win, scale_yrgb_x, val); 3654c156c21SMark Yao val = scl_vop_cal_scale(yrgb_ver_scl_mode, src_h, dst_h, 3664c156c21SMark Yao false, vsu_mode, &vskiplines); 3674c156c21SMark Yao VOP_SCL_SET(vop, win, scale_yrgb_y, val); 3684c156c21SMark Yao 3691194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, vsd_yrgb_gt4, vskiplines == 4); 3701194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, vsd_yrgb_gt2, vskiplines == 2); 3714c156c21SMark Yao 3721194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, yrgb_hor_scl_mode, yrgb_hor_scl_mode); 3731194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, yrgb_ver_scl_mode, yrgb_ver_scl_mode); 3741194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, yrgb_hsd_mode, SCALE_DOWN_BIL); 3751194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, yrgb_vsd_mode, SCALE_DOWN_BIL); 3761194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, yrgb_vsu_mode, vsu_mode); 3774c156c21SMark Yao if (is_yuv) { 3784c156c21SMark Yao val = scl_vop_cal_scale(cbcr_hor_scl_mode, cbcr_src_w, 3794c156c21SMark Yao dst_w, true, 0, NULL); 3804c156c21SMark Yao VOP_SCL_SET(vop, win, scale_cbcr_x, val); 3814c156c21SMark Yao val = scl_vop_cal_scale(cbcr_ver_scl_mode, cbcr_src_h, 3824c156c21SMark Yao dst_h, false, vsu_mode, &vskiplines); 3834c156c21SMark Yao VOP_SCL_SET(vop, win, scale_cbcr_y, val); 3844c156c21SMark Yao 3851194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, vsd_cbcr_gt4, vskiplines == 4); 3861194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, vsd_cbcr_gt2, vskiplines == 2); 3871194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, cbcr_hor_scl_mode, cbcr_hor_scl_mode); 3881194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, cbcr_ver_scl_mode, cbcr_ver_scl_mode); 3891194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, cbcr_hsd_mode, SCALE_DOWN_BIL); 3901194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, cbcr_vsd_mode, SCALE_DOWN_BIL); 3911194fffbSMark Yao VOP_SCL_SET_EXT(vop, win, cbcr_vsu_mode, vsu_mode); 3924c156c21SMark Yao } 3934c156c21SMark Yao } 3944c156c21SMark Yao 3951067219bSMark Yao static void vop_dsp_hold_valid_irq_enable(struct vop *vop) 3961067219bSMark Yao { 3971067219bSMark Yao unsigned long flags; 3981067219bSMark Yao 3991067219bSMark Yao if (WARN_ON(!vop->is_enabled)) 4001067219bSMark Yao return; 4011067219bSMark Yao 4021067219bSMark Yao spin_lock_irqsave(&vop->irq_lock, flags); 4031067219bSMark Yao 404fa374107STomasz Figa VOP_INTR_SET_TYPE(vop, clear, DSP_HOLD_VALID_INTR, 1); 405dbb3d944SMark Yao VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 1); 4061067219bSMark Yao 4071067219bSMark Yao spin_unlock_irqrestore(&vop->irq_lock, flags); 4081067219bSMark Yao } 4091067219bSMark Yao 4101067219bSMark Yao static void vop_dsp_hold_valid_irq_disable(struct vop *vop) 4111067219bSMark Yao { 4121067219bSMark Yao unsigned long flags; 4131067219bSMark Yao 4141067219bSMark Yao if (WARN_ON(!vop->is_enabled)) 4151067219bSMark Yao return; 4161067219bSMark Yao 4171067219bSMark Yao spin_lock_irqsave(&vop->irq_lock, flags); 4181067219bSMark Yao 419dbb3d944SMark Yao VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 0); 4201067219bSMark Yao 4211067219bSMark Yao spin_unlock_irqrestore(&vop->irq_lock, flags); 4221067219bSMark Yao } 4231067219bSMark Yao 42469c34e41SYakir Yang /* 42569c34e41SYakir Yang * (1) each frame starts at the start of the Vsync pulse which is signaled by 42669c34e41SYakir Yang * the "FRAME_SYNC" interrupt. 42769c34e41SYakir Yang * (2) the active data region of each frame ends at dsp_vact_end 42869c34e41SYakir Yang * (3) we should program this same number (dsp_vact_end) into dsp_line_frag_num, 42969c34e41SYakir Yang * to get "LINE_FLAG" interrupt at the end of the active on screen data. 43069c34e41SYakir Yang * 43169c34e41SYakir Yang * VOP_INTR_CTRL0.dsp_line_frag_num = VOP_DSP_VACT_ST_END.dsp_vact_end 43269c34e41SYakir Yang * Interrupts 43369c34e41SYakir Yang * LINE_FLAG -------------------------------+ 43469c34e41SYakir Yang * FRAME_SYNC ----+ | 43569c34e41SYakir Yang * | | 43669c34e41SYakir Yang * v v 43769c34e41SYakir Yang * | Vsync | Vbp | Vactive | Vfp | 43869c34e41SYakir Yang * ^ ^ ^ ^ 43969c34e41SYakir Yang * | | | | 44069c34e41SYakir Yang * | | | | 44169c34e41SYakir Yang * dsp_vs_end ------------+ | | | VOP_DSP_VTOTAL_VS_END 44269c34e41SYakir Yang * dsp_vact_start --------------+ | | VOP_DSP_VACT_ST_END 44369c34e41SYakir Yang * dsp_vact_end ----------------------------+ | VOP_DSP_VACT_ST_END 44469c34e41SYakir Yang * dsp_total -------------------------------------+ VOP_DSP_VTOTAL_VS_END 44569c34e41SYakir Yang */ 44669c34e41SYakir Yang static bool vop_line_flag_irq_is_enabled(struct vop *vop) 44769c34e41SYakir Yang { 44869c34e41SYakir Yang uint32_t line_flag_irq; 44969c34e41SYakir Yang unsigned long flags; 45069c34e41SYakir Yang 45169c34e41SYakir Yang spin_lock_irqsave(&vop->irq_lock, flags); 45269c34e41SYakir Yang 45369c34e41SYakir Yang line_flag_irq = VOP_INTR_GET_TYPE(vop, enable, LINE_FLAG_INTR); 45469c34e41SYakir Yang 45569c34e41SYakir Yang spin_unlock_irqrestore(&vop->irq_lock, flags); 45669c34e41SYakir Yang 45769c34e41SYakir Yang return !!line_flag_irq; 45869c34e41SYakir Yang } 45969c34e41SYakir Yang 460459b086dSJeffy Chen static void vop_line_flag_irq_enable(struct vop *vop) 46169c34e41SYakir Yang { 46269c34e41SYakir Yang unsigned long flags; 46369c34e41SYakir Yang 46469c34e41SYakir Yang if (WARN_ON(!vop->is_enabled)) 46569c34e41SYakir Yang return; 46669c34e41SYakir Yang 46769c34e41SYakir Yang spin_lock_irqsave(&vop->irq_lock, flags); 46869c34e41SYakir Yang 469fa374107STomasz Figa VOP_INTR_SET_TYPE(vop, clear, LINE_FLAG_INTR, 1); 47069c34e41SYakir Yang VOP_INTR_SET_TYPE(vop, enable, LINE_FLAG_INTR, 1); 47169c34e41SYakir Yang 47269c34e41SYakir Yang spin_unlock_irqrestore(&vop->irq_lock, flags); 47369c34e41SYakir Yang } 47469c34e41SYakir Yang 47569c34e41SYakir Yang static void vop_line_flag_irq_disable(struct vop *vop) 47669c34e41SYakir Yang { 47769c34e41SYakir Yang unsigned long flags; 47869c34e41SYakir Yang 47969c34e41SYakir Yang if (WARN_ON(!vop->is_enabled)) 48069c34e41SYakir Yang return; 48169c34e41SYakir Yang 48269c34e41SYakir Yang spin_lock_irqsave(&vop->irq_lock, flags); 48369c34e41SYakir Yang 48469c34e41SYakir Yang VOP_INTR_SET_TYPE(vop, enable, LINE_FLAG_INTR, 0); 48569c34e41SYakir Yang 48669c34e41SYakir Yang spin_unlock_irqrestore(&vop->irq_lock, flags); 48769c34e41SYakir Yang } 48869c34e41SYakir Yang 489e2810a71SHeiko Stuebner static int vop_core_clks_enable(struct vop *vop) 490e2810a71SHeiko Stuebner { 491e2810a71SHeiko Stuebner int ret; 492e2810a71SHeiko Stuebner 493e2810a71SHeiko Stuebner ret = clk_enable(vop->hclk); 494e2810a71SHeiko Stuebner if (ret < 0) 495e2810a71SHeiko Stuebner return ret; 496e2810a71SHeiko Stuebner 497e2810a71SHeiko Stuebner ret = clk_enable(vop->aclk); 498e2810a71SHeiko Stuebner if (ret < 0) 499e2810a71SHeiko Stuebner goto err_disable_hclk; 500e2810a71SHeiko Stuebner 501e2810a71SHeiko Stuebner return 0; 502e2810a71SHeiko Stuebner 503e2810a71SHeiko Stuebner err_disable_hclk: 504e2810a71SHeiko Stuebner clk_disable(vop->hclk); 505e2810a71SHeiko Stuebner return ret; 506e2810a71SHeiko Stuebner } 507e2810a71SHeiko Stuebner 508e2810a71SHeiko Stuebner static void vop_core_clks_disable(struct vop *vop) 509e2810a71SHeiko Stuebner { 510e2810a71SHeiko Stuebner clk_disable(vop->aclk); 511e2810a71SHeiko Stuebner clk_disable(vop->hclk); 512e2810a71SHeiko Stuebner } 513e2810a71SHeiko Stuebner 51439a9ad8fSSean Paul static int vop_enable(struct drm_crtc *crtc) 5152048e328SMark Yao { 5162048e328SMark Yao struct vop *vop = to_vop(crtc); 51764d77564SMark yao int ret, i; 5182048e328SMark Yao 5195d82d1a7SMark Yao ret = pm_runtime_get_sync(vop->dev); 5205d82d1a7SMark Yao if (ret < 0) { 521d8dd6804SHaneen Mohammed DRM_DEV_ERROR(vop->dev, "failed to get pm runtime: %d\n", ret); 5225e570373SJeffy Chen return ret; 5235d82d1a7SMark Yao } 5245d82d1a7SMark Yao 525e2810a71SHeiko Stuebner ret = vop_core_clks_enable(vop); 52639a9ad8fSSean Paul if (WARN_ON(ret < 0)) 52739a9ad8fSSean Paul goto err_put_pm_runtime; 5282048e328SMark Yao 5292048e328SMark Yao ret = clk_enable(vop->dclk); 53039a9ad8fSSean Paul if (WARN_ON(ret < 0)) 531e2810a71SHeiko Stuebner goto err_disable_core; 5322048e328SMark Yao 5332048e328SMark Yao /* 5342048e328SMark Yao * Slave iommu shares power, irq and clock with vop. It was associated 5352048e328SMark Yao * automatically with this master device via common driver code. 5362048e328SMark Yao * Now that we have enabled the clock we attach it to the shared drm 5372048e328SMark Yao * mapping. 5382048e328SMark Yao */ 5392048e328SMark Yao ret = rockchip_drm_dma_attach_device(vop->drm_dev, vop->dev); 5402048e328SMark Yao if (ret) { 541d8dd6804SHaneen Mohammed DRM_DEV_ERROR(vop->dev, 542d8dd6804SHaneen Mohammed "failed to attach dma mapping, %d\n", ret); 543e2810a71SHeiko Stuebner goto err_disable_dclk; 5442048e328SMark Yao } 5452048e328SMark Yao 54676f1416eSMarc Zyngier spin_lock(&vop->reg_lock); 54776f1416eSMarc Zyngier for (i = 0; i < vop->len; i += 4) 54876f1416eSMarc Zyngier writel_relaxed(vop->regsbak[i / 4], vop->regs + i); 54976f1416eSMarc Zyngier 55064d77564SMark yao /* 55164d77564SMark yao * We need to make sure that all windows are disabled before we 55264d77564SMark yao * enable the crtc. Otherwise we might try to scan from a destroyed 55364d77564SMark yao * buffer later. 55464d77564SMark yao */ 55564d77564SMark yao for (i = 0; i < vop->data->win_size; i++) { 55664d77564SMark yao struct vop_win *vop_win = &vop->win[i]; 55764d77564SMark yao const struct vop_win_data *win = vop_win->data; 55864d77564SMark yao 55964d77564SMark yao VOP_WIN_SET(vop, win, enable, 0); 56064d77564SMark yao } 56176f1416eSMarc Zyngier spin_unlock(&vop->reg_lock); 56264d77564SMark yao 56317a794d7SChris Zhong vop_cfg_done(vop); 56417a794d7SChris Zhong 56552ab7891SMark Yao /* 56652ab7891SMark Yao * At here, vop clock & iommu is enable, R/W vop regs would be safe. 56752ab7891SMark Yao */ 56852ab7891SMark Yao vop->is_enabled = true; 56952ab7891SMark Yao 5702048e328SMark Yao spin_lock(&vop->reg_lock); 5712048e328SMark Yao 5729a61c54bSMark yao VOP_REG_SET(vop, common, standby, 1); 5732048e328SMark Yao 5742048e328SMark Yao spin_unlock(&vop->reg_lock); 5752048e328SMark Yao 576b5f7b755SMark Yao drm_crtc_vblank_on(crtc); 5772048e328SMark Yao 57839a9ad8fSSean Paul return 0; 5792048e328SMark Yao 5802048e328SMark Yao err_disable_dclk: 5812048e328SMark Yao clk_disable(vop->dclk); 582e2810a71SHeiko Stuebner err_disable_core: 583e2810a71SHeiko Stuebner vop_core_clks_disable(vop); 58439a9ad8fSSean Paul err_put_pm_runtime: 58539a9ad8fSSean Paul pm_runtime_put_sync(vop->dev); 58639a9ad8fSSean Paul return ret; 5872048e328SMark Yao } 5882048e328SMark Yao 58964581714SLaurent Pinchart static void vop_crtc_atomic_disable(struct drm_crtc *crtc, 59064581714SLaurent Pinchart struct drm_crtc_state *old_state) 5912048e328SMark Yao { 5922048e328SMark Yao struct vop *vop = to_vop(crtc); 5932048e328SMark Yao 594893b6cadSDaniel Vetter WARN_ON(vop->event); 595893b6cadSDaniel Vetter 596e334d48bSzain wang mutex_lock(&vop->vop_lock); 597b5f7b755SMark Yao drm_crtc_vblank_off(crtc); 5982048e328SMark Yao 5992048e328SMark Yao /* 6001067219bSMark Yao * Vop standby will take effect at end of current frame, 6011067219bSMark Yao * if dsp hold valid irq happen, it means standby complete. 6021067219bSMark Yao * 6031067219bSMark Yao * we must wait standby complete when we want to disable aclk, 6041067219bSMark Yao * if not, memory bus maybe dead. 6052048e328SMark Yao */ 6061067219bSMark Yao reinit_completion(&vop->dsp_hold_completion); 6071067219bSMark Yao vop_dsp_hold_valid_irq_enable(vop); 6081067219bSMark Yao 6092048e328SMark Yao spin_lock(&vop->reg_lock); 6102048e328SMark Yao 6119a61c54bSMark yao VOP_REG_SET(vop, common, standby, 1); 6122048e328SMark Yao 6132048e328SMark Yao spin_unlock(&vop->reg_lock); 61452ab7891SMark Yao 6151067219bSMark Yao wait_for_completion(&vop->dsp_hold_completion); 6162048e328SMark Yao 6171067219bSMark Yao vop_dsp_hold_valid_irq_disable(vop); 6181067219bSMark Yao 6191067219bSMark Yao vop->is_enabled = false; 6201067219bSMark Yao 6211067219bSMark Yao /* 6221067219bSMark Yao * vop standby complete, so iommu detach is safe. 6231067219bSMark Yao */ 6242048e328SMark Yao rockchip_drm_dma_detach_device(vop->drm_dev, vop->dev); 6252048e328SMark Yao 6261067219bSMark Yao clk_disable(vop->dclk); 627e2810a71SHeiko Stuebner vop_core_clks_disable(vop); 6285d82d1a7SMark Yao pm_runtime_put(vop->dev); 629e334d48bSzain wang mutex_unlock(&vop->vop_lock); 630893b6cadSDaniel Vetter 631893b6cadSDaniel Vetter if (crtc->state->event && !crtc->state->active) { 632893b6cadSDaniel Vetter spin_lock_irq(&crtc->dev->event_lock); 633893b6cadSDaniel Vetter drm_crtc_send_vblank_event(crtc, crtc->state->event); 634893b6cadSDaniel Vetter spin_unlock_irq(&crtc->dev->event_lock); 635893b6cadSDaniel Vetter 636893b6cadSDaniel Vetter crtc->state->event = NULL; 637893b6cadSDaniel Vetter } 6382048e328SMark Yao } 6392048e328SMark Yao 64063ebb9faSMark Yao static void vop_plane_destroy(struct drm_plane *plane) 6412048e328SMark Yao { 64263ebb9faSMark Yao drm_plane_cleanup(plane); 6432048e328SMark Yao } 6442048e328SMark Yao 64563ebb9faSMark Yao static int vop_plane_atomic_check(struct drm_plane *plane, 64663ebb9faSMark Yao struct drm_plane_state *state) 6472048e328SMark Yao { 64863ebb9faSMark Yao struct drm_crtc *crtc = state->crtc; 64992915da6SJohn Keeping struct drm_crtc_state *crtc_state; 65063ebb9faSMark Yao struct drm_framebuffer *fb = state->fb; 6512048e328SMark Yao struct vop_win *vop_win = to_vop_win(plane); 6522048e328SMark Yao const struct vop_win_data *win = vop_win->data; 6532048e328SMark Yao int ret; 6544c156c21SMark Yao int min_scale = win->phy->scl ? FRAC_16_16(1, 8) : 6554c156c21SMark Yao DRM_PLANE_HELPER_NO_SCALING; 6564c156c21SMark Yao int max_scale = win->phy->scl ? FRAC_16_16(8, 1) : 6574c156c21SMark Yao DRM_PLANE_HELPER_NO_SCALING; 6582048e328SMark Yao 65963ebb9faSMark Yao if (!crtc || !fb) 660d47a7246STomasz Figa return 0; 66192915da6SJohn Keeping 66292915da6SJohn Keeping crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc); 66392915da6SJohn Keeping if (WARN_ON(!crtc_state)) 66492915da6SJohn Keeping return -EINVAL; 66592915da6SJohn Keeping 66681af63a4SVille Syrjälä ret = drm_atomic_helper_check_plane_state(state, crtc_state, 667f9b96be0SVille Syrjälä min_scale, max_scale, 668f9b96be0SVille Syrjälä true, true); 6692048e328SMark Yao if (ret) 6702048e328SMark Yao return ret; 6712048e328SMark Yao 672f9b96be0SVille Syrjälä if (!state->visible) 673d47a7246STomasz Figa return 0; 6742048e328SMark Yao 675438b74a5SVille Syrjälä ret = vop_convert_format(fb->format->format); 676d47a7246STomasz Figa if (ret < 0) 677d47a7246STomasz Figa return ret; 67884c7f8caSMark Yao 67984c7f8caSMark Yao /* 68084c7f8caSMark Yao * Src.x1 can be odd when do clip, but yuv plane start point 68184c7f8caSMark Yao * need align with 2 pixel. 68284c7f8caSMark Yao */ 683d8bd23d9SAyan Kumar Halder if (fb->format->is_yuv && ((state->src.x1 >> 16) % 2)) { 684d415fb87SMark yao DRM_ERROR("Invalid Source: Yuv format not support odd xpos\n"); 68563ebb9faSMark Yao return -EINVAL; 686d415fb87SMark yao } 68763ebb9faSMark Yao 68863ebb9faSMark Yao return 0; 68984c7f8caSMark Yao } 69084c7f8caSMark Yao 69163ebb9faSMark Yao static void vop_plane_atomic_disable(struct drm_plane *plane, 69263ebb9faSMark Yao struct drm_plane_state *old_state) 69363ebb9faSMark Yao { 69463ebb9faSMark Yao struct vop_win *vop_win = to_vop_win(plane); 69563ebb9faSMark Yao const struct vop_win_data *win = vop_win->data; 69663ebb9faSMark Yao struct vop *vop = to_vop(old_state->crtc); 6972048e328SMark Yao 69863ebb9faSMark Yao if (!old_state->crtc) 69963ebb9faSMark Yao return; 7002048e328SMark Yao 70163ebb9faSMark Yao spin_lock(&vop->reg_lock); 7022048e328SMark Yao 70363ebb9faSMark Yao VOP_WIN_SET(vop, win, enable, 0); 7042048e328SMark Yao 70563ebb9faSMark Yao spin_unlock(&vop->reg_lock); 70663ebb9faSMark Yao } 70763ebb9faSMark Yao 70863ebb9faSMark Yao static void vop_plane_atomic_update(struct drm_plane *plane, 70963ebb9faSMark Yao struct drm_plane_state *old_state) 71063ebb9faSMark Yao { 71163ebb9faSMark Yao struct drm_plane_state *state = plane->state; 71263ebb9faSMark Yao struct drm_crtc *crtc = state->crtc; 71363ebb9faSMark Yao struct vop_win *vop_win = to_vop_win(plane); 71463ebb9faSMark Yao const struct vop_win_data *win = vop_win->data; 71563ebb9faSMark Yao struct vop *vop = to_vop(state->crtc); 71663ebb9faSMark Yao struct drm_framebuffer *fb = state->fb; 71763ebb9faSMark Yao unsigned int actual_w, actual_h; 71863ebb9faSMark Yao unsigned int dsp_stx, dsp_sty; 71963ebb9faSMark Yao uint32_t act_info, dsp_info, dsp_st; 720ac92028eSVille Syrjälä struct drm_rect *src = &state->src; 721ac92028eSVille Syrjälä struct drm_rect *dest = &state->dst; 72263ebb9faSMark Yao struct drm_gem_object *obj, *uv_obj; 72363ebb9faSMark Yao struct rockchip_gem_object *rk_obj, *rk_uv_obj; 72463ebb9faSMark Yao unsigned long offset; 72563ebb9faSMark Yao dma_addr_t dma_addr; 72663ebb9faSMark Yao uint32_t val; 72763ebb9faSMark Yao bool rb_swap; 72858badaa7SKristian H. Kristensen int win_index = VOP_WIN_TO_INDEX(vop_win); 729d47a7246STomasz Figa int format; 73063ebb9faSMark Yao 73163ebb9faSMark Yao /* 73263ebb9faSMark Yao * can't update plane when vop is disabled. 73363ebb9faSMark Yao */ 7344f9d39a7SDaniel Vetter if (WARN_ON(!crtc)) 73563ebb9faSMark Yao return; 73663ebb9faSMark Yao 73763ebb9faSMark Yao if (WARN_ON(!vop->is_enabled)) 73863ebb9faSMark Yao return; 73963ebb9faSMark Yao 740d47a7246STomasz Figa if (!state->visible) { 74163ebb9faSMark Yao vop_plane_atomic_disable(plane, old_state); 74263ebb9faSMark Yao return; 74363ebb9faSMark Yao } 74463ebb9faSMark Yao 745957428f9SDaniel Stone obj = fb->obj[0]; 74663ebb9faSMark Yao rk_obj = to_rockchip_obj(obj); 74763ebb9faSMark Yao 74863ebb9faSMark Yao actual_w = drm_rect_width(src) >> 16; 74963ebb9faSMark Yao actual_h = drm_rect_height(src) >> 16; 75063ebb9faSMark Yao act_info = (actual_h - 1) << 16 | ((actual_w - 1) & 0xffff); 75163ebb9faSMark Yao 75263ebb9faSMark Yao dsp_info = (drm_rect_height(dest) - 1) << 16; 75363ebb9faSMark Yao dsp_info |= (drm_rect_width(dest) - 1) & 0xffff; 75463ebb9faSMark Yao 75563ebb9faSMark Yao dsp_stx = dest->x1 + crtc->mode.htotal - crtc->mode.hsync_start; 75663ebb9faSMark Yao dsp_sty = dest->y1 + crtc->mode.vtotal - crtc->mode.vsync_start; 75763ebb9faSMark Yao dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff); 75863ebb9faSMark Yao 759353c8598SVille Syrjälä offset = (src->x1 >> 16) * fb->format->cpp[0]; 76063ebb9faSMark Yao offset += (src->y1 >> 16) * fb->pitches[0]; 761d47a7246STomasz Figa dma_addr = rk_obj->dma_addr + offset + fb->offsets[0]; 762d47a7246STomasz Figa 763438b74a5SVille Syrjälä format = vop_convert_format(fb->format->format); 76463ebb9faSMark Yao 76563ebb9faSMark Yao spin_lock(&vop->reg_lock); 76663ebb9faSMark Yao 767d47a7246STomasz Figa VOP_WIN_SET(vop, win, format, format); 768da709a7bSMark yao VOP_WIN_SET(vop, win, yrgb_vir, DIV_ROUND_UP(fb->pitches[0], 4)); 769d47a7246STomasz Figa VOP_WIN_SET(vop, win, yrgb_mst, dma_addr); 770d8bd23d9SAyan Kumar Halder if (fb->format->is_yuv) { 771438b74a5SVille Syrjälä int hsub = drm_format_horz_chroma_subsampling(fb->format->format); 772438b74a5SVille Syrjälä int vsub = drm_format_vert_chroma_subsampling(fb->format->format); 773353c8598SVille Syrjälä int bpp = fb->format->cpp[1]; 77484c7f8caSMark Yao 775957428f9SDaniel Stone uv_obj = fb->obj[1]; 77684c7f8caSMark Yao rk_uv_obj = to_rockchip_obj(uv_obj); 77784c7f8caSMark Yao 77863ebb9faSMark Yao offset = (src->x1 >> 16) * bpp / hsub; 77963ebb9faSMark Yao offset += (src->y1 >> 16) * fb->pitches[1] / vsub; 78084c7f8caSMark Yao 78163ebb9faSMark Yao dma_addr = rk_uv_obj->dma_addr + offset + fb->offsets[1]; 782da709a7bSMark yao VOP_WIN_SET(vop, win, uv_vir, DIV_ROUND_UP(fb->pitches[1], 4)); 78363ebb9faSMark Yao VOP_WIN_SET(vop, win, uv_mst, dma_addr); 78484c7f8caSMark Yao } 7854c156c21SMark Yao 7864c156c21SMark Yao if (win->phy->scl) 7874c156c21SMark Yao scl_vop_cal_scl_fac(vop, win, actual_w, actual_h, 78863ebb9faSMark Yao drm_rect_width(dest), drm_rect_height(dest), 789438b74a5SVille Syrjälä fb->format->format); 7904c156c21SMark Yao 79163ebb9faSMark Yao VOP_WIN_SET(vop, win, act_info, act_info); 79263ebb9faSMark Yao VOP_WIN_SET(vop, win, dsp_info, dsp_info); 79363ebb9faSMark Yao VOP_WIN_SET(vop, win, dsp_st, dsp_st); 7944c156c21SMark Yao 795438b74a5SVille Syrjälä rb_swap = has_rb_swapped(fb->format->format); 79685a359f2STomasz Figa VOP_WIN_SET(vop, win, rb_swap, rb_swap); 7972048e328SMark Yao 79858badaa7SKristian H. Kristensen /* 79958badaa7SKristian H. Kristensen * Blending win0 with the background color doesn't seem to work 80058badaa7SKristian H. Kristensen * correctly. We only get the background color, no matter the contents 80158badaa7SKristian H. Kristensen * of the win0 framebuffer. However, blending pre-multiplied color 80258badaa7SKristian H. Kristensen * with the default opaque black default background color is a no-op, 80358badaa7SKristian H. Kristensen * so we can just disable blending to get the correct result. 80458badaa7SKristian H. Kristensen */ 80558badaa7SKristian H. Kristensen if (fb->format->has_alpha && win_index > 0) { 8062048e328SMark Yao VOP_WIN_SET(vop, win, dst_alpha_ctl, 8072048e328SMark Yao DST_FACTOR_M0(ALPHA_SRC_INVERSE)); 8082048e328SMark Yao val = SRC_ALPHA_EN(1) | SRC_COLOR_M0(ALPHA_SRC_PRE_MUL) | 8092048e328SMark Yao SRC_ALPHA_M0(ALPHA_STRAIGHT) | 8102048e328SMark Yao SRC_BLEND_M0(ALPHA_PER_PIX) | 8112048e328SMark Yao SRC_ALPHA_CAL_M0(ALPHA_NO_SATURATION) | 8122048e328SMark Yao SRC_FACTOR_M0(ALPHA_ONE); 8132048e328SMark Yao VOP_WIN_SET(vop, win, src_alpha_ctl, val); 8142048e328SMark Yao } else { 8152048e328SMark Yao VOP_WIN_SET(vop, win, src_alpha_ctl, SRC_ALPHA_EN(0)); 8162048e328SMark Yao } 8172048e328SMark Yao 8182048e328SMark Yao VOP_WIN_SET(vop, win, enable, 1); 8192048e328SMark Yao spin_unlock(&vop->reg_lock); 8202048e328SMark Yao } 8212048e328SMark Yao 82263ebb9faSMark Yao static const struct drm_plane_helper_funcs plane_helper_funcs = { 82363ebb9faSMark Yao .atomic_check = vop_plane_atomic_check, 82463ebb9faSMark Yao .atomic_update = vop_plane_atomic_update, 82563ebb9faSMark Yao .atomic_disable = vop_plane_atomic_disable, 82663ebb9faSMark Yao }; 82763ebb9faSMark Yao 8282048e328SMark Yao static const struct drm_plane_funcs vop_plane_funcs = { 82963ebb9faSMark Yao .update_plane = drm_atomic_helper_update_plane, 83063ebb9faSMark Yao .disable_plane = drm_atomic_helper_disable_plane, 8312048e328SMark Yao .destroy = vop_plane_destroy, 832d47a7246STomasz Figa .reset = drm_atomic_helper_plane_reset, 833d47a7246STomasz Figa .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, 834d47a7246STomasz Figa .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, 8352048e328SMark Yao }; 8362048e328SMark Yao 8372048e328SMark Yao static int vop_crtc_enable_vblank(struct drm_crtc *crtc) 8382048e328SMark Yao { 8392048e328SMark Yao struct vop *vop = to_vop(crtc); 8402048e328SMark Yao unsigned long flags; 8412048e328SMark Yao 84263ebb9faSMark Yao if (WARN_ON(!vop->is_enabled)) 8432048e328SMark Yao return -EPERM; 8442048e328SMark Yao 8452048e328SMark Yao spin_lock_irqsave(&vop->irq_lock, flags); 8462048e328SMark Yao 847fa374107STomasz Figa VOP_INTR_SET_TYPE(vop, clear, FS_INTR, 1); 848dbb3d944SMark Yao VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 1); 8492048e328SMark Yao 8502048e328SMark Yao spin_unlock_irqrestore(&vop->irq_lock, flags); 8512048e328SMark Yao 8522048e328SMark Yao return 0; 8532048e328SMark Yao } 8542048e328SMark Yao 8552048e328SMark Yao static void vop_crtc_disable_vblank(struct drm_crtc *crtc) 8562048e328SMark Yao { 8572048e328SMark Yao struct vop *vop = to_vop(crtc); 8582048e328SMark Yao unsigned long flags; 8592048e328SMark Yao 86063ebb9faSMark Yao if (WARN_ON(!vop->is_enabled)) 8612048e328SMark Yao return; 86231e980c5SMark Yao 8632048e328SMark Yao spin_lock_irqsave(&vop->irq_lock, flags); 864dbb3d944SMark Yao 865dbb3d944SMark Yao VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 0); 866dbb3d944SMark Yao 8672048e328SMark Yao spin_unlock_irqrestore(&vop->irq_lock, flags); 8682048e328SMark Yao } 8692048e328SMark Yao 8702048e328SMark Yao static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, 8712048e328SMark Yao const struct drm_display_mode *mode, 8722048e328SMark Yao struct drm_display_mode *adjusted_mode) 8732048e328SMark Yao { 874b59b8de3SChris Zhong struct vop *vop = to_vop(crtc); 875b59b8de3SChris Zhong 876b59b8de3SChris Zhong adjusted_mode->clock = 877b59b8de3SChris Zhong clk_round_rate(vop->dclk, mode->clock * 1000) / 1000; 878b59b8de3SChris Zhong 8792048e328SMark Yao return true; 8802048e328SMark Yao } 8812048e328SMark Yao 8820b20a0f8SLaurent Pinchart static void vop_crtc_atomic_enable(struct drm_crtc *crtc, 8830b20a0f8SLaurent Pinchart struct drm_crtc_state *old_state) 8842048e328SMark Yao { 8852048e328SMark Yao struct vop *vop = to_vop(crtc); 886efd11cc8SMark yao const struct vop_data *vop_data = vop->data; 8874e257d9eSMark Yao struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc->state); 88863ebb9faSMark Yao struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode; 8892048e328SMark Yao u16 hsync_len = adjusted_mode->hsync_end - adjusted_mode->hsync_start; 8902048e328SMark Yao u16 hdisplay = adjusted_mode->hdisplay; 8912048e328SMark Yao u16 htotal = adjusted_mode->htotal; 8922048e328SMark Yao u16 hact_st = adjusted_mode->htotal - adjusted_mode->hsync_start; 8932048e328SMark Yao u16 hact_end = hact_st + hdisplay; 8942048e328SMark Yao u16 vdisplay = adjusted_mode->vdisplay; 8952048e328SMark Yao u16 vtotal = adjusted_mode->vtotal; 8962048e328SMark Yao u16 vsync_len = adjusted_mode->vsync_end - adjusted_mode->vsync_start; 8972048e328SMark Yao u16 vact_st = adjusted_mode->vtotal - adjusted_mode->vsync_start; 8982048e328SMark Yao u16 vact_end = vact_st + vdisplay; 8990a63bfd0SMark Yao uint32_t pin_pol, val; 90039a9ad8fSSean Paul int ret; 9012048e328SMark Yao 902e334d48bSzain wang mutex_lock(&vop->vop_lock); 903e334d48bSzain wang 904893b6cadSDaniel Vetter WARN_ON(vop->event); 905893b6cadSDaniel Vetter 90639a9ad8fSSean Paul ret = vop_enable(crtc); 90739a9ad8fSSean Paul if (ret) { 908e334d48bSzain wang mutex_unlock(&vop->vop_lock); 90939a9ad8fSSean Paul DRM_DEV_ERROR(vop->dev, "Failed to enable vop (%d)\n", ret); 91039a9ad8fSSean Paul return; 91139a9ad8fSSean Paul } 91239a9ad8fSSean Paul 9131a0f7ed3SChris Zhong pin_pol = BIT(DCLK_INVERT); 914d790ad03SJohn Keeping pin_pol |= (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) ? 915d790ad03SJohn Keeping BIT(HSYNC_POSITIVE) : 0; 916d790ad03SJohn Keeping pin_pol |= (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) ? 917d790ad03SJohn Keeping BIT(VSYNC_POSITIVE) : 0; 9189a61c54bSMark yao VOP_REG_SET(vop, output, pin_pol, pin_pol); 919cf6d100dSHeiko Stuebner VOP_REG_SET(vop, output, mipi_dual_channel_en, 0); 9200a63bfd0SMark Yao 9214e257d9eSMark Yao switch (s->output_type) { 9224e257d9eSMark Yao case DRM_MODE_CONNECTOR_LVDS: 9239a61c54bSMark yao VOP_REG_SET(vop, output, rgb_en, 1); 9249a61c54bSMark yao VOP_REG_SET(vop, output, rgb_pin_pol, pin_pol); 9254e257d9eSMark Yao break; 9264e257d9eSMark Yao case DRM_MODE_CONNECTOR_eDP: 9279a61c54bSMark yao VOP_REG_SET(vop, output, edp_pin_pol, pin_pol); 9289a61c54bSMark yao VOP_REG_SET(vop, output, edp_en, 1); 9294e257d9eSMark Yao break; 9304e257d9eSMark Yao case DRM_MODE_CONNECTOR_HDMIA: 9319a61c54bSMark yao VOP_REG_SET(vop, output, hdmi_pin_pol, pin_pol); 9329a61c54bSMark yao VOP_REG_SET(vop, output, hdmi_en, 1); 9334e257d9eSMark Yao break; 9344e257d9eSMark Yao case DRM_MODE_CONNECTOR_DSI: 9359a61c54bSMark yao VOP_REG_SET(vop, output, mipi_pin_pol, pin_pol); 9369a61c54bSMark yao VOP_REG_SET(vop, output, mipi_en, 1); 937cf6d100dSHeiko Stuebner VOP_REG_SET(vop, output, mipi_dual_channel_en, 938cf6d100dSHeiko Stuebner !!(s->output_flags & ROCKCHIP_OUTPUT_DSI_DUAL)); 9394e257d9eSMark Yao break; 9401a0f7ed3SChris Zhong case DRM_MODE_CONNECTOR_DisplayPort: 9411a0f7ed3SChris Zhong pin_pol &= ~BIT(DCLK_INVERT); 9429a61c54bSMark yao VOP_REG_SET(vop, output, dp_pin_pol, pin_pol); 9439a61c54bSMark yao VOP_REG_SET(vop, output, dp_en, 1); 9441a0f7ed3SChris Zhong break; 9454e257d9eSMark Yao default: 946ee4d7899SSean Paul DRM_DEV_ERROR(vop->dev, "unsupported connector_type [%d]\n", 947ee4d7899SSean Paul s->output_type); 9484e257d9eSMark Yao } 949efd11cc8SMark yao 950efd11cc8SMark yao /* 951efd11cc8SMark yao * if vop is not support RGB10 output, need force RGB10 to RGB888. 952efd11cc8SMark yao */ 953efd11cc8SMark yao if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && 954efd11cc8SMark yao !(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10)) 955efd11cc8SMark yao s->output_mode = ROCKCHIP_OUT_MODE_P888; 9566bda8112SMark Yao 9576bda8112SMark Yao if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && s->output_bpc == 8) 9586bda8112SMark Yao VOP_REG_SET(vop, common, pre_dither_down, 1); 9596bda8112SMark Yao else 9606bda8112SMark Yao VOP_REG_SET(vop, common, pre_dither_down, 0); 9616bda8112SMark Yao 9629a61c54bSMark yao VOP_REG_SET(vop, common, out_mode, s->output_mode); 9632048e328SMark Yao 9649a61c54bSMark yao VOP_REG_SET(vop, modeset, htotal_pw, (htotal << 16) | hsync_len); 9652048e328SMark Yao val = hact_st << 16; 9662048e328SMark Yao val |= hact_end; 9679a61c54bSMark yao VOP_REG_SET(vop, modeset, hact_st_end, val); 9689a61c54bSMark yao VOP_REG_SET(vop, modeset, hpost_st_end, val); 9692048e328SMark Yao 9709a61c54bSMark yao VOP_REG_SET(vop, modeset, vtotal_pw, (vtotal << 16) | vsync_len); 9712048e328SMark Yao val = vact_st << 16; 9722048e328SMark Yao val |= vact_end; 9739a61c54bSMark yao VOP_REG_SET(vop, modeset, vact_st_end, val); 9749a61c54bSMark yao VOP_REG_SET(vop, modeset, vpost_st_end, val); 9752048e328SMark Yao 9769a61c54bSMark yao VOP_REG_SET(vop, intr, line_flag_num[0], vact_end); 977459b086dSJeffy Chen 9782048e328SMark Yao clk_set_rate(vop->dclk, adjusted_mode->clock * 1000); 979ce3887edSMark Yao 9809a61c54bSMark yao VOP_REG_SET(vop, common, standby, 0); 981e334d48bSzain wang mutex_unlock(&vop->vop_lock); 9822048e328SMark Yao } 9832048e328SMark Yao 9847caecdbeSTomasz Figa static bool vop_fs_irq_is_pending(struct vop *vop) 9857caecdbeSTomasz Figa { 9867caecdbeSTomasz Figa return VOP_INTR_GET_TYPE(vop, status, FS_INTR); 9877caecdbeSTomasz Figa } 9887caecdbeSTomasz Figa 9897caecdbeSTomasz Figa static void vop_wait_for_irq_handler(struct vop *vop) 9907caecdbeSTomasz Figa { 9917caecdbeSTomasz Figa bool pending; 9927caecdbeSTomasz Figa int ret; 9937caecdbeSTomasz Figa 9947caecdbeSTomasz Figa /* 9957caecdbeSTomasz Figa * Spin until frame start interrupt status bit goes low, which means 9967caecdbeSTomasz Figa * that interrupt handler was invoked and cleared it. The timeout of 9977caecdbeSTomasz Figa * 10 msecs is really too long, but it is just a safety measure if 9987caecdbeSTomasz Figa * something goes really wrong. The wait will only happen in the very 9997caecdbeSTomasz Figa * unlikely case of a vblank happening exactly at the same time and 10007caecdbeSTomasz Figa * shouldn't exceed microseconds range. 10017caecdbeSTomasz Figa */ 10027caecdbeSTomasz Figa ret = readx_poll_timeout_atomic(vop_fs_irq_is_pending, vop, pending, 10037caecdbeSTomasz Figa !pending, 0, 10 * 1000); 10047caecdbeSTomasz Figa if (ret) 10057caecdbeSTomasz Figa DRM_DEV_ERROR(vop->dev, "VOP vblank IRQ stuck for 10 ms\n"); 10067caecdbeSTomasz Figa 10077caecdbeSTomasz Figa synchronize_irq(vop->irq); 10087caecdbeSTomasz Figa } 10097caecdbeSTomasz Figa 101063ebb9faSMark Yao static void vop_crtc_atomic_flush(struct drm_crtc *crtc, 101163ebb9faSMark Yao struct drm_crtc_state *old_crtc_state) 101263ebb9faSMark Yao { 101347a7eb45STomasz Figa struct drm_atomic_state *old_state = old_crtc_state->state; 1014e741f2b1SMaarten Lankhorst struct drm_plane_state *old_plane_state, *new_plane_state; 101563ebb9faSMark Yao struct vop *vop = to_vop(crtc); 101647a7eb45STomasz Figa struct drm_plane *plane; 101747a7eb45STomasz Figa int i; 101863ebb9faSMark Yao 101963ebb9faSMark Yao if (WARN_ON(!vop->is_enabled)) 102063ebb9faSMark Yao return; 102163ebb9faSMark Yao 102263ebb9faSMark Yao spin_lock(&vop->reg_lock); 102363ebb9faSMark Yao 102463ebb9faSMark Yao vop_cfg_done(vop); 102563ebb9faSMark Yao 102663ebb9faSMark Yao spin_unlock(&vop->reg_lock); 10277caecdbeSTomasz Figa 10287caecdbeSTomasz Figa /* 10297caecdbeSTomasz Figa * There is a (rather unlikely) possiblity that a vblank interrupt 10307caecdbeSTomasz Figa * fired before we set the cfg_done bit. To avoid spuriously 10317caecdbeSTomasz Figa * signalling flip completion we need to wait for it to finish. 10327caecdbeSTomasz Figa */ 10337caecdbeSTomasz Figa vop_wait_for_irq_handler(vop); 103447a7eb45STomasz Figa 103541ee4367STomasz Figa spin_lock_irq(&crtc->dev->event_lock); 103641ee4367STomasz Figa if (crtc->state->event) { 103741ee4367STomasz Figa WARN_ON(drm_crtc_vblank_get(crtc) != 0); 103841ee4367STomasz Figa WARN_ON(vop->event); 103941ee4367STomasz Figa 104041ee4367STomasz Figa vop->event = crtc->state->event; 104141ee4367STomasz Figa crtc->state->event = NULL; 104241ee4367STomasz Figa } 104341ee4367STomasz Figa spin_unlock_irq(&crtc->dev->event_lock); 104441ee4367STomasz Figa 1045e741f2b1SMaarten Lankhorst for_each_oldnew_plane_in_state(old_state, plane, old_plane_state, 1046e741f2b1SMaarten Lankhorst new_plane_state, i) { 104747a7eb45STomasz Figa if (!old_plane_state->fb) 104847a7eb45STomasz Figa continue; 104947a7eb45STomasz Figa 1050e741f2b1SMaarten Lankhorst if (old_plane_state->fb == new_plane_state->fb) 105147a7eb45STomasz Figa continue; 105247a7eb45STomasz Figa 1053adedbf03SCihangir Akturk drm_framebuffer_get(old_plane_state->fb); 10542d078c2dSJohn Keeping WARN_ON(drm_crtc_vblank_get(crtc) != 0); 105547a7eb45STomasz Figa drm_flip_work_queue(&vop->fb_unref_work, old_plane_state->fb); 105647a7eb45STomasz Figa set_bit(VOP_PENDING_FB_UNREF, &vop->pending); 105747a7eb45STomasz Figa } 105863ebb9faSMark Yao } 105963ebb9faSMark Yao 10602048e328SMark Yao static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = { 10612048e328SMark Yao .mode_fixup = vop_crtc_mode_fixup, 106263ebb9faSMark Yao .atomic_flush = vop_crtc_atomic_flush, 10630b20a0f8SLaurent Pinchart .atomic_enable = vop_crtc_atomic_enable, 106464581714SLaurent Pinchart .atomic_disable = vop_crtc_atomic_disable, 10652048e328SMark Yao }; 10662048e328SMark Yao 10672048e328SMark Yao static void vop_crtc_destroy(struct drm_crtc *crtc) 10682048e328SMark Yao { 10692048e328SMark Yao drm_crtc_cleanup(crtc); 10702048e328SMark Yao } 10712048e328SMark Yao 1072dc0b408fSJohn Keeping static void vop_crtc_reset(struct drm_crtc *crtc) 1073dc0b408fSJohn Keeping { 1074dc0b408fSJohn Keeping if (crtc->state) 1075dc0b408fSJohn Keeping __drm_atomic_helper_crtc_destroy_state(crtc->state); 1076dc0b408fSJohn Keeping kfree(crtc->state); 1077dc0b408fSJohn Keeping 1078dc0b408fSJohn Keeping crtc->state = kzalloc(sizeof(struct rockchip_crtc_state), GFP_KERNEL); 1079dc0b408fSJohn Keeping if (crtc->state) 1080dc0b408fSJohn Keeping crtc->state->crtc = crtc; 1081dc0b408fSJohn Keeping } 1082dc0b408fSJohn Keeping 10834e257d9eSMark Yao static struct drm_crtc_state *vop_crtc_duplicate_state(struct drm_crtc *crtc) 10844e257d9eSMark Yao { 10854e257d9eSMark Yao struct rockchip_crtc_state *rockchip_state; 10864e257d9eSMark Yao 10874e257d9eSMark Yao rockchip_state = kzalloc(sizeof(*rockchip_state), GFP_KERNEL); 10884e257d9eSMark Yao if (!rockchip_state) 10894e257d9eSMark Yao return NULL; 10904e257d9eSMark Yao 10914e257d9eSMark Yao __drm_atomic_helper_crtc_duplicate_state(crtc, &rockchip_state->base); 10924e257d9eSMark Yao return &rockchip_state->base; 10934e257d9eSMark Yao } 10944e257d9eSMark Yao 10954e257d9eSMark Yao static void vop_crtc_destroy_state(struct drm_crtc *crtc, 10964e257d9eSMark Yao struct drm_crtc_state *state) 10974e257d9eSMark Yao { 10984e257d9eSMark Yao struct rockchip_crtc_state *s = to_rockchip_crtc_state(state); 10994e257d9eSMark Yao 1100ec2dc6a0SDaniel Vetter __drm_atomic_helper_crtc_destroy_state(&s->base); 11014e257d9eSMark Yao kfree(s); 11024e257d9eSMark Yao } 11034e257d9eSMark Yao 11046cca3869SSean Paul #ifdef CONFIG_DRM_ANALOGIX_DP 11053190e58dSTomeu Vizoso static struct drm_connector *vop_get_edp_connector(struct vop *vop) 11063190e58dSTomeu Vizoso { 11073190e58dSTomeu Vizoso struct drm_connector *connector; 11082cbeb64fSGustavo Padovan struct drm_connector_list_iter conn_iter; 11093190e58dSTomeu Vizoso 11102cbeb64fSGustavo Padovan drm_connector_list_iter_begin(vop->drm_dev, &conn_iter); 11112cbeb64fSGustavo Padovan drm_for_each_connector_iter(connector, &conn_iter) { 11123190e58dSTomeu Vizoso if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { 11132cbeb64fSGustavo Padovan drm_connector_list_iter_end(&conn_iter); 11143190e58dSTomeu Vizoso return connector; 11153190e58dSTomeu Vizoso } 11162cbeb64fSGustavo Padovan } 11172cbeb64fSGustavo Padovan drm_connector_list_iter_end(&conn_iter); 11183190e58dSTomeu Vizoso 11193190e58dSTomeu Vizoso return NULL; 11203190e58dSTomeu Vizoso } 11213190e58dSTomeu Vizoso 11223190e58dSTomeu Vizoso static int vop_crtc_set_crc_source(struct drm_crtc *crtc, 1123c0811a7dSMahesh Kumar const char *source_name) 11243190e58dSTomeu Vizoso { 11253190e58dSTomeu Vizoso struct vop *vop = to_vop(crtc); 11263190e58dSTomeu Vizoso struct drm_connector *connector; 11273190e58dSTomeu Vizoso int ret; 11283190e58dSTomeu Vizoso 11293190e58dSTomeu Vizoso connector = vop_get_edp_connector(vop); 11303190e58dSTomeu Vizoso if (!connector) 11313190e58dSTomeu Vizoso return -EINVAL; 11323190e58dSTomeu Vizoso 11333190e58dSTomeu Vizoso if (source_name && strcmp(source_name, "auto") == 0) 11343190e58dSTomeu Vizoso ret = analogix_dp_start_crc(connector); 11353190e58dSTomeu Vizoso else if (!source_name) 11363190e58dSTomeu Vizoso ret = analogix_dp_stop_crc(connector); 11373190e58dSTomeu Vizoso else 11383190e58dSTomeu Vizoso ret = -EINVAL; 11393190e58dSTomeu Vizoso 11403190e58dSTomeu Vizoso return ret; 11413190e58dSTomeu Vizoso } 1142b8d913c0SMahesh Kumar 1143b8d913c0SMahesh Kumar static int 1144b8d913c0SMahesh Kumar vop_crtc_verify_crc_source(struct drm_crtc *crtc, const char *source_name, 1145b8d913c0SMahesh Kumar size_t *values_cnt) 1146b8d913c0SMahesh Kumar { 1147b8d913c0SMahesh Kumar if (source_name && strcmp(source_name, "auto") != 0) 1148b8d913c0SMahesh Kumar return -EINVAL; 1149b8d913c0SMahesh Kumar 1150b8d913c0SMahesh Kumar *values_cnt = 3; 1151b8d913c0SMahesh Kumar return 0; 1152b8d913c0SMahesh Kumar } 1153b8d913c0SMahesh Kumar 11546cca3869SSean Paul #else 11556cca3869SSean Paul static int vop_crtc_set_crc_source(struct drm_crtc *crtc, 1156c0811a7dSMahesh Kumar const char *source_name) 11576cca3869SSean Paul { 11586cca3869SSean Paul return -ENODEV; 11596cca3869SSean Paul } 1160b8d913c0SMahesh Kumar 1161b8d913c0SMahesh Kumar static int 1162b8d913c0SMahesh Kumar vop_crtc_verify_crc_source(struct drm_crtc *crtc, const char *source_name, 1163b8d913c0SMahesh Kumar size_t *values_cnt) 1164b8d913c0SMahesh Kumar { 1165b8d913c0SMahesh Kumar return -ENODEV; 1166b8d913c0SMahesh Kumar } 11676cca3869SSean Paul #endif 11683190e58dSTomeu Vizoso 11692048e328SMark Yao static const struct drm_crtc_funcs vop_crtc_funcs = { 117063ebb9faSMark Yao .set_config = drm_atomic_helper_set_config, 117163ebb9faSMark Yao .page_flip = drm_atomic_helper_page_flip, 11722048e328SMark Yao .destroy = vop_crtc_destroy, 1173dc0b408fSJohn Keeping .reset = vop_crtc_reset, 11744e257d9eSMark Yao .atomic_duplicate_state = vop_crtc_duplicate_state, 11754e257d9eSMark Yao .atomic_destroy_state = vop_crtc_destroy_state, 1176c3605dfcSShawn Guo .enable_vblank = vop_crtc_enable_vblank, 1177c3605dfcSShawn Guo .disable_vblank = vop_crtc_disable_vblank, 11783190e58dSTomeu Vizoso .set_crc_source = vop_crtc_set_crc_source, 1179b8d913c0SMahesh Kumar .verify_crc_source = vop_crtc_verify_crc_source, 11802048e328SMark Yao }; 11812048e328SMark Yao 118247a7eb45STomasz Figa static void vop_fb_unref_worker(struct drm_flip_work *work, void *val) 118347a7eb45STomasz Figa { 118447a7eb45STomasz Figa struct vop *vop = container_of(work, struct vop, fb_unref_work); 118547a7eb45STomasz Figa struct drm_framebuffer *fb = val; 118647a7eb45STomasz Figa 118747a7eb45STomasz Figa drm_crtc_vblank_put(&vop->crtc); 1188adedbf03SCihangir Akturk drm_framebuffer_put(fb); 118947a7eb45STomasz Figa } 119047a7eb45STomasz Figa 119163ebb9faSMark Yao static void vop_handle_vblank(struct vop *vop) 11922048e328SMark Yao { 119363ebb9faSMark Yao struct drm_device *drm = vop->drm_dev; 119463ebb9faSMark Yao struct drm_crtc *crtc = &vop->crtc; 11952048e328SMark Yao 11961c85f2faSMarc Zyngier spin_lock(&drm->event_lock); 1197893b6cadSDaniel Vetter if (vop->event) { 119863ebb9faSMark Yao drm_crtc_send_vblank_event(crtc, vop->event); 11995b680403SSean Paul drm_crtc_vblank_put(crtc); 1200646ec687STomasz Figa vop->event = NULL; 12015b680403SSean Paul } 12021c85f2faSMarc Zyngier spin_unlock(&drm->event_lock); 1203893b6cadSDaniel Vetter 120447a7eb45STomasz Figa if (test_and_clear_bit(VOP_PENDING_FB_UNREF, &vop->pending)) 120547a7eb45STomasz Figa drm_flip_work_commit(&vop->fb_unref_work, system_unbound_wq); 12062048e328SMark Yao } 12072048e328SMark Yao 12082048e328SMark Yao static irqreturn_t vop_isr(int irq, void *data) 12092048e328SMark Yao { 12102048e328SMark Yao struct vop *vop = data; 1211b5f7b755SMark Yao struct drm_crtc *crtc = &vop->crtc; 1212dbb3d944SMark Yao uint32_t active_irqs; 12131067219bSMark Yao int ret = IRQ_NONE; 12142048e328SMark Yao 12152048e328SMark Yao /* 12166456314fSSandy Huang * The irq is shared with the iommu. If the runtime-pm state of the 12176456314fSSandy Huang * vop-device is disabled the irq has to be targeted at the iommu. 12186456314fSSandy Huang */ 12196456314fSSandy Huang if (!pm_runtime_get_if_in_use(vop->dev)) 12206456314fSSandy Huang return IRQ_NONE; 12216456314fSSandy Huang 12226456314fSSandy Huang if (vop_core_clks_enable(vop)) { 12236456314fSSandy Huang DRM_DEV_ERROR_RATELIMITED(vop->dev, "couldn't enable clocks\n"); 12246456314fSSandy Huang goto out; 12256456314fSSandy Huang } 12266456314fSSandy Huang 12276456314fSSandy Huang /* 1228dbb3d944SMark Yao * interrupt register has interrupt status, enable and clear bits, we 12292048e328SMark Yao * must hold irq_lock to avoid a race with enable/disable_vblank(). 12302048e328SMark Yao */ 12311c85f2faSMarc Zyngier spin_lock(&vop->irq_lock); 1232dbb3d944SMark Yao 1233dbb3d944SMark Yao active_irqs = VOP_INTR_GET_TYPE(vop, status, INTR_MASK); 12342048e328SMark Yao /* Clear all active interrupt sources */ 12352048e328SMark Yao if (active_irqs) 1236dbb3d944SMark Yao VOP_INTR_SET_TYPE(vop, clear, active_irqs, 1); 1237dbb3d944SMark Yao 12381c85f2faSMarc Zyngier spin_unlock(&vop->irq_lock); 12392048e328SMark Yao 12402048e328SMark Yao /* This is expected for vop iommu irqs, since the irq is shared */ 12412048e328SMark Yao if (!active_irqs) 12426456314fSSandy Huang goto out_disable; 12432048e328SMark Yao 12441067219bSMark Yao if (active_irqs & DSP_HOLD_VALID_INTR) { 12451067219bSMark Yao complete(&vop->dsp_hold_completion); 12461067219bSMark Yao active_irqs &= ~DSP_HOLD_VALID_INTR; 12471067219bSMark Yao ret = IRQ_HANDLED; 12482048e328SMark Yao } 12492048e328SMark Yao 125069c34e41SYakir Yang if (active_irqs & LINE_FLAG_INTR) { 125169c34e41SYakir Yang complete(&vop->line_flag_completion); 125269c34e41SYakir Yang active_irqs &= ~LINE_FLAG_INTR; 125369c34e41SYakir Yang ret = IRQ_HANDLED; 125469c34e41SYakir Yang } 125569c34e41SYakir Yang 12561067219bSMark Yao if (active_irqs & FS_INTR) { 1257b5f7b755SMark Yao drm_crtc_handle_vblank(crtc); 125863ebb9faSMark Yao vop_handle_vblank(vop); 12591067219bSMark Yao active_irqs &= ~FS_INTR; 126063ebb9faSMark Yao ret = IRQ_HANDLED; 12611067219bSMark Yao } 12622048e328SMark Yao 12631067219bSMark Yao /* Unhandled irqs are spurious. */ 12641067219bSMark Yao if (active_irqs) 1265ee4d7899SSean Paul DRM_DEV_ERROR(vop->dev, "Unknown VOP IRQs: %#02x\n", 1266ee4d7899SSean Paul active_irqs); 12671067219bSMark Yao 12686456314fSSandy Huang out_disable: 12696456314fSSandy Huang vop_core_clks_disable(vop); 12706456314fSSandy Huang out: 12716456314fSSandy Huang pm_runtime_put(vop->dev); 12721067219bSMark Yao return ret; 12732048e328SMark Yao } 12742048e328SMark Yao 12752048e328SMark Yao static int vop_create_crtc(struct vop *vop) 12762048e328SMark Yao { 12772048e328SMark Yao const struct vop_data *vop_data = vop->data; 12782048e328SMark Yao struct device *dev = vop->dev; 12792048e328SMark Yao struct drm_device *drm_dev = vop->drm_dev; 1280328b51c0SDouglas Anderson struct drm_plane *primary = NULL, *cursor = NULL, *plane, *tmp; 12812048e328SMark Yao struct drm_crtc *crtc = &vop->crtc; 12822048e328SMark Yao struct device_node *port; 12832048e328SMark Yao int ret; 12842048e328SMark Yao int i; 12852048e328SMark Yao 12862048e328SMark Yao /* 12872048e328SMark Yao * Create drm_plane for primary and cursor planes first, since we need 12882048e328SMark Yao * to pass them to drm_crtc_init_with_planes, which sets the 12892048e328SMark Yao * "possible_crtcs" to the newly initialized crtc. 12902048e328SMark Yao */ 12912048e328SMark Yao for (i = 0; i < vop_data->win_size; i++) { 12922048e328SMark Yao struct vop_win *vop_win = &vop->win[i]; 12932048e328SMark Yao const struct vop_win_data *win_data = vop_win->data; 12942048e328SMark Yao 12952048e328SMark Yao if (win_data->type != DRM_PLANE_TYPE_PRIMARY && 12962048e328SMark Yao win_data->type != DRM_PLANE_TYPE_CURSOR) 12972048e328SMark Yao continue; 12982048e328SMark Yao 12992048e328SMark Yao ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base, 13002048e328SMark Yao 0, &vop_plane_funcs, 13012048e328SMark Yao win_data->phy->data_formats, 13022048e328SMark Yao win_data->phy->nformats, 1303e6fc3b68SBen Widawsky NULL, win_data->type, NULL); 13042048e328SMark Yao if (ret) { 1305ee4d7899SSean Paul DRM_DEV_ERROR(vop->dev, "failed to init plane %d\n", 1306ee4d7899SSean Paul ret); 13072048e328SMark Yao goto err_cleanup_planes; 13082048e328SMark Yao } 13092048e328SMark Yao 13102048e328SMark Yao plane = &vop_win->base; 131163ebb9faSMark Yao drm_plane_helper_add(plane, &plane_helper_funcs); 13122048e328SMark Yao if (plane->type == DRM_PLANE_TYPE_PRIMARY) 13132048e328SMark Yao primary = plane; 13142048e328SMark Yao else if (plane->type == DRM_PLANE_TYPE_CURSOR) 13152048e328SMark Yao cursor = plane; 13162048e328SMark Yao } 13172048e328SMark Yao 13182048e328SMark Yao ret = drm_crtc_init_with_planes(drm_dev, crtc, primary, cursor, 1319f9882876SVille Syrjälä &vop_crtc_funcs, NULL); 13202048e328SMark Yao if (ret) 1321328b51c0SDouglas Anderson goto err_cleanup_planes; 13222048e328SMark Yao 13232048e328SMark Yao drm_crtc_helper_add(crtc, &vop_crtc_helper_funcs); 13242048e328SMark Yao 13252048e328SMark Yao /* 13262048e328SMark Yao * Create drm_planes for overlay windows with possible_crtcs restricted 13272048e328SMark Yao * to the newly created crtc. 13282048e328SMark Yao */ 13292048e328SMark Yao for (i = 0; i < vop_data->win_size; i++) { 13302048e328SMark Yao struct vop_win *vop_win = &vop->win[i]; 13312048e328SMark Yao const struct vop_win_data *win_data = vop_win->data; 1332a3e77e16SVille Syrjälä unsigned long possible_crtcs = drm_crtc_mask(crtc); 13332048e328SMark Yao 13342048e328SMark Yao if (win_data->type != DRM_PLANE_TYPE_OVERLAY) 13352048e328SMark Yao continue; 13362048e328SMark Yao 13372048e328SMark Yao ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base, 13382048e328SMark Yao possible_crtcs, 13392048e328SMark Yao &vop_plane_funcs, 13402048e328SMark Yao win_data->phy->data_formats, 13412048e328SMark Yao win_data->phy->nformats, 1342e6fc3b68SBen Widawsky NULL, win_data->type, NULL); 13432048e328SMark Yao if (ret) { 1344ee4d7899SSean Paul DRM_DEV_ERROR(vop->dev, "failed to init overlay %d\n", 1345ee4d7899SSean Paul ret); 13462048e328SMark Yao goto err_cleanup_crtc; 13472048e328SMark Yao } 134863ebb9faSMark Yao drm_plane_helper_add(&vop_win->base, &plane_helper_funcs); 13492048e328SMark Yao } 13502048e328SMark Yao 13512048e328SMark Yao port = of_get_child_by_name(dev->of_node, "port"); 13522048e328SMark Yao if (!port) { 13534bf99144SRob Herring DRM_DEV_ERROR(vop->dev, "no port node found in %pOF\n", 13544bf99144SRob Herring dev->of_node); 1355328b51c0SDouglas Anderson ret = -ENOENT; 13562048e328SMark Yao goto err_cleanup_crtc; 13572048e328SMark Yao } 13582048e328SMark Yao 135947a7eb45STomasz Figa drm_flip_work_init(&vop->fb_unref_work, "fb_unref", 136047a7eb45STomasz Figa vop_fb_unref_worker); 136147a7eb45STomasz Figa 13621067219bSMark Yao init_completion(&vop->dsp_hold_completion); 136369c34e41SYakir Yang init_completion(&vop->line_flag_completion); 13642048e328SMark Yao crtc->port = port; 13652048e328SMark Yao 13662048e328SMark Yao return 0; 13672048e328SMark Yao 13682048e328SMark Yao err_cleanup_crtc: 13692048e328SMark Yao drm_crtc_cleanup(crtc); 13702048e328SMark Yao err_cleanup_planes: 1371328b51c0SDouglas Anderson list_for_each_entry_safe(plane, tmp, &drm_dev->mode_config.plane_list, 1372328b51c0SDouglas Anderson head) 13732048e328SMark Yao drm_plane_cleanup(plane); 13742048e328SMark Yao return ret; 13752048e328SMark Yao } 13762048e328SMark Yao 13772048e328SMark Yao static void vop_destroy_crtc(struct vop *vop) 13782048e328SMark Yao { 13792048e328SMark Yao struct drm_crtc *crtc = &vop->crtc; 1380328b51c0SDouglas Anderson struct drm_device *drm_dev = vop->drm_dev; 1381328b51c0SDouglas Anderson struct drm_plane *plane, *tmp; 13822048e328SMark Yao 13832048e328SMark Yao of_node_put(crtc->port); 1384328b51c0SDouglas Anderson 1385328b51c0SDouglas Anderson /* 1386328b51c0SDouglas Anderson * We need to cleanup the planes now. Why? 1387328b51c0SDouglas Anderson * 1388328b51c0SDouglas Anderson * The planes are "&vop->win[i].base". That means the memory is 1389328b51c0SDouglas Anderson * all part of the big "struct vop" chunk of memory. That memory 1390328b51c0SDouglas Anderson * was devm allocated and associated with this component. We need to 1391328b51c0SDouglas Anderson * free it ourselves before vop_unbind() finishes. 1392328b51c0SDouglas Anderson */ 1393328b51c0SDouglas Anderson list_for_each_entry_safe(plane, tmp, &drm_dev->mode_config.plane_list, 1394328b51c0SDouglas Anderson head) 1395328b51c0SDouglas Anderson vop_plane_destroy(plane); 1396328b51c0SDouglas Anderson 1397328b51c0SDouglas Anderson /* 1398328b51c0SDouglas Anderson * Destroy CRTC after vop_plane_destroy() since vop_disable_plane() 1399328b51c0SDouglas Anderson * references the CRTC. 1400328b51c0SDouglas Anderson */ 14012048e328SMark Yao drm_crtc_cleanup(crtc); 140247a7eb45STomasz Figa drm_flip_work_cleanup(&vop->fb_unref_work); 14032048e328SMark Yao } 14042048e328SMark Yao 14052048e328SMark Yao static int vop_initial(struct vop *vop) 14062048e328SMark Yao { 14072048e328SMark Yao const struct vop_data *vop_data = vop->data; 14082048e328SMark Yao struct reset_control *ahb_rst; 14092048e328SMark Yao int i, ret; 14102048e328SMark Yao 14112048e328SMark Yao vop->hclk = devm_clk_get(vop->dev, "hclk_vop"); 14122048e328SMark Yao if (IS_ERR(vop->hclk)) { 1413d8dd6804SHaneen Mohammed DRM_DEV_ERROR(vop->dev, "failed to get hclk source\n"); 14142048e328SMark Yao return PTR_ERR(vop->hclk); 14152048e328SMark Yao } 14162048e328SMark Yao vop->aclk = devm_clk_get(vop->dev, "aclk_vop"); 14172048e328SMark Yao if (IS_ERR(vop->aclk)) { 1418d8dd6804SHaneen Mohammed DRM_DEV_ERROR(vop->dev, "failed to get aclk source\n"); 14192048e328SMark Yao return PTR_ERR(vop->aclk); 14202048e328SMark Yao } 14212048e328SMark Yao vop->dclk = devm_clk_get(vop->dev, "dclk_vop"); 14222048e328SMark Yao if (IS_ERR(vop->dclk)) { 1423d8dd6804SHaneen Mohammed DRM_DEV_ERROR(vop->dev, "failed to get dclk source\n"); 14242048e328SMark Yao return PTR_ERR(vop->dclk); 14252048e328SMark Yao } 14262048e328SMark Yao 14275e570373SJeffy Chen ret = pm_runtime_get_sync(vop->dev); 14285e570373SJeffy Chen if (ret < 0) { 1429d8dd6804SHaneen Mohammed DRM_DEV_ERROR(vop->dev, "failed to get pm runtime: %d\n", ret); 14305e570373SJeffy Chen return ret; 14315e570373SJeffy Chen } 14325e570373SJeffy Chen 14332048e328SMark Yao ret = clk_prepare(vop->dclk); 14342048e328SMark Yao if (ret < 0) { 1435d8dd6804SHaneen Mohammed DRM_DEV_ERROR(vop->dev, "failed to prepare dclk\n"); 14365e570373SJeffy Chen goto err_put_pm_runtime; 14372048e328SMark Yao } 14382048e328SMark Yao 1439d7b53fd9SSjoerd Simons /* Enable both the hclk and aclk to setup the vop */ 1440d7b53fd9SSjoerd Simons ret = clk_prepare_enable(vop->hclk); 14412048e328SMark Yao if (ret < 0) { 1442d8dd6804SHaneen Mohammed DRM_DEV_ERROR(vop->dev, "failed to prepare/enable hclk\n"); 14432048e328SMark Yao goto err_unprepare_dclk; 14442048e328SMark Yao } 14452048e328SMark Yao 1446d7b53fd9SSjoerd Simons ret = clk_prepare_enable(vop->aclk); 14472048e328SMark Yao if (ret < 0) { 1448d8dd6804SHaneen Mohammed DRM_DEV_ERROR(vop->dev, "failed to prepare/enable aclk\n"); 1449d7b53fd9SSjoerd Simons goto err_disable_hclk; 14502048e328SMark Yao } 1451d7b53fd9SSjoerd Simons 14522048e328SMark Yao /* 14532048e328SMark Yao * do hclk_reset, reset all vop registers. 14542048e328SMark Yao */ 14552048e328SMark Yao ahb_rst = devm_reset_control_get(vop->dev, "ahb"); 14562048e328SMark Yao if (IS_ERR(ahb_rst)) { 1457d8dd6804SHaneen Mohammed DRM_DEV_ERROR(vop->dev, "failed to get ahb reset\n"); 14582048e328SMark Yao ret = PTR_ERR(ahb_rst); 1459d7b53fd9SSjoerd Simons goto err_disable_aclk; 14602048e328SMark Yao } 14612048e328SMark Yao reset_control_assert(ahb_rst); 14622048e328SMark Yao usleep_range(10, 20); 14632048e328SMark Yao reset_control_deassert(ahb_rst); 14642048e328SMark Yao 14655f9e93feSMarc Zyngier VOP_INTR_SET_TYPE(vop, clear, INTR_MASK, 1); 14665f9e93feSMarc Zyngier VOP_INTR_SET_TYPE(vop, enable, INTR_MASK, 0); 14675f9e93feSMarc Zyngier 146876f1416eSMarc Zyngier for (i = 0; i < vop->len; i += sizeof(u32)) 146976f1416eSMarc Zyngier vop->regsbak[i / 4] = readl_relaxed(vop->regs + i); 14702048e328SMark Yao 14719a61c54bSMark yao VOP_REG_SET(vop, misc, global_regdone_en, 1); 14729a61c54bSMark yao VOP_REG_SET(vop, common, dsp_blank, 0); 14732048e328SMark Yao 14742048e328SMark Yao for (i = 0; i < vop_data->win_size; i++) { 14752048e328SMark Yao const struct vop_win_data *win = &vop_data->win[i]; 14769dd2aca4SMark yao int channel = i * 2 + 1; 14772048e328SMark Yao 14789dd2aca4SMark yao VOP_WIN_SET(vop, win, channel, (channel + 1) << 4 | channel); 14792048e328SMark Yao VOP_WIN_SET(vop, win, enable, 0); 148060b7ae7fSMark yao VOP_WIN_SET(vop, win, gate, 1); 14812048e328SMark Yao } 14822048e328SMark Yao 14832048e328SMark Yao vop_cfg_done(vop); 14842048e328SMark Yao 14852048e328SMark Yao /* 14862048e328SMark Yao * do dclk_reset, let all config take affect. 14872048e328SMark Yao */ 14882048e328SMark Yao vop->dclk_rst = devm_reset_control_get(vop->dev, "dclk"); 14892048e328SMark Yao if (IS_ERR(vop->dclk_rst)) { 1490d8dd6804SHaneen Mohammed DRM_DEV_ERROR(vop->dev, "failed to get dclk reset\n"); 14912048e328SMark Yao ret = PTR_ERR(vop->dclk_rst); 1492d7b53fd9SSjoerd Simons goto err_disable_aclk; 14932048e328SMark Yao } 14942048e328SMark Yao reset_control_assert(vop->dclk_rst); 14952048e328SMark Yao usleep_range(10, 20); 14962048e328SMark Yao reset_control_deassert(vop->dclk_rst); 14972048e328SMark Yao 14982048e328SMark Yao clk_disable(vop->hclk); 1499d7b53fd9SSjoerd Simons clk_disable(vop->aclk); 15002048e328SMark Yao 150131e980c5SMark Yao vop->is_enabled = false; 15022048e328SMark Yao 15035e570373SJeffy Chen pm_runtime_put_sync(vop->dev); 15045e570373SJeffy Chen 15052048e328SMark Yao return 0; 15062048e328SMark Yao 1507d7b53fd9SSjoerd Simons err_disable_aclk: 1508d7b53fd9SSjoerd Simons clk_disable_unprepare(vop->aclk); 15092048e328SMark Yao err_disable_hclk: 1510d7b53fd9SSjoerd Simons clk_disable_unprepare(vop->hclk); 15112048e328SMark Yao err_unprepare_dclk: 15122048e328SMark Yao clk_unprepare(vop->dclk); 15135e570373SJeffy Chen err_put_pm_runtime: 15145e570373SJeffy Chen pm_runtime_put_sync(vop->dev); 15152048e328SMark Yao return ret; 15162048e328SMark Yao } 15172048e328SMark Yao 15182048e328SMark Yao /* 15192048e328SMark Yao * Initialize the vop->win array elements. 15202048e328SMark Yao */ 15212048e328SMark Yao static void vop_win_init(struct vop *vop) 15222048e328SMark Yao { 15232048e328SMark Yao const struct vop_data *vop_data = vop->data; 15242048e328SMark Yao unsigned int i; 15252048e328SMark Yao 15262048e328SMark Yao for (i = 0; i < vop_data->win_size; i++) { 15272048e328SMark Yao struct vop_win *vop_win = &vop->win[i]; 15282048e328SMark Yao const struct vop_win_data *win_data = &vop_data->win[i]; 15292048e328SMark Yao 15302048e328SMark Yao vop_win->data = win_data; 15312048e328SMark Yao vop_win->vop = vop; 15322048e328SMark Yao } 15332048e328SMark Yao } 15342048e328SMark Yao 153569c34e41SYakir Yang /** 1536459b086dSJeffy Chen * rockchip_drm_wait_vact_end 153769c34e41SYakir Yang * @crtc: CRTC to enable line flag 153869c34e41SYakir Yang * @mstimeout: millisecond for timeout 153969c34e41SYakir Yang * 1540459b086dSJeffy Chen * Wait for vact_end line flag irq or timeout. 154169c34e41SYakir Yang * 154269c34e41SYakir Yang * Returns: 154369c34e41SYakir Yang * Zero on success, negative errno on failure. 154469c34e41SYakir Yang */ 1545459b086dSJeffy Chen int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout) 154669c34e41SYakir Yang { 154769c34e41SYakir Yang struct vop *vop = to_vop(crtc); 154869c34e41SYakir Yang unsigned long jiffies_left; 1549e334d48bSzain wang int ret = 0; 155069c34e41SYakir Yang 155169c34e41SYakir Yang if (!crtc || !vop->is_enabled) 155269c34e41SYakir Yang return -ENODEV; 155369c34e41SYakir Yang 1554e334d48bSzain wang mutex_lock(&vop->vop_lock); 1555e334d48bSzain wang if (mstimeout <= 0) { 1556e334d48bSzain wang ret = -EINVAL; 1557e334d48bSzain wang goto out; 1558e334d48bSzain wang } 155969c34e41SYakir Yang 1560e334d48bSzain wang if (vop_line_flag_irq_is_enabled(vop)) { 1561e334d48bSzain wang ret = -EBUSY; 1562e334d48bSzain wang goto out; 1563e334d48bSzain wang } 156469c34e41SYakir Yang 156569c34e41SYakir Yang reinit_completion(&vop->line_flag_completion); 1566459b086dSJeffy Chen vop_line_flag_irq_enable(vop); 156769c34e41SYakir Yang 156869c34e41SYakir Yang jiffies_left = wait_for_completion_timeout(&vop->line_flag_completion, 156969c34e41SYakir Yang msecs_to_jiffies(mstimeout)); 157069c34e41SYakir Yang vop_line_flag_irq_disable(vop); 157169c34e41SYakir Yang 157269c34e41SYakir Yang if (jiffies_left == 0) { 1573d8dd6804SHaneen Mohammed DRM_DEV_ERROR(vop->dev, "Timeout waiting for IRQ\n"); 1574e334d48bSzain wang ret = -ETIMEDOUT; 1575e334d48bSzain wang goto out; 157669c34e41SYakir Yang } 157769c34e41SYakir Yang 1578e334d48bSzain wang out: 1579e334d48bSzain wang mutex_unlock(&vop->vop_lock); 1580e334d48bSzain wang return ret; 158169c34e41SYakir Yang } 1582459b086dSJeffy Chen EXPORT_SYMBOL(rockchip_drm_wait_vact_end); 158369c34e41SYakir Yang 15842048e328SMark Yao static int vop_bind(struct device *dev, struct device *master, void *data) 15852048e328SMark Yao { 15862048e328SMark Yao struct platform_device *pdev = to_platform_device(dev); 15872048e328SMark Yao const struct vop_data *vop_data; 15882048e328SMark Yao struct drm_device *drm_dev = data; 15892048e328SMark Yao struct vop *vop; 15902048e328SMark Yao struct resource *res; 15913ea68922SHeiko Stuebner int ret, irq; 15922048e328SMark Yao 1593a67719d1SMark Yao vop_data = of_device_get_match_data(dev); 15942048e328SMark Yao if (!vop_data) 15952048e328SMark Yao return -ENODEV; 15962048e328SMark Yao 15972048e328SMark Yao /* Allocate vop struct and its vop_win array */ 159829adeb4fSGustavo A. R. Silva vop = devm_kzalloc(dev, struct_size(vop, win, vop_data->win_size), 159929adeb4fSGustavo A. R. Silva GFP_KERNEL); 16002048e328SMark Yao if (!vop) 16012048e328SMark Yao return -ENOMEM; 16022048e328SMark Yao 16032048e328SMark Yao vop->dev = dev; 16042048e328SMark Yao vop->data = vop_data; 16052048e328SMark Yao vop->drm_dev = drm_dev; 16062048e328SMark Yao dev_set_drvdata(dev, vop); 16072048e328SMark Yao 16082048e328SMark Yao vop_win_init(vop); 16092048e328SMark Yao 16102048e328SMark Yao res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 16112048e328SMark Yao vop->len = resource_size(res); 16122048e328SMark Yao vop->regs = devm_ioremap_resource(dev, res); 16132048e328SMark Yao if (IS_ERR(vop->regs)) 16142048e328SMark Yao return PTR_ERR(vop->regs); 16152048e328SMark Yao 16162048e328SMark Yao vop->regsbak = devm_kzalloc(dev, vop->len, GFP_KERNEL); 16172048e328SMark Yao if (!vop->regsbak) 16182048e328SMark Yao return -ENOMEM; 16192048e328SMark Yao 16203ea68922SHeiko Stuebner irq = platform_get_irq(pdev, 0); 16213ea68922SHeiko Stuebner if (irq < 0) { 1622d8dd6804SHaneen Mohammed DRM_DEV_ERROR(dev, "cannot find irq for vop\n"); 16233ea68922SHeiko Stuebner return irq; 16242048e328SMark Yao } 16253ea68922SHeiko Stuebner vop->irq = (unsigned int)irq; 16262048e328SMark Yao 16272048e328SMark Yao spin_lock_init(&vop->reg_lock); 16282048e328SMark Yao spin_lock_init(&vop->irq_lock); 1629e334d48bSzain wang mutex_init(&vop->vop_lock); 16302048e328SMark Yao 16312048e328SMark Yao ret = vop_create_crtc(vop); 16322048e328SMark Yao if (ret) 16335f9e93feSMarc Zyngier return ret; 16342048e328SMark Yao 16352048e328SMark Yao pm_runtime_enable(&pdev->dev); 16365182c1a5SYakir Yang 16375e570373SJeffy Chen ret = vop_initial(vop); 16385e570373SJeffy Chen if (ret < 0) { 1639d8dd6804SHaneen Mohammed DRM_DEV_ERROR(&pdev->dev, 1640d8dd6804SHaneen Mohammed "cannot initial vop dev - err %d\n", ret); 16415e570373SJeffy Chen goto err_disable_pm_runtime; 16425e570373SJeffy Chen } 16435e570373SJeffy Chen 16445f9e93feSMarc Zyngier ret = devm_request_irq(dev, vop->irq, vop_isr, 16455f9e93feSMarc Zyngier IRQF_SHARED, dev_name(dev), vop); 16465f9e93feSMarc Zyngier if (ret) 16475f9e93feSMarc Zyngier goto err_disable_pm_runtime; 16485f9e93feSMarc Zyngier 16491f0f0151SSandy Huang if (vop->data->feature & VOP_FEATURE_INTERNAL_RGB) { 16501f0f0151SSandy Huang vop->rgb = rockchip_rgb_init(dev, &vop->crtc, vop->drm_dev); 16511f0f0151SSandy Huang if (IS_ERR(vop->rgb)) { 16521f0f0151SSandy Huang ret = PTR_ERR(vop->rgb); 16531f0f0151SSandy Huang goto err_disable_pm_runtime; 16541f0f0151SSandy Huang } 16551f0f0151SSandy Huang } 16561f0f0151SSandy Huang 16572048e328SMark Yao return 0; 16588c763c9bSSean Paul 16595e570373SJeffy Chen err_disable_pm_runtime: 16605e570373SJeffy Chen pm_runtime_disable(&pdev->dev); 16615e570373SJeffy Chen vop_destroy_crtc(vop); 16628c763c9bSSean Paul return ret; 16632048e328SMark Yao } 16642048e328SMark Yao 16652048e328SMark Yao static void vop_unbind(struct device *dev, struct device *master, void *data) 16662048e328SMark Yao { 16672048e328SMark Yao struct vop *vop = dev_get_drvdata(dev); 16682048e328SMark Yao 16691f0f0151SSandy Huang if (vop->rgb) 16701f0f0151SSandy Huang rockchip_rgb_fini(vop->rgb); 16711f0f0151SSandy Huang 16722048e328SMark Yao pm_runtime_disable(dev); 16732048e328SMark Yao vop_destroy_crtc(vop); 1674ec6e7767SJeffy Chen 1675ec6e7767SJeffy Chen clk_unprepare(vop->aclk); 1676ec6e7767SJeffy Chen clk_unprepare(vop->hclk); 1677ec6e7767SJeffy Chen clk_unprepare(vop->dclk); 16782048e328SMark Yao } 16792048e328SMark Yao 1680a67719d1SMark Yao const struct component_ops vop_component_ops = { 16812048e328SMark Yao .bind = vop_bind, 16822048e328SMark Yao .unbind = vop_unbind, 16832048e328SMark Yao }; 168454255e81SStephen Rothwell EXPORT_SYMBOL_GPL(vop_component_ops); 1685