1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * R-Car Display Unit VSP-Based Compositor 4 * 5 * Copyright (C) 2015 Renesas Electronics Corporation 6 * 7 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) 8 */ 9 10 #include <drm/drm_atomic.h> 11 #include <drm/drm_atomic_helper.h> 12 #include <drm/drm_blend.h> 13 #include <drm/drm_crtc.h> 14 #include <drm/drm_fb_dma_helper.h> 15 #include <drm/drm_fourcc.h> 16 #include <drm/drm_framebuffer.h> 17 #include <drm/drm_gem_atomic_helper.h> 18 #include <drm/drm_gem_dma_helper.h> 19 #include <drm/drm_managed.h> 20 #include <drm/drm_vblank.h> 21 22 #include <linux/bitops.h> 23 #include <linux/dma-mapping.h> 24 #include <linux/of_platform.h> 25 #include <linux/platform_device.h> 26 #include <linux/scatterlist.h> 27 #include <linux/slab.h> 28 #include <linux/videodev2.h> 29 30 #include <media/vsp1.h> 31 32 #include "rcar_du_drv.h" 33 #include "rcar_du_kms.h" 34 #include "rcar_du_vsp.h" 35 #include "rcar_du_writeback.h" 36 37 static void rcar_du_vsp_complete(void *private, unsigned int status, u32 crc) 38 { 39 struct rcar_du_crtc *crtc = private; 40 41 if (crtc->vblank_enable) 42 drm_crtc_handle_vblank(&crtc->crtc); 43 44 if (status & VSP1_DU_STATUS_COMPLETE) 45 rcar_du_crtc_finish_page_flip(crtc); 46 if (status & VSP1_DU_STATUS_WRITEBACK) 47 rcar_du_writeback_complete(crtc); 48 49 drm_crtc_add_crc_entry(&crtc->crtc, false, 0, &crc); 50 } 51 52 void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) 53 { 54 const struct drm_display_mode *mode = &crtc->crtc.state->adjusted_mode; 55 struct rcar_du_device *rcdu = crtc->dev; 56 struct vsp1_du_lif_config cfg = { 57 .width = mode->hdisplay, 58 .height = mode->vdisplay, 59 .interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE, 60 .callback = rcar_du_vsp_complete, 61 .callback_data = crtc, 62 }; 63 struct rcar_du_plane_state state = { 64 .state = { 65 .alpha = DRM_BLEND_ALPHA_OPAQUE, 66 .crtc = &crtc->crtc, 67 .dst.x1 = 0, 68 .dst.y1 = 0, 69 .dst.x2 = mode->hdisplay, 70 .dst.y2 = mode->vdisplay, 71 .src.x1 = 0, 72 .src.y1 = 0, 73 .src.x2 = mode->hdisplay << 16, 74 .src.y2 = mode->vdisplay << 16, 75 .zpos = 0, 76 }, 77 .format = rcar_du_format_info(DRM_FORMAT_XRGB8888), 78 .source = RCAR_DU_PLANE_VSPD1, 79 .colorkey = 0, 80 }; 81 82 if (rcdu->info->gen >= 3) 83 state.hwindex = (crtc->index % 2) ? 2 : 0; 84 else 85 state.hwindex = crtc->index % 2; 86 87 __rcar_du_plane_setup(crtc->group, &state); 88 89 vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg); 90 } 91 92 void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) 93 { 94 vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, NULL); 95 } 96 97 void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) 98 { 99 vsp1_du_atomic_begin(crtc->vsp->vsp, crtc->vsp_pipe); 100 } 101 102 void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc) 103 { 104 struct vsp1_du_atomic_pipe_config cfg = { { 0, } }; 105 struct rcar_du_crtc_state *state; 106 107 state = to_rcar_crtc_state(crtc->crtc.state); 108 cfg.crc = state->crc; 109 110 rcar_du_writeback_setup(crtc, &cfg.writeback); 111 112 vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg); 113 } 114 115 static const u32 rcar_du_vsp_formats[] = { 116 DRM_FORMAT_RGB332, 117 DRM_FORMAT_ARGB4444, 118 DRM_FORMAT_XRGB4444, 119 DRM_FORMAT_ARGB1555, 120 DRM_FORMAT_XRGB1555, 121 DRM_FORMAT_RGB565, 122 DRM_FORMAT_BGR888, 123 DRM_FORMAT_RGB888, 124 DRM_FORMAT_BGRA8888, 125 DRM_FORMAT_BGRX8888, 126 DRM_FORMAT_ARGB8888, 127 DRM_FORMAT_XRGB8888, 128 DRM_FORMAT_UYVY, 129 DRM_FORMAT_YUYV, 130 DRM_FORMAT_YVYU, 131 DRM_FORMAT_NV12, 132 DRM_FORMAT_NV21, 133 DRM_FORMAT_NV16, 134 DRM_FORMAT_NV61, 135 DRM_FORMAT_YUV420, 136 DRM_FORMAT_YVU420, 137 DRM_FORMAT_YUV422, 138 DRM_FORMAT_YVU422, 139 DRM_FORMAT_YUV444, 140 DRM_FORMAT_YVU444, 141 }; 142 143 /* 144 * Gen4 supports the same formats as above, and additionally 2-10-10-10 RGB 145 * formats and Y210 & Y212 formats. 146 */ 147 static const u32 rcar_du_vsp_formats_gen4[] = { 148 DRM_FORMAT_RGB332, 149 DRM_FORMAT_ARGB4444, 150 DRM_FORMAT_XRGB4444, 151 DRM_FORMAT_ARGB1555, 152 DRM_FORMAT_XRGB1555, 153 DRM_FORMAT_RGB565, 154 DRM_FORMAT_BGR888, 155 DRM_FORMAT_RGB888, 156 DRM_FORMAT_BGRA8888, 157 DRM_FORMAT_BGRX8888, 158 DRM_FORMAT_ARGB8888, 159 DRM_FORMAT_XRGB8888, 160 DRM_FORMAT_RGBX1010102, 161 DRM_FORMAT_RGBA1010102, 162 DRM_FORMAT_ARGB2101010, 163 DRM_FORMAT_UYVY, 164 DRM_FORMAT_YUYV, 165 DRM_FORMAT_YVYU, 166 DRM_FORMAT_NV12, 167 DRM_FORMAT_NV21, 168 DRM_FORMAT_NV16, 169 DRM_FORMAT_NV61, 170 DRM_FORMAT_YUV420, 171 DRM_FORMAT_YVU420, 172 DRM_FORMAT_YUV422, 173 DRM_FORMAT_YVU422, 174 DRM_FORMAT_YUV444, 175 DRM_FORMAT_YVU444, 176 DRM_FORMAT_Y210, 177 DRM_FORMAT_Y212, 178 }; 179 180 static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane) 181 { 182 struct rcar_du_vsp_plane_state *state = 183 to_rcar_vsp_plane_state(plane->plane.state); 184 struct rcar_du_crtc *crtc = to_rcar_crtc(state->state.crtc); 185 struct drm_framebuffer *fb = plane->plane.state->fb; 186 const struct rcar_du_format_info *format; 187 struct vsp1_du_atomic_config cfg = { 188 .pixelformat = 0, 189 .pitch = fb->pitches[0], 190 .alpha = state->state.alpha >> 8, 191 .zpos = state->state.zpos, 192 }; 193 u32 fourcc = state->format->fourcc; 194 unsigned int i; 195 196 cfg.src.left = state->state.src.x1 >> 16; 197 cfg.src.top = state->state.src.y1 >> 16; 198 cfg.src.width = drm_rect_width(&state->state.src) >> 16; 199 cfg.src.height = drm_rect_height(&state->state.src) >> 16; 200 201 cfg.dst.left = state->state.dst.x1; 202 cfg.dst.top = state->state.dst.y1; 203 cfg.dst.width = drm_rect_width(&state->state.dst); 204 cfg.dst.height = drm_rect_height(&state->state.dst); 205 206 for (i = 0; i < state->format->planes; ++i) 207 cfg.mem[i] = sg_dma_address(state->sg_tables[i].sgl) 208 + fb->offsets[i]; 209 210 if (state->state.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) { 211 switch (fourcc) { 212 case DRM_FORMAT_ARGB1555: 213 fourcc = DRM_FORMAT_XRGB1555; 214 break; 215 216 case DRM_FORMAT_ARGB4444: 217 fourcc = DRM_FORMAT_XRGB4444; 218 break; 219 220 case DRM_FORMAT_ARGB8888: 221 fourcc = DRM_FORMAT_XRGB8888; 222 break; 223 } 224 } 225 226 format = rcar_du_format_info(fourcc); 227 cfg.pixelformat = format->v4l2; 228 229 cfg.premult = state->state.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI; 230 231 vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe, 232 plane->index, &cfg); 233 } 234 235 int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb, 236 struct sg_table sg_tables[3]) 237 { 238 struct rcar_du_device *rcdu = vsp->dev; 239 unsigned int i, j; 240 int ret; 241 242 for (i = 0; i < fb->format->num_planes; ++i) { 243 struct drm_gem_dma_object *gem = drm_fb_dma_get_gem_obj(fb, i); 244 struct sg_table *sgt = &sg_tables[i]; 245 246 if (gem->sgt) { 247 struct scatterlist *src; 248 struct scatterlist *dst; 249 250 /* 251 * If the GEM buffer has a scatter gather table, it has 252 * been imported from a dma-buf and has no physical 253 * address as it might not be physically contiguous. 254 * Copy the original scatter gather table to map it to 255 * the VSP. 256 */ 257 ret = sg_alloc_table(sgt, gem->sgt->orig_nents, 258 GFP_KERNEL); 259 if (ret) 260 goto fail; 261 262 src = gem->sgt->sgl; 263 dst = sgt->sgl; 264 for (j = 0; j < gem->sgt->orig_nents; ++j) { 265 sg_set_page(dst, sg_page(src), src->length, 266 src->offset); 267 src = sg_next(src); 268 dst = sg_next(dst); 269 } 270 } else { 271 ret = dma_get_sgtable(rcdu->dev, sgt, gem->vaddr, 272 gem->dma_addr, gem->base.size); 273 if (ret) 274 goto fail; 275 } 276 277 ret = vsp1_du_map_sg(vsp->vsp, sgt); 278 if (ret) { 279 sg_free_table(sgt); 280 goto fail; 281 } 282 } 283 284 return 0; 285 286 fail: 287 while (i--) { 288 struct sg_table *sgt = &sg_tables[i]; 289 290 vsp1_du_unmap_sg(vsp->vsp, sgt); 291 sg_free_table(sgt); 292 } 293 294 return ret; 295 } 296 297 static int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane, 298 struct drm_plane_state *state) 299 { 300 struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state); 301 struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp; 302 int ret; 303 304 /* 305 * There's no need to prepare (and unprepare) the framebuffer when the 306 * plane is not visible, as it will not be displayed. 307 */ 308 if (!state->visible) 309 return 0; 310 311 ret = rcar_du_vsp_map_fb(vsp, state->fb, rstate->sg_tables); 312 if (ret < 0) 313 return ret; 314 315 return drm_gem_plane_helper_prepare_fb(plane, state); 316 } 317 318 void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb, 319 struct sg_table sg_tables[3]) 320 { 321 unsigned int i; 322 323 for (i = 0; i < fb->format->num_planes; ++i) { 324 struct sg_table *sgt = &sg_tables[i]; 325 326 vsp1_du_unmap_sg(vsp->vsp, sgt); 327 sg_free_table(sgt); 328 } 329 } 330 331 static void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane, 332 struct drm_plane_state *state) 333 { 334 struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state); 335 struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp; 336 337 if (!state->visible) 338 return; 339 340 rcar_du_vsp_unmap_fb(vsp, state->fb, rstate->sg_tables); 341 } 342 343 static int rcar_du_vsp_plane_atomic_check(struct drm_plane *plane, 344 struct drm_atomic_state *state) 345 { 346 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, 347 plane); 348 struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(new_plane_state); 349 350 return __rcar_du_plane_atomic_check(plane, new_plane_state, 351 &rstate->format); 352 } 353 354 static void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane, 355 struct drm_atomic_state *state) 356 { 357 struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane); 358 struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane); 359 struct rcar_du_vsp_plane *rplane = to_rcar_vsp_plane(plane); 360 struct rcar_du_crtc *crtc = to_rcar_crtc(old_state->crtc); 361 362 if (new_state->visible) 363 rcar_du_vsp_plane_setup(rplane); 364 else if (old_state->crtc) 365 vsp1_du_atomic_update(rplane->vsp->vsp, crtc->vsp_pipe, 366 rplane->index, NULL); 367 } 368 369 static const struct drm_plane_helper_funcs rcar_du_vsp_plane_helper_funcs = { 370 .prepare_fb = rcar_du_vsp_plane_prepare_fb, 371 .cleanup_fb = rcar_du_vsp_plane_cleanup_fb, 372 .atomic_check = rcar_du_vsp_plane_atomic_check, 373 .atomic_update = rcar_du_vsp_plane_atomic_update, 374 }; 375 376 static struct drm_plane_state * 377 rcar_du_vsp_plane_atomic_duplicate_state(struct drm_plane *plane) 378 { 379 struct rcar_du_vsp_plane_state *copy; 380 381 if (WARN_ON(!plane->state)) 382 return NULL; 383 384 copy = kzalloc(sizeof(*copy), GFP_KERNEL); 385 if (copy == NULL) 386 return NULL; 387 388 __drm_atomic_helper_plane_duplicate_state(plane, ©->state); 389 390 return ©->state; 391 } 392 393 static void rcar_du_vsp_plane_atomic_destroy_state(struct drm_plane *plane, 394 struct drm_plane_state *state) 395 { 396 __drm_atomic_helper_plane_destroy_state(state); 397 kfree(to_rcar_vsp_plane_state(state)); 398 } 399 400 static void rcar_du_vsp_plane_reset(struct drm_plane *plane) 401 { 402 struct rcar_du_vsp_plane_state *state; 403 404 if (plane->state) { 405 rcar_du_vsp_plane_atomic_destroy_state(plane, plane->state); 406 plane->state = NULL; 407 } 408 409 state = kzalloc(sizeof(*state), GFP_KERNEL); 410 if (state == NULL) 411 return; 412 413 __drm_atomic_helper_plane_reset(plane, &state->state); 414 } 415 416 static const struct drm_plane_funcs rcar_du_vsp_plane_funcs = { 417 .update_plane = drm_atomic_helper_update_plane, 418 .disable_plane = drm_atomic_helper_disable_plane, 419 .reset = rcar_du_vsp_plane_reset, 420 .destroy = drm_plane_cleanup, 421 .atomic_duplicate_state = rcar_du_vsp_plane_atomic_duplicate_state, 422 .atomic_destroy_state = rcar_du_vsp_plane_atomic_destroy_state, 423 }; 424 425 static void rcar_du_vsp_cleanup(struct drm_device *dev, void *res) 426 { 427 struct rcar_du_vsp *vsp = res; 428 unsigned int i; 429 430 for (i = 0; i < vsp->num_planes; ++i) { 431 struct rcar_du_vsp_plane *plane = &vsp->planes[i]; 432 433 drm_plane_cleanup(&plane->plane); 434 } 435 436 kfree(vsp->planes); 437 438 put_device(vsp->vsp); 439 } 440 441 int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np, 442 unsigned int crtcs) 443 { 444 struct rcar_du_device *rcdu = vsp->dev; 445 struct platform_device *pdev; 446 unsigned int num_crtcs = hweight32(crtcs); 447 unsigned int num_planes; 448 unsigned int i; 449 int ret; 450 451 /* Find the VSP device and initialize it. */ 452 pdev = of_find_device_by_node(np); 453 if (!pdev) 454 return -ENXIO; 455 456 vsp->vsp = &pdev->dev; 457 458 ret = drmm_add_action_or_reset(&rcdu->ddev, rcar_du_vsp_cleanup, vsp); 459 if (ret < 0) 460 return ret; 461 462 ret = vsp1_du_init(vsp->vsp); 463 if (ret < 0) 464 return ret; 465 466 num_planes = rcdu->info->num_rpf; 467 468 vsp->planes = kcalloc(num_planes, sizeof(*vsp->planes), GFP_KERNEL); 469 if (!vsp->planes) 470 return -ENOMEM; 471 472 for (i = 0; i < num_planes; ++i) { 473 enum drm_plane_type type = i < num_crtcs 474 ? DRM_PLANE_TYPE_PRIMARY 475 : DRM_PLANE_TYPE_OVERLAY; 476 struct rcar_du_vsp_plane *plane = &vsp->planes[i]; 477 unsigned int num_formats; 478 const u32 *formats; 479 480 if (rcdu->info->gen < 4) { 481 num_formats = ARRAY_SIZE(rcar_du_vsp_formats); 482 formats = rcar_du_vsp_formats; 483 } else { 484 num_formats = ARRAY_SIZE(rcar_du_vsp_formats_gen4); 485 formats = rcar_du_vsp_formats_gen4; 486 } 487 488 plane->vsp = vsp; 489 plane->index = i; 490 491 ret = drm_universal_plane_init(&rcdu->ddev, &plane->plane, 492 crtcs, &rcar_du_vsp_plane_funcs, 493 formats, num_formats, 494 NULL, type, NULL); 495 if (ret < 0) 496 return ret; 497 498 drm_plane_helper_add(&plane->plane, 499 &rcar_du_vsp_plane_helper_funcs); 500 501 drm_plane_create_alpha_property(&plane->plane); 502 drm_plane_create_zpos_property(&plane->plane, i, 0, 503 num_planes - 1); 504 505 drm_plane_create_blend_mode_property(&plane->plane, 506 BIT(DRM_MODE_BLEND_PIXEL_NONE) | 507 BIT(DRM_MODE_BLEND_PREMULTI) | 508 BIT(DRM_MODE_BLEND_COVERAGE)); 509 510 vsp->num_planes++; 511 } 512 513 return 0; 514 } 515