1 /* 2 * Copyright 2009 Jerome Glisse. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 19 * USE OR OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * The above copyright notice and this permission notice (including the 22 * next paragraph) shall be included in all copies or substantial portions 23 * of the Software. 24 * 25 */ 26 /* 27 * Authors: 28 * Jerome Glisse <glisse@freedesktop.org> 29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> 30 * Dave Airlie 31 */ 32 33 #include <linux/dma-mapping.h> 34 #include <linux/pagemap.h> 35 #include <linux/pci.h> 36 #include <linux/seq_file.h> 37 #include <linux/slab.h> 38 #include <linux/swap.h> 39 #include <linux/swiotlb.h> 40 41 #include <drm/drm_device.h> 42 #include <drm/drm_file.h> 43 #include <drm/drm_prime.h> 44 #include <drm/radeon_drm.h> 45 #include <drm/ttm/ttm_bo_api.h> 46 #include <drm/ttm/ttm_bo_driver.h> 47 #include <drm/ttm/ttm_placement.h> 48 49 #include "radeon_reg.h" 50 #include "radeon.h" 51 #include "radeon_ttm.h" 52 53 static void radeon_ttm_debugfs_init(struct radeon_device *rdev); 54 55 static int radeon_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm, 56 struct ttm_resource *bo_mem); 57 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm); 58 59 struct radeon_device *radeon_get_rdev(struct ttm_device *bdev) 60 { 61 struct radeon_mman *mman; 62 struct radeon_device *rdev; 63 64 mman = container_of(bdev, struct radeon_mman, bdev); 65 rdev = container_of(mman, struct radeon_device, mman); 66 return rdev; 67 } 68 69 static int radeon_ttm_init_vram(struct radeon_device *rdev) 70 { 71 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM, 72 false, rdev->mc.real_vram_size >> PAGE_SHIFT); 73 } 74 75 static int radeon_ttm_init_gtt(struct radeon_device *rdev) 76 { 77 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT, 78 true, rdev->mc.gtt_size >> PAGE_SHIFT); 79 } 80 81 static void radeon_evict_flags(struct ttm_buffer_object *bo, 82 struct ttm_placement *placement) 83 { 84 static const struct ttm_place placements = { 85 .fpfn = 0, 86 .lpfn = 0, 87 .mem_type = TTM_PL_SYSTEM, 88 .flags = 0 89 }; 90 91 struct radeon_bo *rbo; 92 93 if (!radeon_ttm_bo_is_radeon_bo(bo)) { 94 placement->placement = &placements; 95 placement->busy_placement = &placements; 96 placement->num_placement = 1; 97 placement->num_busy_placement = 1; 98 return; 99 } 100 rbo = container_of(bo, struct radeon_bo, tbo); 101 switch (bo->mem.mem_type) { 102 case TTM_PL_VRAM: 103 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false) 104 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 105 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size && 106 bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) { 107 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; 108 int i; 109 110 /* Try evicting to the CPU inaccessible part of VRAM 111 * first, but only set GTT as busy placement, so this 112 * BO will be evicted to GTT rather than causing other 113 * BOs to be evicted from VRAM 114 */ 115 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM | 116 RADEON_GEM_DOMAIN_GTT); 117 rbo->placement.num_busy_placement = 0; 118 for (i = 0; i < rbo->placement.num_placement; i++) { 119 if (rbo->placements[i].mem_type == TTM_PL_VRAM) { 120 if (rbo->placements[i].fpfn < fpfn) 121 rbo->placements[i].fpfn = fpfn; 122 } else { 123 rbo->placement.busy_placement = 124 &rbo->placements[i]; 125 rbo->placement.num_busy_placement = 1; 126 } 127 } 128 } else 129 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); 130 break; 131 case TTM_PL_TT: 132 default: 133 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 134 } 135 *placement = rbo->placement; 136 } 137 138 static int radeon_move_blit(struct ttm_buffer_object *bo, 139 bool evict, 140 struct ttm_resource *new_mem, 141 struct ttm_resource *old_mem) 142 { 143 struct radeon_device *rdev; 144 uint64_t old_start, new_start; 145 struct radeon_fence *fence; 146 unsigned num_pages; 147 int r, ridx; 148 149 rdev = radeon_get_rdev(bo->bdev); 150 ridx = radeon_copy_ring_index(rdev); 151 old_start = (u64)old_mem->start << PAGE_SHIFT; 152 new_start = (u64)new_mem->start << PAGE_SHIFT; 153 154 switch (old_mem->mem_type) { 155 case TTM_PL_VRAM: 156 old_start += rdev->mc.vram_start; 157 break; 158 case TTM_PL_TT: 159 old_start += rdev->mc.gtt_start; 160 break; 161 default: 162 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 163 return -EINVAL; 164 } 165 switch (new_mem->mem_type) { 166 case TTM_PL_VRAM: 167 new_start += rdev->mc.vram_start; 168 break; 169 case TTM_PL_TT: 170 new_start += rdev->mc.gtt_start; 171 break; 172 default: 173 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 174 return -EINVAL; 175 } 176 if (!rdev->ring[ridx].ready) { 177 DRM_ERROR("Trying to move memory with ring turned off.\n"); 178 return -EINVAL; 179 } 180 181 BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0); 182 183 num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); 184 fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv); 185 if (IS_ERR(fence)) 186 return PTR_ERR(fence); 187 188 r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem); 189 radeon_fence_unref(&fence); 190 return r; 191 } 192 193 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, 194 struct ttm_operation_ctx *ctx, 195 struct ttm_resource *new_mem, 196 struct ttm_place *hop) 197 { 198 struct radeon_device *rdev; 199 struct radeon_bo *rbo; 200 struct ttm_resource *old_mem = &bo->mem; 201 int r; 202 203 if (new_mem->mem_type == TTM_PL_TT) { 204 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem); 205 if (r) 206 return r; 207 } 208 209 r = ttm_bo_wait_ctx(bo, ctx); 210 if (r) 211 return r; 212 213 /* Can't move a pinned BO */ 214 rbo = container_of(bo, struct radeon_bo, tbo); 215 if (WARN_ON_ONCE(rbo->tbo.pin_count > 0)) 216 return -EINVAL; 217 218 rdev = radeon_get_rdev(bo->bdev); 219 if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) { 220 ttm_bo_move_null(bo, new_mem); 221 goto out; 222 } 223 if (old_mem->mem_type == TTM_PL_SYSTEM && 224 new_mem->mem_type == TTM_PL_TT) { 225 ttm_bo_move_null(bo, new_mem); 226 goto out; 227 } 228 229 if (old_mem->mem_type == TTM_PL_TT && 230 new_mem->mem_type == TTM_PL_SYSTEM) { 231 radeon_ttm_tt_unbind(bo->bdev, bo->ttm); 232 ttm_resource_free(bo, &bo->mem); 233 ttm_bo_assign_mem(bo, new_mem); 234 goto out; 235 } 236 if (rdev->ring[radeon_copy_ring_index(rdev)].ready && 237 rdev->asic->copy.copy != NULL) { 238 if ((old_mem->mem_type == TTM_PL_SYSTEM && 239 new_mem->mem_type == TTM_PL_VRAM) || 240 (old_mem->mem_type == TTM_PL_VRAM && 241 new_mem->mem_type == TTM_PL_SYSTEM)) { 242 hop->fpfn = 0; 243 hop->lpfn = 0; 244 hop->mem_type = TTM_PL_TT; 245 hop->flags = 0; 246 return -EMULTIHOP; 247 } 248 249 r = radeon_move_blit(bo, evict, new_mem, old_mem); 250 } else { 251 r = -ENODEV; 252 } 253 254 if (r) { 255 r = ttm_bo_move_memcpy(bo, ctx, new_mem); 256 if (r) 257 return r; 258 } 259 260 out: 261 /* update statistics */ 262 atomic64_add(bo->base.size, &rdev->num_bytes_moved); 263 radeon_bo_move_notify(bo, evict, new_mem); 264 return 0; 265 } 266 267 static int radeon_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *mem) 268 { 269 struct radeon_device *rdev = radeon_get_rdev(bdev); 270 size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT; 271 272 switch (mem->mem_type) { 273 case TTM_PL_SYSTEM: 274 /* system memory */ 275 return 0; 276 case TTM_PL_TT: 277 #if IS_ENABLED(CONFIG_AGP) 278 if (rdev->flags & RADEON_IS_AGP) { 279 /* RADEON_IS_AGP is set only if AGP is active */ 280 mem->bus.offset = (mem->start << PAGE_SHIFT) + 281 rdev->mc.agp_base; 282 mem->bus.is_iomem = !rdev->agp->cant_use_aperture; 283 mem->bus.caching = ttm_write_combined; 284 } 285 #endif 286 break; 287 case TTM_PL_VRAM: 288 mem->bus.offset = mem->start << PAGE_SHIFT; 289 /* check if it's visible */ 290 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size) 291 return -EINVAL; 292 mem->bus.offset += rdev->mc.aper_base; 293 mem->bus.is_iomem = true; 294 mem->bus.caching = ttm_write_combined; 295 #ifdef __alpha__ 296 /* 297 * Alpha: use bus.addr to hold the ioremap() return, 298 * so we can modify bus.base below. 299 */ 300 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size); 301 if (!mem->bus.addr) 302 return -ENOMEM; 303 304 /* 305 * Alpha: Use just the bus offset plus 306 * the hose/domain memory base for bus.base. 307 * It then can be used to build PTEs for VRAM 308 * access, as done in ttm_bo_vm_fault(). 309 */ 310 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) + 311 rdev->hose->dense_mem_base; 312 #endif 313 break; 314 default: 315 return -EINVAL; 316 } 317 return 0; 318 } 319 320 /* 321 * TTM backend functions. 322 */ 323 struct radeon_ttm_tt { 324 struct ttm_tt ttm; 325 u64 offset; 326 327 uint64_t userptr; 328 struct mm_struct *usermm; 329 uint32_t userflags; 330 bool bound; 331 }; 332 333 /* prepare the sg table with the user pages */ 334 static int radeon_ttm_tt_pin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm) 335 { 336 struct radeon_device *rdev = radeon_get_rdev(bdev); 337 struct radeon_ttm_tt *gtt = (void *)ttm; 338 unsigned pinned = 0; 339 int r; 340 341 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 342 enum dma_data_direction direction = write ? 343 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 344 345 if (current->mm != gtt->usermm) 346 return -EPERM; 347 348 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) { 349 /* check that we only pin down anonymous memory 350 to prevent problems with writeback */ 351 unsigned long end = gtt->userptr + (u64)ttm->num_pages * PAGE_SIZE; 352 struct vm_area_struct *vma; 353 vma = find_vma(gtt->usermm, gtt->userptr); 354 if (!vma || vma->vm_file || vma->vm_end < end) 355 return -EPERM; 356 } 357 358 do { 359 unsigned num_pages = ttm->num_pages - pinned; 360 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE; 361 struct page **pages = ttm->pages + pinned; 362 363 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0, 364 pages, NULL); 365 if (r < 0) 366 goto release_pages; 367 368 pinned += r; 369 370 } while (pinned < ttm->num_pages); 371 372 r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0, 373 (u64)ttm->num_pages << PAGE_SHIFT, 374 GFP_KERNEL); 375 if (r) 376 goto release_sg; 377 378 r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0); 379 if (r) 380 goto release_sg; 381 382 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, 383 ttm->num_pages); 384 385 return 0; 386 387 release_sg: 388 kfree(ttm->sg); 389 390 release_pages: 391 release_pages(ttm->pages, pinned); 392 return r; 393 } 394 395 static void radeon_ttm_tt_unpin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm) 396 { 397 struct radeon_device *rdev = radeon_get_rdev(bdev); 398 struct radeon_ttm_tt *gtt = (void *)ttm; 399 struct sg_page_iter sg_iter; 400 401 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 402 enum dma_data_direction direction = write ? 403 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 404 405 /* double check that we don't free the table twice */ 406 if (!ttm->sg || !ttm->sg->sgl) 407 return; 408 409 /* free the sg table and pages again */ 410 dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0); 411 412 for_each_sgtable_page(ttm->sg, &sg_iter, 0) { 413 struct page *page = sg_page_iter_page(&sg_iter); 414 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY)) 415 set_page_dirty(page); 416 417 mark_page_accessed(page); 418 put_page(page); 419 } 420 421 sg_free_table(ttm->sg); 422 } 423 424 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm) 425 { 426 struct radeon_ttm_tt *gtt = (void*)ttm; 427 428 return (gtt->bound); 429 } 430 431 static int radeon_ttm_backend_bind(struct ttm_device *bdev, 432 struct ttm_tt *ttm, 433 struct ttm_resource *bo_mem) 434 { 435 struct radeon_ttm_tt *gtt = (void*)ttm; 436 struct radeon_device *rdev = radeon_get_rdev(bdev); 437 uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ | 438 RADEON_GART_PAGE_WRITE; 439 int r; 440 441 if (gtt->bound) 442 return 0; 443 444 if (gtt->userptr) { 445 radeon_ttm_tt_pin_userptr(bdev, ttm); 446 flags &= ~RADEON_GART_PAGE_WRITE; 447 } 448 449 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT); 450 if (!ttm->num_pages) { 451 WARN(1, "nothing to bind %u pages for mreg %p back %p!\n", 452 ttm->num_pages, bo_mem, ttm); 453 } 454 if (ttm->caching == ttm_cached) 455 flags |= RADEON_GART_PAGE_SNOOP; 456 r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages, 457 ttm->pages, gtt->ttm.dma_address, flags); 458 if (r) { 459 DRM_ERROR("failed to bind %u pages at 0x%08X\n", 460 ttm->num_pages, (unsigned)gtt->offset); 461 return r; 462 } 463 gtt->bound = true; 464 return 0; 465 } 466 467 static void radeon_ttm_backend_unbind(struct ttm_device *bdev, struct ttm_tt *ttm) 468 { 469 struct radeon_ttm_tt *gtt = (void *)ttm; 470 struct radeon_device *rdev = radeon_get_rdev(bdev); 471 472 if (gtt->userptr) 473 radeon_ttm_tt_unpin_userptr(bdev, ttm); 474 475 if (!gtt->bound) 476 return; 477 478 radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages); 479 480 gtt->bound = false; 481 } 482 483 static void radeon_ttm_backend_destroy(struct ttm_device *bdev, struct ttm_tt *ttm) 484 { 485 struct radeon_ttm_tt *gtt = (void *)ttm; 486 487 radeon_ttm_backend_unbind(bdev, ttm); 488 ttm_tt_destroy_common(bdev, ttm); 489 490 ttm_tt_fini(>t->ttm); 491 kfree(gtt); 492 } 493 494 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, 495 uint32_t page_flags) 496 { 497 struct radeon_ttm_tt *gtt; 498 enum ttm_caching caching; 499 struct radeon_bo *rbo; 500 #if IS_ENABLED(CONFIG_AGP) 501 struct radeon_device *rdev = radeon_get_rdev(bo->bdev); 502 503 if (rdev->flags & RADEON_IS_AGP) { 504 return ttm_agp_tt_create(bo, rdev->agp->bridge, page_flags); 505 } 506 #endif 507 rbo = container_of(bo, struct radeon_bo, tbo); 508 509 gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); 510 if (gtt == NULL) { 511 return NULL; 512 } 513 514 if (rbo->flags & RADEON_GEM_GTT_UC) 515 caching = ttm_uncached; 516 else if (rbo->flags & RADEON_GEM_GTT_WC) 517 caching = ttm_write_combined; 518 else 519 caching = ttm_cached; 520 521 if (ttm_sg_tt_init(>t->ttm, bo, page_flags, caching)) { 522 kfree(gtt); 523 return NULL; 524 } 525 return >t->ttm; 526 } 527 528 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev, 529 struct ttm_tt *ttm) 530 { 531 #if IS_ENABLED(CONFIG_AGP) 532 if (rdev->flags & RADEON_IS_AGP) 533 return NULL; 534 #endif 535 536 if (!ttm) 537 return NULL; 538 return container_of(ttm, struct radeon_ttm_tt, ttm); 539 } 540 541 static int radeon_ttm_tt_populate(struct ttm_device *bdev, 542 struct ttm_tt *ttm, 543 struct ttm_operation_ctx *ctx) 544 { 545 struct radeon_device *rdev = radeon_get_rdev(bdev); 546 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 547 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); 548 549 if (gtt && gtt->userptr) { 550 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL); 551 if (!ttm->sg) 552 return -ENOMEM; 553 554 ttm->page_flags |= TTM_PAGE_FLAG_SG; 555 return 0; 556 } 557 558 if (slave && ttm->sg) { 559 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, 560 ttm->num_pages); 561 return 0; 562 } 563 564 return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx); 565 } 566 567 static void radeon_ttm_tt_unpopulate(struct ttm_device *bdev, struct ttm_tt *ttm) 568 { 569 struct radeon_device *rdev = radeon_get_rdev(bdev); 570 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 571 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); 572 573 if (gtt && gtt->userptr) { 574 kfree(ttm->sg); 575 ttm->page_flags &= ~TTM_PAGE_FLAG_SG; 576 return; 577 } 578 579 if (slave) 580 return; 581 582 return ttm_pool_free(&rdev->mman.bdev.pool, ttm); 583 } 584 585 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev, 586 struct ttm_tt *ttm, uint64_t addr, 587 uint32_t flags) 588 { 589 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 590 591 if (gtt == NULL) 592 return -EINVAL; 593 594 gtt->userptr = addr; 595 gtt->usermm = current->mm; 596 gtt->userflags = flags; 597 return 0; 598 } 599 600 bool radeon_ttm_tt_is_bound(struct ttm_device *bdev, 601 struct ttm_tt *ttm) 602 { 603 #if IS_ENABLED(CONFIG_AGP) 604 struct radeon_device *rdev = radeon_get_rdev(bdev); 605 if (rdev->flags & RADEON_IS_AGP) 606 return ttm_agp_is_bound(ttm); 607 #endif 608 return radeon_ttm_backend_is_bound(ttm); 609 } 610 611 static int radeon_ttm_tt_bind(struct ttm_device *bdev, 612 struct ttm_tt *ttm, 613 struct ttm_resource *bo_mem) 614 { 615 #if IS_ENABLED(CONFIG_AGP) 616 struct radeon_device *rdev = radeon_get_rdev(bdev); 617 #endif 618 619 if (!bo_mem) 620 return -EINVAL; 621 #if IS_ENABLED(CONFIG_AGP) 622 if (rdev->flags & RADEON_IS_AGP) 623 return ttm_agp_bind(ttm, bo_mem); 624 #endif 625 626 return radeon_ttm_backend_bind(bdev, ttm, bo_mem); 627 } 628 629 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, 630 struct ttm_tt *ttm) 631 { 632 #if IS_ENABLED(CONFIG_AGP) 633 struct radeon_device *rdev = radeon_get_rdev(bdev); 634 635 if (rdev->flags & RADEON_IS_AGP) { 636 ttm_agp_unbind(ttm); 637 return; 638 } 639 #endif 640 radeon_ttm_backend_unbind(bdev, ttm); 641 } 642 643 static void radeon_ttm_tt_destroy(struct ttm_device *bdev, 644 struct ttm_tt *ttm) 645 { 646 #if IS_ENABLED(CONFIG_AGP) 647 struct radeon_device *rdev = radeon_get_rdev(bdev); 648 649 if (rdev->flags & RADEON_IS_AGP) { 650 ttm_agp_unbind(ttm); 651 ttm_tt_destroy_common(bdev, ttm); 652 ttm_agp_destroy(ttm); 653 return; 654 } 655 #endif 656 radeon_ttm_backend_destroy(bdev, ttm); 657 } 658 659 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev, 660 struct ttm_tt *ttm) 661 { 662 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 663 664 if (gtt == NULL) 665 return false; 666 667 return !!gtt->userptr; 668 } 669 670 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev, 671 struct ttm_tt *ttm) 672 { 673 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 674 675 if (gtt == NULL) 676 return false; 677 678 return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 679 } 680 681 static void 682 radeon_bo_delete_mem_notify(struct ttm_buffer_object *bo) 683 { 684 radeon_bo_move_notify(bo, false, NULL); 685 } 686 687 static struct ttm_device_funcs radeon_bo_driver = { 688 .ttm_tt_create = &radeon_ttm_tt_create, 689 .ttm_tt_populate = &radeon_ttm_tt_populate, 690 .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate, 691 .ttm_tt_destroy = &radeon_ttm_tt_destroy, 692 .eviction_valuable = ttm_bo_eviction_valuable, 693 .evict_flags = &radeon_evict_flags, 694 .move = &radeon_bo_move, 695 .delete_mem_notify = &radeon_bo_delete_mem_notify, 696 .io_mem_reserve = &radeon_ttm_io_mem_reserve, 697 }; 698 699 int radeon_ttm_init(struct radeon_device *rdev) 700 { 701 int r; 702 703 /* No others user of address space so set it to 0 */ 704 r = ttm_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev, 705 rdev->ddev->anon_inode->i_mapping, 706 rdev->ddev->vma_offset_manager, 707 rdev->need_swiotlb, 708 dma_addressing_limited(&rdev->pdev->dev)); 709 if (r) { 710 DRM_ERROR("failed initializing buffer object driver(%d).\n", r); 711 return r; 712 } 713 rdev->mman.initialized = true; 714 715 r = radeon_ttm_init_vram(rdev); 716 if (r) { 717 DRM_ERROR("Failed initializing VRAM heap.\n"); 718 return r; 719 } 720 /* Change the size here instead of the init above so only lpfn is affected */ 721 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); 722 723 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true, 724 RADEON_GEM_DOMAIN_VRAM, 0, NULL, 725 NULL, &rdev->stolen_vga_memory); 726 if (r) { 727 return r; 728 } 729 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 730 if (r) 731 return r; 732 r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL); 733 radeon_bo_unreserve(rdev->stolen_vga_memory); 734 if (r) { 735 radeon_bo_unref(&rdev->stolen_vga_memory); 736 return r; 737 } 738 DRM_INFO("radeon: %uM of VRAM memory ready\n", 739 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024))); 740 741 r = radeon_ttm_init_gtt(rdev); 742 if (r) { 743 DRM_ERROR("Failed initializing GTT heap.\n"); 744 return r; 745 } 746 DRM_INFO("radeon: %uM of GTT memory ready.\n", 747 (unsigned)(rdev->mc.gtt_size / (1024 * 1024))); 748 749 radeon_ttm_debugfs_init(rdev); 750 751 return 0; 752 } 753 754 void radeon_ttm_fini(struct radeon_device *rdev) 755 { 756 int r; 757 758 if (!rdev->mman.initialized) 759 return; 760 761 if (rdev->stolen_vga_memory) { 762 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 763 if (r == 0) { 764 radeon_bo_unpin(rdev->stolen_vga_memory); 765 radeon_bo_unreserve(rdev->stolen_vga_memory); 766 } 767 radeon_bo_unref(&rdev->stolen_vga_memory); 768 } 769 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM); 770 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT); 771 ttm_device_fini(&rdev->mman.bdev); 772 radeon_gart_fini(rdev); 773 rdev->mman.initialized = false; 774 DRM_INFO("radeon: ttm finalized\n"); 775 } 776 777 /* this should only be called at bootup or when userspace 778 * isn't running */ 779 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size) 780 { 781 struct ttm_resource_manager *man; 782 783 if (!rdev->mman.initialized) 784 return; 785 786 man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM); 787 /* this just adjusts TTM size idea, which sets lpfn to the correct value */ 788 man->size = size >> PAGE_SHIFT; 789 } 790 791 #if defined(CONFIG_DEBUG_FS) 792 793 static int radeon_mm_vram_dump_table_show(struct seq_file *m, void *unused) 794 { 795 struct radeon_device *rdev = (struct radeon_device *)m->private; 796 struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, 797 TTM_PL_VRAM); 798 struct drm_printer p = drm_seq_file_printer(m); 799 800 man->func->debug(man, &p); 801 return 0; 802 } 803 804 static int radeon_ttm_page_pool_show(struct seq_file *m, void *data) 805 { 806 struct radeon_device *rdev = (struct radeon_device *)m->private; 807 808 return ttm_pool_debugfs(&rdev->mman.bdev.pool, m); 809 } 810 811 static int radeon_mm_gtt_dump_table_show(struct seq_file *m, void *unused) 812 { 813 struct radeon_device *rdev = (struct radeon_device *)m->private; 814 struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, 815 TTM_PL_TT); 816 struct drm_printer p = drm_seq_file_printer(m); 817 818 man->func->debug(man, &p); 819 return 0; 820 } 821 822 DEFINE_SHOW_ATTRIBUTE(radeon_mm_vram_dump_table); 823 DEFINE_SHOW_ATTRIBUTE(radeon_mm_gtt_dump_table); 824 DEFINE_SHOW_ATTRIBUTE(radeon_ttm_page_pool); 825 826 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep) 827 { 828 struct radeon_device *rdev = inode->i_private; 829 i_size_write(inode, rdev->mc.mc_vram_size); 830 filep->private_data = inode->i_private; 831 return 0; 832 } 833 834 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf, 835 size_t size, loff_t *pos) 836 { 837 struct radeon_device *rdev = f->private_data; 838 ssize_t result = 0; 839 int r; 840 841 if (size & 0x3 || *pos & 0x3) 842 return -EINVAL; 843 844 while (size) { 845 unsigned long flags; 846 uint32_t value; 847 848 if (*pos >= rdev->mc.mc_vram_size) 849 return result; 850 851 spin_lock_irqsave(&rdev->mmio_idx_lock, flags); 852 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000); 853 if (rdev->family >= CHIP_CEDAR) 854 WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31); 855 value = RREG32(RADEON_MM_DATA); 856 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); 857 858 r = put_user(value, (uint32_t __user *)buf); 859 if (r) 860 return r; 861 862 result += 4; 863 buf += 4; 864 *pos += 4; 865 size -= 4; 866 } 867 868 return result; 869 } 870 871 static const struct file_operations radeon_ttm_vram_fops = { 872 .owner = THIS_MODULE, 873 .open = radeon_ttm_vram_open, 874 .read = radeon_ttm_vram_read, 875 .llseek = default_llseek 876 }; 877 878 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep) 879 { 880 struct radeon_device *rdev = inode->i_private; 881 i_size_write(inode, rdev->mc.gtt_size); 882 filep->private_data = inode->i_private; 883 return 0; 884 } 885 886 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf, 887 size_t size, loff_t *pos) 888 { 889 struct radeon_device *rdev = f->private_data; 890 ssize_t result = 0; 891 int r; 892 893 while (size) { 894 loff_t p = *pos / PAGE_SIZE; 895 unsigned off = *pos & ~PAGE_MASK; 896 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off); 897 struct page *page; 898 void *ptr; 899 900 if (p >= rdev->gart.num_cpu_pages) 901 return result; 902 903 page = rdev->gart.pages[p]; 904 if (page) { 905 ptr = kmap(page); 906 ptr += off; 907 908 r = copy_to_user(buf, ptr, cur_size); 909 kunmap(rdev->gart.pages[p]); 910 } else 911 r = clear_user(buf, cur_size); 912 913 if (r) 914 return -EFAULT; 915 916 result += cur_size; 917 buf += cur_size; 918 *pos += cur_size; 919 size -= cur_size; 920 } 921 922 return result; 923 } 924 925 static const struct file_operations radeon_ttm_gtt_fops = { 926 .owner = THIS_MODULE, 927 .open = radeon_ttm_gtt_open, 928 .read = radeon_ttm_gtt_read, 929 .llseek = default_llseek 930 }; 931 932 #endif 933 934 static void radeon_ttm_debugfs_init(struct radeon_device *rdev) 935 { 936 #if defined(CONFIG_DEBUG_FS) 937 struct drm_minor *minor = rdev->ddev->primary; 938 struct dentry *root = minor->debugfs_root; 939 940 debugfs_create_file("radeon_vram", 0444, root, rdev, 941 &radeon_ttm_vram_fops); 942 943 debugfs_create_file("radeon_gtt", 0444, root, rdev, 944 &radeon_ttm_gtt_fops); 945 946 debugfs_create_file("radeon_vram_mm", 0444, root, rdev, 947 &radeon_mm_vram_dump_table_fops); 948 debugfs_create_file("radeon_gtt_mm", 0444, root, rdev, 949 &radeon_mm_gtt_dump_table_fops); 950 debugfs_create_file("ttm_page_pool", 0444, root, rdev, 951 &radeon_ttm_page_pool_fops); 952 #endif 953 } 954