1 /* 2 * Copyright 2009 Jerome Glisse. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 19 * USE OR OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * The above copyright notice and this permission notice (including the 22 * next paragraph) shall be included in all copies or substantial portions 23 * of the Software. 24 * 25 */ 26 /* 27 * Authors: 28 * Jerome Glisse <glisse@freedesktop.org> 29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> 30 * Dave Airlie 31 */ 32 33 #include <linux/dma-mapping.h> 34 #include <linux/pagemap.h> 35 #include <linux/pci.h> 36 #include <linux/seq_file.h> 37 #include <linux/slab.h> 38 #include <linux/swap.h> 39 #include <linux/swiotlb.h> 40 41 #include <drm/drm_agpsupport.h> 42 #include <drm/drm_debugfs.h> 43 #include <drm/drm_device.h> 44 #include <drm/drm_file.h> 45 #include <drm/drm_prime.h> 46 #include <drm/radeon_drm.h> 47 #include <drm/ttm/ttm_bo_api.h> 48 #include <drm/ttm/ttm_bo_driver.h> 49 #include <drm/ttm/ttm_module.h> 50 #include <drm/ttm/ttm_page_alloc.h> 51 #include <drm/ttm/ttm_placement.h> 52 53 #include "radeon_reg.h" 54 #include "radeon.h" 55 56 static int radeon_ttm_debugfs_init(struct radeon_device *rdev); 57 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev); 58 59 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev, 60 struct ttm_tt *ttm, 61 struct ttm_resource *bo_mem); 62 63 struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev) 64 { 65 struct radeon_mman *mman; 66 struct radeon_device *rdev; 67 68 mman = container_of(bdev, struct radeon_mman, bdev); 69 rdev = container_of(mman, struct radeon_device, mman); 70 return rdev; 71 } 72 73 static int radeon_ttm_init_vram(struct radeon_device *rdev) 74 { 75 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM, 76 false, rdev->mc.real_vram_size >> PAGE_SHIFT); 77 } 78 79 static int radeon_ttm_init_gtt(struct radeon_device *rdev) 80 { 81 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT, 82 true, rdev->mc.gtt_size >> PAGE_SHIFT); 83 } 84 85 static void radeon_evict_flags(struct ttm_buffer_object *bo, 86 struct ttm_placement *placement) 87 { 88 static const struct ttm_place placements = { 89 .fpfn = 0, 90 .lpfn = 0, 91 .mem_type = TTM_PL_SYSTEM, 92 .flags = 0 93 }; 94 95 struct radeon_bo *rbo; 96 97 if (!radeon_ttm_bo_is_radeon_bo(bo)) { 98 placement->placement = &placements; 99 placement->busy_placement = &placements; 100 placement->num_placement = 1; 101 placement->num_busy_placement = 1; 102 return; 103 } 104 rbo = container_of(bo, struct radeon_bo, tbo); 105 switch (bo->mem.mem_type) { 106 case TTM_PL_VRAM: 107 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false) 108 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 109 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size && 110 bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) { 111 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; 112 int i; 113 114 /* Try evicting to the CPU inaccessible part of VRAM 115 * first, but only set GTT as busy placement, so this 116 * BO will be evicted to GTT rather than causing other 117 * BOs to be evicted from VRAM 118 */ 119 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM | 120 RADEON_GEM_DOMAIN_GTT); 121 rbo->placement.num_busy_placement = 0; 122 for (i = 0; i < rbo->placement.num_placement; i++) { 123 if (rbo->placements[i].mem_type == TTM_PL_VRAM) { 124 if (rbo->placements[i].fpfn < fpfn) 125 rbo->placements[i].fpfn = fpfn; 126 } else { 127 rbo->placement.busy_placement = 128 &rbo->placements[i]; 129 rbo->placement.num_busy_placement = 1; 130 } 131 } 132 } else 133 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); 134 break; 135 case TTM_PL_TT: 136 default: 137 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 138 } 139 *placement = rbo->placement; 140 } 141 142 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp) 143 { 144 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo); 145 struct radeon_device *rdev = radeon_get_rdev(bo->bdev); 146 147 if (radeon_ttm_tt_has_userptr(rdev, bo->ttm)) 148 return -EPERM; 149 return drm_vma_node_verify_access(&rbo->tbo.base.vma_node, 150 filp->private_data); 151 } 152 153 static int radeon_move_blit(struct ttm_buffer_object *bo, 154 bool evict, 155 struct ttm_resource *new_mem, 156 struct ttm_resource *old_mem) 157 { 158 struct radeon_device *rdev; 159 uint64_t old_start, new_start; 160 struct radeon_fence *fence; 161 unsigned num_pages; 162 int r, ridx; 163 164 rdev = radeon_get_rdev(bo->bdev); 165 ridx = radeon_copy_ring_index(rdev); 166 old_start = (u64)old_mem->start << PAGE_SHIFT; 167 new_start = (u64)new_mem->start << PAGE_SHIFT; 168 169 switch (old_mem->mem_type) { 170 case TTM_PL_VRAM: 171 old_start += rdev->mc.vram_start; 172 break; 173 case TTM_PL_TT: 174 old_start += rdev->mc.gtt_start; 175 break; 176 default: 177 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 178 return -EINVAL; 179 } 180 switch (new_mem->mem_type) { 181 case TTM_PL_VRAM: 182 new_start += rdev->mc.vram_start; 183 break; 184 case TTM_PL_TT: 185 new_start += rdev->mc.gtt_start; 186 break; 187 default: 188 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 189 return -EINVAL; 190 } 191 if (!rdev->ring[ridx].ready) { 192 DRM_ERROR("Trying to move memory with ring turned off.\n"); 193 return -EINVAL; 194 } 195 196 BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0); 197 198 num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); 199 fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv); 200 if (IS_ERR(fence)) 201 return PTR_ERR(fence); 202 203 r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem); 204 radeon_fence_unref(&fence); 205 return r; 206 } 207 208 static int radeon_move_vram_ram(struct ttm_buffer_object *bo, 209 bool evict, 210 struct ttm_operation_ctx *ctx, 211 struct ttm_resource *new_mem) 212 { 213 struct ttm_resource *old_mem = &bo->mem; 214 struct ttm_resource tmp_mem; 215 struct ttm_place placements; 216 struct ttm_placement placement; 217 int r; 218 219 tmp_mem = *new_mem; 220 tmp_mem.mm_node = NULL; 221 placement.num_placement = 1; 222 placement.placement = &placements; 223 placement.num_busy_placement = 1; 224 placement.busy_placement = &placements; 225 placements.fpfn = 0; 226 placements.lpfn = 0; 227 placements.mem_type = TTM_PL_TT; 228 placements.flags = 0; 229 r = ttm_bo_mem_space(bo, &placement, &tmp_mem, ctx); 230 if (unlikely(r)) { 231 return r; 232 } 233 234 r = ttm_tt_populate(bo->bdev, bo->ttm, ctx); 235 if (unlikely(r)) { 236 goto out_cleanup; 237 } 238 239 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, &tmp_mem); 240 if (unlikely(r)) { 241 goto out_cleanup; 242 } 243 r = radeon_move_blit(bo, true, &tmp_mem, old_mem); 244 if (unlikely(r)) { 245 goto out_cleanup; 246 } 247 r = ttm_bo_move_ttm(bo, ctx, new_mem); 248 out_cleanup: 249 ttm_resource_free(bo, &tmp_mem); 250 return r; 251 } 252 253 static int radeon_move_ram_vram(struct ttm_buffer_object *bo, 254 bool evict, 255 struct ttm_operation_ctx *ctx, 256 struct ttm_resource *new_mem) 257 { 258 struct ttm_resource *old_mem = &bo->mem; 259 struct ttm_resource tmp_mem; 260 struct ttm_placement placement; 261 struct ttm_place placements; 262 int r; 263 264 tmp_mem = *new_mem; 265 tmp_mem.mm_node = NULL; 266 placement.num_placement = 1; 267 placement.placement = &placements; 268 placement.num_busy_placement = 1; 269 placement.busy_placement = &placements; 270 placements.fpfn = 0; 271 placements.lpfn = 0; 272 placements.mem_type = TTM_PL_TT; 273 placements.flags = 0; 274 r = ttm_bo_mem_space(bo, &placement, &tmp_mem, ctx); 275 if (unlikely(r)) { 276 return r; 277 } 278 r = ttm_bo_move_ttm(bo, ctx, &tmp_mem); 279 if (unlikely(r)) { 280 goto out_cleanup; 281 } 282 r = radeon_move_blit(bo, true, new_mem, old_mem); 283 if (unlikely(r)) { 284 goto out_cleanup; 285 } 286 out_cleanup: 287 ttm_resource_free(bo, &tmp_mem); 288 return r; 289 } 290 291 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, 292 struct ttm_operation_ctx *ctx, 293 struct ttm_resource *new_mem) 294 { 295 struct radeon_device *rdev; 296 struct radeon_bo *rbo; 297 struct ttm_resource *old_mem = &bo->mem; 298 int r; 299 300 r = ttm_bo_wait_ctx(bo, ctx); 301 if (r) 302 return r; 303 304 /* Can't move a pinned BO */ 305 rbo = container_of(bo, struct radeon_bo, tbo); 306 if (WARN_ON_ONCE(rbo->tbo.pin_count > 0)) 307 return -EINVAL; 308 309 rdev = radeon_get_rdev(bo->bdev); 310 if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) { 311 ttm_bo_move_null(bo, new_mem); 312 return 0; 313 } 314 if (old_mem->mem_type == TTM_PL_SYSTEM && 315 new_mem->mem_type == TTM_PL_TT) { 316 ttm_bo_move_null(bo, new_mem); 317 return 0; 318 } 319 320 if (old_mem->mem_type == TTM_PL_TT && 321 new_mem->mem_type == TTM_PL_SYSTEM) 322 return ttm_bo_move_ttm(bo, ctx, new_mem); 323 324 if (!rdev->ring[radeon_copy_ring_index(rdev)].ready || 325 rdev->asic->copy.copy == NULL) { 326 /* use memcpy */ 327 goto memcpy; 328 } 329 330 if (old_mem->mem_type == TTM_PL_VRAM && 331 new_mem->mem_type == TTM_PL_SYSTEM) { 332 r = radeon_move_vram_ram(bo, evict, ctx, new_mem); 333 } else if (old_mem->mem_type == TTM_PL_SYSTEM && 334 new_mem->mem_type == TTM_PL_VRAM) { 335 r = radeon_move_ram_vram(bo, evict, ctx, new_mem); 336 } else { 337 r = radeon_move_blit(bo, evict, 338 new_mem, old_mem); 339 } 340 341 if (r) { 342 memcpy: 343 r = ttm_bo_move_memcpy(bo, ctx, new_mem); 344 if (r) { 345 return r; 346 } 347 } 348 349 /* update statistics */ 350 atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved); 351 return 0; 352 } 353 354 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *mem) 355 { 356 struct radeon_device *rdev = radeon_get_rdev(bdev); 357 size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT; 358 359 switch (mem->mem_type) { 360 case TTM_PL_SYSTEM: 361 /* system memory */ 362 return 0; 363 case TTM_PL_TT: 364 #if IS_ENABLED(CONFIG_AGP) 365 if (rdev->flags & RADEON_IS_AGP) { 366 /* RADEON_IS_AGP is set only if AGP is active */ 367 mem->bus.offset = (mem->start << PAGE_SHIFT) + 368 rdev->mc.agp_base; 369 mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture; 370 mem->bus.caching = ttm_write_combined; 371 } 372 #endif 373 break; 374 case TTM_PL_VRAM: 375 mem->bus.offset = mem->start << PAGE_SHIFT; 376 /* check if it's visible */ 377 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size) 378 return -EINVAL; 379 mem->bus.offset += rdev->mc.aper_base; 380 mem->bus.is_iomem = true; 381 mem->bus.caching = ttm_write_combined; 382 #ifdef __alpha__ 383 /* 384 * Alpha: use bus.addr to hold the ioremap() return, 385 * so we can modify bus.base below. 386 */ 387 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size); 388 if (!mem->bus.addr) 389 return -ENOMEM; 390 391 /* 392 * Alpha: Use just the bus offset plus 393 * the hose/domain memory base for bus.base. 394 * It then can be used to build PTEs for VRAM 395 * access, as done in ttm_bo_vm_fault(). 396 */ 397 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) + 398 rdev->ddev->hose->dense_mem_base; 399 #endif 400 break; 401 default: 402 return -EINVAL; 403 } 404 return 0; 405 } 406 407 /* 408 * TTM backend functions. 409 */ 410 struct radeon_ttm_tt { 411 struct ttm_dma_tt ttm; 412 u64 offset; 413 414 uint64_t userptr; 415 struct mm_struct *usermm; 416 uint32_t userflags; 417 bool bound; 418 }; 419 420 /* prepare the sg table with the user pages */ 421 static int radeon_ttm_tt_pin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm) 422 { 423 struct radeon_device *rdev = radeon_get_rdev(bdev); 424 struct radeon_ttm_tt *gtt = (void *)ttm; 425 unsigned pinned = 0; 426 int r; 427 428 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 429 enum dma_data_direction direction = write ? 430 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 431 432 if (current->mm != gtt->usermm) 433 return -EPERM; 434 435 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) { 436 /* check that we only pin down anonymous memory 437 to prevent problems with writeback */ 438 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE; 439 struct vm_area_struct *vma; 440 vma = find_vma(gtt->usermm, gtt->userptr); 441 if (!vma || vma->vm_file || vma->vm_end < end) 442 return -EPERM; 443 } 444 445 do { 446 unsigned num_pages = ttm->num_pages - pinned; 447 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE; 448 struct page **pages = ttm->pages + pinned; 449 450 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0, 451 pages, NULL); 452 if (r < 0) 453 goto release_pages; 454 455 pinned += r; 456 457 } while (pinned < ttm->num_pages); 458 459 r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0, 460 ttm->num_pages << PAGE_SHIFT, 461 GFP_KERNEL); 462 if (r) 463 goto release_sg; 464 465 r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0); 466 if (r) 467 goto release_sg; 468 469 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages, 470 gtt->ttm.dma_address, ttm->num_pages); 471 472 return 0; 473 474 release_sg: 475 kfree(ttm->sg); 476 477 release_pages: 478 release_pages(ttm->pages, pinned); 479 return r; 480 } 481 482 static void radeon_ttm_tt_unpin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm) 483 { 484 struct radeon_device *rdev = radeon_get_rdev(bdev); 485 struct radeon_ttm_tt *gtt = (void *)ttm; 486 struct sg_page_iter sg_iter; 487 488 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 489 enum dma_data_direction direction = write ? 490 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 491 492 /* double check that we don't free the table twice */ 493 if (!ttm->sg->sgl) 494 return; 495 496 /* free the sg table and pages again */ 497 dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0); 498 499 for_each_sgtable_page(ttm->sg, &sg_iter, 0) { 500 struct page *page = sg_page_iter_page(&sg_iter); 501 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY)) 502 set_page_dirty(page); 503 504 mark_page_accessed(page); 505 put_page(page); 506 } 507 508 sg_free_table(ttm->sg); 509 } 510 511 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm) 512 { 513 struct radeon_ttm_tt *gtt = (void*)ttm; 514 515 return (gtt->bound); 516 } 517 518 static int radeon_ttm_backend_bind(struct ttm_bo_device *bdev, 519 struct ttm_tt *ttm, 520 struct ttm_resource *bo_mem) 521 { 522 struct radeon_ttm_tt *gtt = (void*)ttm; 523 struct radeon_device *rdev = radeon_get_rdev(bdev); 524 uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ | 525 RADEON_GART_PAGE_WRITE; 526 int r; 527 528 if (gtt->bound) 529 return 0; 530 531 if (gtt->userptr) { 532 radeon_ttm_tt_pin_userptr(bdev, ttm); 533 flags &= ~RADEON_GART_PAGE_WRITE; 534 } 535 536 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT); 537 if (!ttm->num_pages) { 538 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", 539 ttm->num_pages, bo_mem, ttm); 540 } 541 if (ttm->caching == ttm_cached) 542 flags |= RADEON_GART_PAGE_SNOOP; 543 r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages, 544 ttm->pages, gtt->ttm.dma_address, flags); 545 if (r) { 546 DRM_ERROR("failed to bind %lu pages at 0x%08X\n", 547 ttm->num_pages, (unsigned)gtt->offset); 548 return r; 549 } 550 gtt->bound = true; 551 return 0; 552 } 553 554 static void radeon_ttm_backend_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm) 555 { 556 struct radeon_ttm_tt *gtt = (void *)ttm; 557 struct radeon_device *rdev = radeon_get_rdev(bdev); 558 559 if (!gtt->bound) 560 return; 561 562 radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages); 563 564 if (gtt->userptr) 565 radeon_ttm_tt_unpin_userptr(bdev, ttm); 566 gtt->bound = false; 567 } 568 569 static void radeon_ttm_backend_destroy(struct ttm_bo_device *bdev, struct ttm_tt *ttm) 570 { 571 struct radeon_ttm_tt *gtt = (void *)ttm; 572 573 radeon_ttm_backend_unbind(bdev, ttm); 574 ttm_tt_destroy_common(bdev, ttm); 575 576 ttm_dma_tt_fini(>t->ttm); 577 kfree(gtt); 578 } 579 580 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, 581 uint32_t page_flags) 582 { 583 struct radeon_device *rdev; 584 struct radeon_ttm_tt *gtt; 585 enum ttm_caching caching; 586 struct radeon_bo *rbo; 587 588 rbo = container_of(bo, struct radeon_bo, tbo); 589 590 rdev = radeon_get_rdev(bo->bdev); 591 #if IS_ENABLED(CONFIG_AGP) 592 if (rdev->flags & RADEON_IS_AGP) { 593 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge, 594 page_flags); 595 } 596 #endif 597 598 gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); 599 if (gtt == NULL) { 600 return NULL; 601 } 602 603 if (rbo->flags & RADEON_GEM_GTT_UC) 604 caching = ttm_uncached; 605 else if (rbo->flags & RADEON_GEM_GTT_WC) 606 caching = ttm_write_combined; 607 else 608 caching = ttm_cached; 609 610 if (ttm_dma_tt_init(>t->ttm, bo, page_flags, caching)) { 611 kfree(gtt); 612 return NULL; 613 } 614 return >t->ttm.ttm; 615 } 616 617 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev, 618 struct ttm_tt *ttm) 619 { 620 #if IS_ENABLED(CONFIG_AGP) 621 if (rdev->flags & RADEON_IS_AGP) 622 return NULL; 623 #endif 624 625 if (!ttm) 626 return NULL; 627 return container_of(ttm, struct radeon_ttm_tt, ttm.ttm); 628 } 629 630 static int radeon_ttm_tt_populate(struct ttm_bo_device *bdev, 631 struct ttm_tt *ttm, 632 struct ttm_operation_ctx *ctx) 633 { 634 struct radeon_device *rdev = radeon_get_rdev(bdev); 635 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 636 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); 637 638 if (gtt && gtt->userptr) { 639 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL); 640 if (!ttm->sg) 641 return -ENOMEM; 642 643 ttm->page_flags |= TTM_PAGE_FLAG_SG; 644 ttm_tt_set_populated(ttm); 645 return 0; 646 } 647 648 if (slave && ttm->sg) { 649 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages, 650 gtt->ttm.dma_address, ttm->num_pages); 651 ttm_tt_set_populated(ttm); 652 return 0; 653 } 654 655 #if IS_ENABLED(CONFIG_AGP) 656 if (rdev->flags & RADEON_IS_AGP) { 657 return ttm_pool_populate(ttm, ctx); 658 } 659 #endif 660 661 #ifdef CONFIG_SWIOTLB 662 if (rdev->need_swiotlb && swiotlb_nr_tbl()) { 663 return ttm_dma_populate(>t->ttm, rdev->dev, ctx); 664 } 665 #endif 666 667 return ttm_populate_and_map_pages(rdev->dev, >t->ttm, ctx); 668 } 669 670 static void radeon_ttm_tt_unpopulate(struct ttm_bo_device *bdev, struct ttm_tt *ttm) 671 { 672 struct radeon_device *rdev = radeon_get_rdev(bdev); 673 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 674 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); 675 676 if (gtt && gtt->userptr) { 677 kfree(ttm->sg); 678 ttm->page_flags &= ~TTM_PAGE_FLAG_SG; 679 return; 680 } 681 682 if (slave) 683 return; 684 685 #if IS_ENABLED(CONFIG_AGP) 686 if (rdev->flags & RADEON_IS_AGP) { 687 ttm_pool_unpopulate(ttm); 688 return; 689 } 690 #endif 691 692 #ifdef CONFIG_SWIOTLB 693 if (rdev->need_swiotlb && swiotlb_nr_tbl()) { 694 ttm_dma_unpopulate(>t->ttm, rdev->dev); 695 return; 696 } 697 #endif 698 699 ttm_unmap_and_unpopulate_pages(rdev->dev, >t->ttm); 700 } 701 702 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev, 703 struct ttm_tt *ttm, uint64_t addr, 704 uint32_t flags) 705 { 706 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 707 708 if (gtt == NULL) 709 return -EINVAL; 710 711 gtt->userptr = addr; 712 gtt->usermm = current->mm; 713 gtt->userflags = flags; 714 return 0; 715 } 716 717 bool radeon_ttm_tt_is_bound(struct ttm_bo_device *bdev, 718 struct ttm_tt *ttm) 719 { 720 #if IS_ENABLED(CONFIG_AGP) 721 struct radeon_device *rdev = radeon_get_rdev(bdev); 722 if (rdev->flags & RADEON_IS_AGP) 723 return ttm_agp_is_bound(ttm); 724 #endif 725 return radeon_ttm_backend_is_bound(ttm); 726 } 727 728 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev, 729 struct ttm_tt *ttm, 730 struct ttm_resource *bo_mem) 731 { 732 #if IS_ENABLED(CONFIG_AGP) 733 struct radeon_device *rdev = radeon_get_rdev(bdev); 734 #endif 735 736 if (!bo_mem) 737 return -EINVAL; 738 #if IS_ENABLED(CONFIG_AGP) 739 if (rdev->flags & RADEON_IS_AGP) 740 return ttm_agp_bind(ttm, bo_mem); 741 #endif 742 743 return radeon_ttm_backend_bind(bdev, ttm, bo_mem); 744 } 745 746 static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev, 747 struct ttm_tt *ttm) 748 { 749 #if IS_ENABLED(CONFIG_AGP) 750 struct radeon_device *rdev = radeon_get_rdev(bdev); 751 752 if (rdev->flags & RADEON_IS_AGP) { 753 ttm_agp_unbind(ttm); 754 return; 755 } 756 #endif 757 radeon_ttm_backend_unbind(bdev, ttm); 758 } 759 760 static void radeon_ttm_tt_destroy(struct ttm_bo_device *bdev, 761 struct ttm_tt *ttm) 762 { 763 #if IS_ENABLED(CONFIG_AGP) 764 struct radeon_device *rdev = radeon_get_rdev(bdev); 765 766 if (rdev->flags & RADEON_IS_AGP) { 767 ttm_agp_unbind(ttm); 768 ttm_tt_destroy_common(bdev, ttm); 769 ttm_agp_destroy(ttm); 770 return; 771 } 772 #endif 773 radeon_ttm_backend_destroy(bdev, ttm); 774 } 775 776 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev, 777 struct ttm_tt *ttm) 778 { 779 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 780 781 if (gtt == NULL) 782 return false; 783 784 return !!gtt->userptr; 785 } 786 787 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev, 788 struct ttm_tt *ttm) 789 { 790 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 791 792 if (gtt == NULL) 793 return false; 794 795 return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 796 } 797 798 static struct ttm_bo_driver radeon_bo_driver = { 799 .ttm_tt_create = &radeon_ttm_tt_create, 800 .ttm_tt_populate = &radeon_ttm_tt_populate, 801 .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate, 802 .ttm_tt_bind = &radeon_ttm_tt_bind, 803 .ttm_tt_unbind = &radeon_ttm_tt_unbind, 804 .ttm_tt_destroy = &radeon_ttm_tt_destroy, 805 .eviction_valuable = ttm_bo_eviction_valuable, 806 .evict_flags = &radeon_evict_flags, 807 .move = &radeon_bo_move, 808 .verify_access = &radeon_verify_access, 809 .move_notify = &radeon_bo_move_notify, 810 .io_mem_reserve = &radeon_ttm_io_mem_reserve, 811 }; 812 813 int radeon_ttm_init(struct radeon_device *rdev) 814 { 815 int r; 816 817 /* No others user of address space so set it to 0 */ 818 r = ttm_bo_device_init(&rdev->mman.bdev, 819 &radeon_bo_driver, 820 rdev->ddev->anon_inode->i_mapping, 821 rdev->ddev->vma_offset_manager, 822 dma_addressing_limited(&rdev->pdev->dev)); 823 if (r) { 824 DRM_ERROR("failed initializing buffer object driver(%d).\n", r); 825 return r; 826 } 827 rdev->mman.initialized = true; 828 829 r = radeon_ttm_init_vram(rdev); 830 if (r) { 831 DRM_ERROR("Failed initializing VRAM heap.\n"); 832 return r; 833 } 834 /* Change the size here instead of the init above so only lpfn is affected */ 835 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); 836 837 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true, 838 RADEON_GEM_DOMAIN_VRAM, 0, NULL, 839 NULL, &rdev->stolen_vga_memory); 840 if (r) { 841 return r; 842 } 843 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 844 if (r) 845 return r; 846 r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL); 847 radeon_bo_unreserve(rdev->stolen_vga_memory); 848 if (r) { 849 radeon_bo_unref(&rdev->stolen_vga_memory); 850 return r; 851 } 852 DRM_INFO("radeon: %uM of VRAM memory ready\n", 853 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024))); 854 855 r = radeon_ttm_init_gtt(rdev); 856 if (r) { 857 DRM_ERROR("Failed initializing GTT heap.\n"); 858 return r; 859 } 860 DRM_INFO("radeon: %uM of GTT memory ready.\n", 861 (unsigned)(rdev->mc.gtt_size / (1024 * 1024))); 862 863 r = radeon_ttm_debugfs_init(rdev); 864 if (r) { 865 DRM_ERROR("Failed to init debugfs\n"); 866 return r; 867 } 868 return 0; 869 } 870 871 void radeon_ttm_fini(struct radeon_device *rdev) 872 { 873 int r; 874 875 if (!rdev->mman.initialized) 876 return; 877 radeon_ttm_debugfs_fini(rdev); 878 if (rdev->stolen_vga_memory) { 879 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 880 if (r == 0) { 881 radeon_bo_unpin(rdev->stolen_vga_memory); 882 radeon_bo_unreserve(rdev->stolen_vga_memory); 883 } 884 radeon_bo_unref(&rdev->stolen_vga_memory); 885 } 886 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM); 887 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT); 888 ttm_bo_device_release(&rdev->mman.bdev); 889 radeon_gart_fini(rdev); 890 rdev->mman.initialized = false; 891 DRM_INFO("radeon: ttm finalized\n"); 892 } 893 894 /* this should only be called at bootup or when userspace 895 * isn't running */ 896 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size) 897 { 898 struct ttm_resource_manager *man; 899 900 if (!rdev->mman.initialized) 901 return; 902 903 man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM); 904 /* this just adjusts TTM size idea, which sets lpfn to the correct value */ 905 man->size = size >> PAGE_SHIFT; 906 } 907 908 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf) 909 { 910 struct ttm_buffer_object *bo = vmf->vma->vm_private_data; 911 struct radeon_device *rdev = radeon_get_rdev(bo->bdev); 912 vm_fault_t ret; 913 914 down_read(&rdev->pm.mclk_lock); 915 916 ret = ttm_bo_vm_reserve(bo, vmf); 917 if (ret) 918 goto unlock_mclk; 919 920 ret = radeon_bo_fault_reserve_notify(bo); 921 if (ret) 922 goto unlock_resv; 923 924 ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot, 925 TTM_BO_VM_NUM_PREFAULT, 1); 926 if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT)) 927 goto unlock_mclk; 928 929 unlock_resv: 930 dma_resv_unlock(bo->base.resv); 931 932 unlock_mclk: 933 up_read(&rdev->pm.mclk_lock); 934 return ret; 935 } 936 937 static struct vm_operations_struct radeon_ttm_vm_ops = { 938 .fault = radeon_ttm_fault, 939 .open = ttm_bo_vm_open, 940 .close = ttm_bo_vm_close, 941 .access = ttm_bo_vm_access 942 }; 943 944 int radeon_mmap(struct file *filp, struct vm_area_struct *vma) 945 { 946 int r; 947 struct drm_file *file_priv = filp->private_data; 948 struct radeon_device *rdev = file_priv->minor->dev->dev_private; 949 950 if (rdev == NULL) 951 return -EINVAL; 952 953 r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev); 954 if (unlikely(r != 0)) 955 return r; 956 957 vma->vm_ops = &radeon_ttm_vm_ops; 958 return 0; 959 } 960 961 #if defined(CONFIG_DEBUG_FS) 962 963 static int radeon_mm_dump_table(struct seq_file *m, void *data) 964 { 965 struct drm_info_node *node = (struct drm_info_node *)m->private; 966 unsigned ttm_pl = *(int*)node->info_ent->data; 967 struct drm_device *dev = node->minor->dev; 968 struct radeon_device *rdev = dev->dev_private; 969 struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, ttm_pl); 970 struct drm_printer p = drm_seq_file_printer(m); 971 972 man->func->debug(man, &p); 973 return 0; 974 } 975 976 977 static int ttm_pl_vram = TTM_PL_VRAM; 978 static int ttm_pl_tt = TTM_PL_TT; 979 980 static struct drm_info_list radeon_ttm_debugfs_list[] = { 981 {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram}, 982 {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt}, 983 {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL}, 984 #ifdef CONFIG_SWIOTLB 985 {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL} 986 #endif 987 }; 988 989 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep) 990 { 991 struct radeon_device *rdev = inode->i_private; 992 i_size_write(inode, rdev->mc.mc_vram_size); 993 filep->private_data = inode->i_private; 994 return 0; 995 } 996 997 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf, 998 size_t size, loff_t *pos) 999 { 1000 struct radeon_device *rdev = f->private_data; 1001 ssize_t result = 0; 1002 int r; 1003 1004 if (size & 0x3 || *pos & 0x3) 1005 return -EINVAL; 1006 1007 while (size) { 1008 unsigned long flags; 1009 uint32_t value; 1010 1011 if (*pos >= rdev->mc.mc_vram_size) 1012 return result; 1013 1014 spin_lock_irqsave(&rdev->mmio_idx_lock, flags); 1015 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000); 1016 if (rdev->family >= CHIP_CEDAR) 1017 WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31); 1018 value = RREG32(RADEON_MM_DATA); 1019 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); 1020 1021 r = put_user(value, (uint32_t *)buf); 1022 if (r) 1023 return r; 1024 1025 result += 4; 1026 buf += 4; 1027 *pos += 4; 1028 size -= 4; 1029 } 1030 1031 return result; 1032 } 1033 1034 static const struct file_operations radeon_ttm_vram_fops = { 1035 .owner = THIS_MODULE, 1036 .open = radeon_ttm_vram_open, 1037 .read = radeon_ttm_vram_read, 1038 .llseek = default_llseek 1039 }; 1040 1041 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep) 1042 { 1043 struct radeon_device *rdev = inode->i_private; 1044 i_size_write(inode, rdev->mc.gtt_size); 1045 filep->private_data = inode->i_private; 1046 return 0; 1047 } 1048 1049 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf, 1050 size_t size, loff_t *pos) 1051 { 1052 struct radeon_device *rdev = f->private_data; 1053 ssize_t result = 0; 1054 int r; 1055 1056 while (size) { 1057 loff_t p = *pos / PAGE_SIZE; 1058 unsigned off = *pos & ~PAGE_MASK; 1059 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off); 1060 struct page *page; 1061 void *ptr; 1062 1063 if (p >= rdev->gart.num_cpu_pages) 1064 return result; 1065 1066 page = rdev->gart.pages[p]; 1067 if (page) { 1068 ptr = kmap(page); 1069 ptr += off; 1070 1071 r = copy_to_user(buf, ptr, cur_size); 1072 kunmap(rdev->gart.pages[p]); 1073 } else 1074 r = clear_user(buf, cur_size); 1075 1076 if (r) 1077 return -EFAULT; 1078 1079 result += cur_size; 1080 buf += cur_size; 1081 *pos += cur_size; 1082 size -= cur_size; 1083 } 1084 1085 return result; 1086 } 1087 1088 static const struct file_operations radeon_ttm_gtt_fops = { 1089 .owner = THIS_MODULE, 1090 .open = radeon_ttm_gtt_open, 1091 .read = radeon_ttm_gtt_read, 1092 .llseek = default_llseek 1093 }; 1094 1095 #endif 1096 1097 static int radeon_ttm_debugfs_init(struct radeon_device *rdev) 1098 { 1099 #if defined(CONFIG_DEBUG_FS) 1100 unsigned count; 1101 1102 struct drm_minor *minor = rdev->ddev->primary; 1103 struct dentry *root = minor->debugfs_root; 1104 1105 rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO, 1106 root, rdev, 1107 &radeon_ttm_vram_fops); 1108 1109 rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO, 1110 root, rdev, &radeon_ttm_gtt_fops); 1111 1112 count = ARRAY_SIZE(radeon_ttm_debugfs_list); 1113 1114 #ifdef CONFIG_SWIOTLB 1115 if (!(rdev->need_swiotlb && swiotlb_nr_tbl())) 1116 --count; 1117 #endif 1118 1119 return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count); 1120 #else 1121 1122 return 0; 1123 #endif 1124 } 1125 1126 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev) 1127 { 1128 #if defined(CONFIG_DEBUG_FS) 1129 1130 debugfs_remove(rdev->mman.vram); 1131 rdev->mman.vram = NULL; 1132 1133 debugfs_remove(rdev->mman.gtt); 1134 rdev->mman.gtt = NULL; 1135 #endif 1136 } 1137