1 /* 2 * Copyright 2009 Jerome Glisse. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 19 * USE OR OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * The above copyright notice and this permission notice (including the 22 * next paragraph) shall be included in all copies or substantial portions 23 * of the Software. 24 * 25 */ 26 /* 27 * Authors: 28 * Jerome Glisse <glisse@freedesktop.org> 29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> 30 * Dave Airlie 31 */ 32 33 #include <linux/dma-mapping.h> 34 #include <linux/pagemap.h> 35 #include <linux/pci.h> 36 #include <linux/seq_file.h> 37 #include <linux/slab.h> 38 #include <linux/swap.h> 39 #include <linux/swiotlb.h> 40 41 #include <drm/drm_device.h> 42 #include <drm/drm_file.h> 43 #include <drm/drm_prime.h> 44 #include <drm/radeon_drm.h> 45 #include <drm/ttm/ttm_bo.h> 46 #include <drm/ttm/ttm_placement.h> 47 #include <drm/ttm/ttm_range_manager.h> 48 #include <drm/ttm/ttm_tt.h> 49 50 #include "radeon_reg.h" 51 #include "radeon.h" 52 #include "radeon_ttm.h" 53 54 static void radeon_ttm_debugfs_init(struct radeon_device *rdev); 55 56 static int radeon_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm, 57 struct ttm_resource *bo_mem); 58 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm); 59 60 struct radeon_device *radeon_get_rdev(struct ttm_device *bdev) 61 { 62 struct radeon_mman *mman; 63 struct radeon_device *rdev; 64 65 mman = container_of(bdev, struct radeon_mman, bdev); 66 rdev = container_of(mman, struct radeon_device, mman); 67 return rdev; 68 } 69 70 static int radeon_ttm_init_vram(struct radeon_device *rdev) 71 { 72 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM, 73 false, rdev->mc.real_vram_size >> PAGE_SHIFT); 74 } 75 76 static int radeon_ttm_init_gtt(struct radeon_device *rdev) 77 { 78 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT, 79 true, rdev->mc.gtt_size >> PAGE_SHIFT); 80 } 81 82 static void radeon_evict_flags(struct ttm_buffer_object *bo, 83 struct ttm_placement *placement) 84 { 85 static const struct ttm_place placements = { 86 .fpfn = 0, 87 .lpfn = 0, 88 .mem_type = TTM_PL_SYSTEM, 89 .flags = 0 90 }; 91 92 struct radeon_bo *rbo; 93 94 if (!radeon_ttm_bo_is_radeon_bo(bo)) { 95 placement->placement = &placements; 96 placement->busy_placement = &placements; 97 placement->num_placement = 1; 98 placement->num_busy_placement = 1; 99 return; 100 } 101 rbo = container_of(bo, struct radeon_bo, tbo); 102 switch (bo->resource->mem_type) { 103 case TTM_PL_VRAM: 104 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false) 105 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 106 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size && 107 bo->resource->start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) { 108 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; 109 int i; 110 111 /* Try evicting to the CPU inaccessible part of VRAM 112 * first, but only set GTT as busy placement, so this 113 * BO will be evicted to GTT rather than causing other 114 * BOs to be evicted from VRAM 115 */ 116 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM | 117 RADEON_GEM_DOMAIN_GTT); 118 rbo->placement.num_busy_placement = 0; 119 for (i = 0; i < rbo->placement.num_placement; i++) { 120 if (rbo->placements[i].mem_type == TTM_PL_VRAM) { 121 if (rbo->placements[i].fpfn < fpfn) 122 rbo->placements[i].fpfn = fpfn; 123 } else { 124 rbo->placement.busy_placement = 125 &rbo->placements[i]; 126 rbo->placement.num_busy_placement = 1; 127 } 128 } 129 } else 130 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); 131 break; 132 case TTM_PL_TT: 133 default: 134 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 135 } 136 *placement = rbo->placement; 137 } 138 139 static int radeon_move_blit(struct ttm_buffer_object *bo, 140 bool evict, 141 struct ttm_resource *new_mem, 142 struct ttm_resource *old_mem) 143 { 144 struct radeon_device *rdev; 145 uint64_t old_start, new_start; 146 struct radeon_fence *fence; 147 unsigned num_pages; 148 int r, ridx; 149 150 rdev = radeon_get_rdev(bo->bdev); 151 ridx = radeon_copy_ring_index(rdev); 152 old_start = (u64)old_mem->start << PAGE_SHIFT; 153 new_start = (u64)new_mem->start << PAGE_SHIFT; 154 155 switch (old_mem->mem_type) { 156 case TTM_PL_VRAM: 157 old_start += rdev->mc.vram_start; 158 break; 159 case TTM_PL_TT: 160 old_start += rdev->mc.gtt_start; 161 break; 162 default: 163 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 164 return -EINVAL; 165 } 166 switch (new_mem->mem_type) { 167 case TTM_PL_VRAM: 168 new_start += rdev->mc.vram_start; 169 break; 170 case TTM_PL_TT: 171 new_start += rdev->mc.gtt_start; 172 break; 173 default: 174 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 175 return -EINVAL; 176 } 177 if (!rdev->ring[ridx].ready) { 178 DRM_ERROR("Trying to move memory with ring turned off.\n"); 179 return -EINVAL; 180 } 181 182 BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0); 183 184 num_pages = PFN_UP(new_mem->size) * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); 185 fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv); 186 if (IS_ERR(fence)) 187 return PTR_ERR(fence); 188 189 r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem); 190 radeon_fence_unref(&fence); 191 return r; 192 } 193 194 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, 195 struct ttm_operation_ctx *ctx, 196 struct ttm_resource *new_mem, 197 struct ttm_place *hop) 198 { 199 struct ttm_resource *old_mem = bo->resource; 200 struct radeon_device *rdev; 201 struct radeon_bo *rbo; 202 int r; 203 204 if (new_mem->mem_type == TTM_PL_TT) { 205 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem); 206 if (r) 207 return r; 208 } 209 210 r = ttm_bo_wait_ctx(bo, ctx); 211 if (r) 212 return r; 213 214 rbo = container_of(bo, struct radeon_bo, tbo); 215 rdev = radeon_get_rdev(bo->bdev); 216 if (!old_mem || (old_mem->mem_type == TTM_PL_SYSTEM && 217 bo->ttm == NULL)) { 218 ttm_bo_move_null(bo, new_mem); 219 goto out; 220 } 221 if (old_mem->mem_type == TTM_PL_SYSTEM && 222 new_mem->mem_type == TTM_PL_TT) { 223 ttm_bo_move_null(bo, new_mem); 224 goto out; 225 } 226 227 if (old_mem->mem_type == TTM_PL_TT && 228 new_mem->mem_type == TTM_PL_SYSTEM) { 229 radeon_ttm_tt_unbind(bo->bdev, bo->ttm); 230 ttm_resource_free(bo, &bo->resource); 231 ttm_bo_assign_mem(bo, new_mem); 232 goto out; 233 } 234 if (rdev->ring[radeon_copy_ring_index(rdev)].ready && 235 rdev->asic->copy.copy != NULL) { 236 if ((old_mem->mem_type == TTM_PL_SYSTEM && 237 new_mem->mem_type == TTM_PL_VRAM) || 238 (old_mem->mem_type == TTM_PL_VRAM && 239 new_mem->mem_type == TTM_PL_SYSTEM)) { 240 hop->fpfn = 0; 241 hop->lpfn = 0; 242 hop->mem_type = TTM_PL_TT; 243 hop->flags = 0; 244 return -EMULTIHOP; 245 } 246 247 r = radeon_move_blit(bo, evict, new_mem, old_mem); 248 } else { 249 r = -ENODEV; 250 } 251 252 if (r) { 253 r = ttm_bo_move_memcpy(bo, ctx, new_mem); 254 if (r) 255 return r; 256 } 257 258 out: 259 /* update statistics */ 260 atomic64_add(bo->base.size, &rdev->num_bytes_moved); 261 radeon_bo_move_notify(bo); 262 return 0; 263 } 264 265 static int radeon_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *mem) 266 { 267 struct radeon_device *rdev = radeon_get_rdev(bdev); 268 size_t bus_size = (size_t)mem->size; 269 270 switch (mem->mem_type) { 271 case TTM_PL_SYSTEM: 272 /* system memory */ 273 return 0; 274 case TTM_PL_TT: 275 #if IS_ENABLED(CONFIG_AGP) 276 if (rdev->flags & RADEON_IS_AGP) { 277 /* RADEON_IS_AGP is set only if AGP is active */ 278 mem->bus.offset = (mem->start << PAGE_SHIFT) + 279 rdev->mc.agp_base; 280 mem->bus.is_iomem = !rdev->agp->cant_use_aperture; 281 mem->bus.caching = ttm_write_combined; 282 } 283 #endif 284 break; 285 case TTM_PL_VRAM: 286 mem->bus.offset = mem->start << PAGE_SHIFT; 287 /* check if it's visible */ 288 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size) 289 return -EINVAL; 290 mem->bus.offset += rdev->mc.aper_base; 291 mem->bus.is_iomem = true; 292 mem->bus.caching = ttm_write_combined; 293 #ifdef __alpha__ 294 /* 295 * Alpha: use bus.addr to hold the ioremap() return, 296 * so we can modify bus.base below. 297 */ 298 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size); 299 if (!mem->bus.addr) 300 return -ENOMEM; 301 302 /* 303 * Alpha: Use just the bus offset plus 304 * the hose/domain memory base for bus.base. 305 * It then can be used to build PTEs for VRAM 306 * access, as done in ttm_bo_vm_fault(). 307 */ 308 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) + 309 rdev->hose->dense_mem_base; 310 #endif 311 break; 312 default: 313 return -EINVAL; 314 } 315 return 0; 316 } 317 318 /* 319 * TTM backend functions. 320 */ 321 struct radeon_ttm_tt { 322 struct ttm_tt ttm; 323 u64 offset; 324 325 uint64_t userptr; 326 struct mm_struct *usermm; 327 uint32_t userflags; 328 bool bound; 329 }; 330 331 /* prepare the sg table with the user pages */ 332 static int radeon_ttm_tt_pin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm) 333 { 334 struct radeon_device *rdev = radeon_get_rdev(bdev); 335 struct radeon_ttm_tt *gtt = (void *)ttm; 336 unsigned pinned = 0; 337 int r; 338 339 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 340 enum dma_data_direction direction = write ? 341 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 342 343 if (current->mm != gtt->usermm) 344 return -EPERM; 345 346 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) { 347 /* check that we only pin down anonymous memory 348 to prevent problems with writeback */ 349 unsigned long end = gtt->userptr + (u64)ttm->num_pages * PAGE_SIZE; 350 struct vm_area_struct *vma; 351 vma = find_vma(gtt->usermm, gtt->userptr); 352 if (!vma || vma->vm_file || vma->vm_end < end) 353 return -EPERM; 354 } 355 356 do { 357 unsigned num_pages = ttm->num_pages - pinned; 358 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE; 359 struct page **pages = ttm->pages + pinned; 360 361 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0, 362 pages); 363 if (r < 0) 364 goto release_pages; 365 366 pinned += r; 367 368 } while (pinned < ttm->num_pages); 369 370 r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0, 371 (u64)ttm->num_pages << PAGE_SHIFT, 372 GFP_KERNEL); 373 if (r) 374 goto release_sg; 375 376 r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0); 377 if (r) 378 goto release_sg; 379 380 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, 381 ttm->num_pages); 382 383 return 0; 384 385 release_sg: 386 kfree(ttm->sg); 387 388 release_pages: 389 release_pages(ttm->pages, pinned); 390 return r; 391 } 392 393 static void radeon_ttm_tt_unpin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm) 394 { 395 struct radeon_device *rdev = radeon_get_rdev(bdev); 396 struct radeon_ttm_tt *gtt = (void *)ttm; 397 struct sg_page_iter sg_iter; 398 399 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 400 enum dma_data_direction direction = write ? 401 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 402 403 /* double check that we don't free the table twice */ 404 if (!ttm->sg || !ttm->sg->sgl) 405 return; 406 407 /* free the sg table and pages again */ 408 dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0); 409 410 for_each_sgtable_page(ttm->sg, &sg_iter, 0) { 411 struct page *page = sg_page_iter_page(&sg_iter); 412 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY)) 413 set_page_dirty(page); 414 415 mark_page_accessed(page); 416 put_page(page); 417 } 418 419 sg_free_table(ttm->sg); 420 } 421 422 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm) 423 { 424 struct radeon_ttm_tt *gtt = (void*)ttm; 425 426 return (gtt->bound); 427 } 428 429 static int radeon_ttm_backend_bind(struct ttm_device *bdev, 430 struct ttm_tt *ttm, 431 struct ttm_resource *bo_mem) 432 { 433 struct radeon_ttm_tt *gtt = (void*)ttm; 434 struct radeon_device *rdev = radeon_get_rdev(bdev); 435 uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ | 436 RADEON_GART_PAGE_WRITE; 437 int r; 438 439 if (gtt->bound) 440 return 0; 441 442 if (gtt->userptr) { 443 radeon_ttm_tt_pin_userptr(bdev, ttm); 444 flags &= ~RADEON_GART_PAGE_WRITE; 445 } 446 447 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT); 448 if (!ttm->num_pages) { 449 WARN(1, "nothing to bind %u pages for mreg %p back %p!\n", 450 ttm->num_pages, bo_mem, ttm); 451 } 452 if (ttm->caching == ttm_cached) 453 flags |= RADEON_GART_PAGE_SNOOP; 454 r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages, 455 ttm->pages, gtt->ttm.dma_address, flags); 456 if (r) { 457 DRM_ERROR("failed to bind %u pages at 0x%08X\n", 458 ttm->num_pages, (unsigned)gtt->offset); 459 return r; 460 } 461 gtt->bound = true; 462 return 0; 463 } 464 465 static void radeon_ttm_backend_unbind(struct ttm_device *bdev, struct ttm_tt *ttm) 466 { 467 struct radeon_ttm_tt *gtt = (void *)ttm; 468 struct radeon_device *rdev = radeon_get_rdev(bdev); 469 470 if (gtt->userptr) 471 radeon_ttm_tt_unpin_userptr(bdev, ttm); 472 473 if (!gtt->bound) 474 return; 475 476 radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages); 477 478 gtt->bound = false; 479 } 480 481 static void radeon_ttm_backend_destroy(struct ttm_device *bdev, struct ttm_tt *ttm) 482 { 483 struct radeon_ttm_tt *gtt = (void *)ttm; 484 485 ttm_tt_fini(>t->ttm); 486 kfree(gtt); 487 } 488 489 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, 490 uint32_t page_flags) 491 { 492 struct radeon_ttm_tt *gtt; 493 enum ttm_caching caching; 494 struct radeon_bo *rbo; 495 #if IS_ENABLED(CONFIG_AGP) 496 struct radeon_device *rdev = radeon_get_rdev(bo->bdev); 497 498 if (rdev->flags & RADEON_IS_AGP) { 499 return ttm_agp_tt_create(bo, rdev->agp->bridge, page_flags); 500 } 501 #endif 502 rbo = container_of(bo, struct radeon_bo, tbo); 503 504 gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); 505 if (gtt == NULL) { 506 return NULL; 507 } 508 509 if (rbo->flags & RADEON_GEM_GTT_UC) 510 caching = ttm_uncached; 511 else if (rbo->flags & RADEON_GEM_GTT_WC) 512 caching = ttm_write_combined; 513 else 514 caching = ttm_cached; 515 516 if (ttm_sg_tt_init(>t->ttm, bo, page_flags, caching)) { 517 kfree(gtt); 518 return NULL; 519 } 520 return >t->ttm; 521 } 522 523 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev, 524 struct ttm_tt *ttm) 525 { 526 #if IS_ENABLED(CONFIG_AGP) 527 if (rdev->flags & RADEON_IS_AGP) 528 return NULL; 529 #endif 530 531 if (!ttm) 532 return NULL; 533 return container_of(ttm, struct radeon_ttm_tt, ttm); 534 } 535 536 static int radeon_ttm_tt_populate(struct ttm_device *bdev, 537 struct ttm_tt *ttm, 538 struct ttm_operation_ctx *ctx) 539 { 540 struct radeon_device *rdev = radeon_get_rdev(bdev); 541 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 542 bool slave = !!(ttm->page_flags & TTM_TT_FLAG_EXTERNAL); 543 544 if (gtt && gtt->userptr) { 545 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL); 546 if (!ttm->sg) 547 return -ENOMEM; 548 549 ttm->page_flags |= TTM_TT_FLAG_EXTERNAL; 550 return 0; 551 } 552 553 if (slave && ttm->sg) { 554 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, 555 ttm->num_pages); 556 return 0; 557 } 558 559 return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx); 560 } 561 562 static void radeon_ttm_tt_unpopulate(struct ttm_device *bdev, struct ttm_tt *ttm) 563 { 564 struct radeon_device *rdev = radeon_get_rdev(bdev); 565 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 566 bool slave = !!(ttm->page_flags & TTM_TT_FLAG_EXTERNAL); 567 568 radeon_ttm_tt_unbind(bdev, ttm); 569 570 if (gtt && gtt->userptr) { 571 kfree(ttm->sg); 572 ttm->page_flags &= ~TTM_TT_FLAG_EXTERNAL; 573 return; 574 } 575 576 if (slave) 577 return; 578 579 return ttm_pool_free(&rdev->mman.bdev.pool, ttm); 580 } 581 582 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev, 583 struct ttm_tt *ttm, uint64_t addr, 584 uint32_t flags) 585 { 586 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 587 588 if (gtt == NULL) 589 return -EINVAL; 590 591 gtt->userptr = addr; 592 gtt->usermm = current->mm; 593 gtt->userflags = flags; 594 return 0; 595 } 596 597 bool radeon_ttm_tt_is_bound(struct ttm_device *bdev, 598 struct ttm_tt *ttm) 599 { 600 #if IS_ENABLED(CONFIG_AGP) 601 struct radeon_device *rdev = radeon_get_rdev(bdev); 602 if (rdev->flags & RADEON_IS_AGP) 603 return ttm_agp_is_bound(ttm); 604 #endif 605 return radeon_ttm_backend_is_bound(ttm); 606 } 607 608 static int radeon_ttm_tt_bind(struct ttm_device *bdev, 609 struct ttm_tt *ttm, 610 struct ttm_resource *bo_mem) 611 { 612 #if IS_ENABLED(CONFIG_AGP) 613 struct radeon_device *rdev = radeon_get_rdev(bdev); 614 #endif 615 616 if (!bo_mem) 617 return -EINVAL; 618 #if IS_ENABLED(CONFIG_AGP) 619 if (rdev->flags & RADEON_IS_AGP) 620 return ttm_agp_bind(ttm, bo_mem); 621 #endif 622 623 return radeon_ttm_backend_bind(bdev, ttm, bo_mem); 624 } 625 626 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, 627 struct ttm_tt *ttm) 628 { 629 #if IS_ENABLED(CONFIG_AGP) 630 struct radeon_device *rdev = radeon_get_rdev(bdev); 631 632 if (rdev->flags & RADEON_IS_AGP) { 633 ttm_agp_unbind(ttm); 634 return; 635 } 636 #endif 637 radeon_ttm_backend_unbind(bdev, ttm); 638 } 639 640 static void radeon_ttm_tt_destroy(struct ttm_device *bdev, 641 struct ttm_tt *ttm) 642 { 643 #if IS_ENABLED(CONFIG_AGP) 644 struct radeon_device *rdev = radeon_get_rdev(bdev); 645 646 if (rdev->flags & RADEON_IS_AGP) { 647 ttm_agp_destroy(ttm); 648 return; 649 } 650 #endif 651 radeon_ttm_backend_destroy(bdev, ttm); 652 } 653 654 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev, 655 struct ttm_tt *ttm) 656 { 657 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 658 659 if (gtt == NULL) 660 return false; 661 662 return !!gtt->userptr; 663 } 664 665 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev, 666 struct ttm_tt *ttm) 667 { 668 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 669 670 if (gtt == NULL) 671 return false; 672 673 return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 674 } 675 676 static struct ttm_device_funcs radeon_bo_driver = { 677 .ttm_tt_create = &radeon_ttm_tt_create, 678 .ttm_tt_populate = &radeon_ttm_tt_populate, 679 .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate, 680 .ttm_tt_destroy = &radeon_ttm_tt_destroy, 681 .eviction_valuable = ttm_bo_eviction_valuable, 682 .evict_flags = &radeon_evict_flags, 683 .move = &radeon_bo_move, 684 .io_mem_reserve = &radeon_ttm_io_mem_reserve, 685 }; 686 687 int radeon_ttm_init(struct radeon_device *rdev) 688 { 689 int r; 690 691 /* No others user of address space so set it to 0 */ 692 r = ttm_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev, 693 rdev->ddev->anon_inode->i_mapping, 694 rdev->ddev->vma_offset_manager, 695 rdev->need_swiotlb, 696 dma_addressing_limited(&rdev->pdev->dev)); 697 if (r) { 698 DRM_ERROR("failed initializing buffer object driver(%d).\n", r); 699 return r; 700 } 701 rdev->mman.initialized = true; 702 703 r = radeon_ttm_init_vram(rdev); 704 if (r) { 705 DRM_ERROR("Failed initializing VRAM heap.\n"); 706 return r; 707 } 708 /* Change the size here instead of the init above so only lpfn is affected */ 709 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); 710 711 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true, 712 RADEON_GEM_DOMAIN_VRAM, 0, NULL, 713 NULL, &rdev->stolen_vga_memory); 714 if (r) { 715 return r; 716 } 717 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 718 if (r) 719 return r; 720 r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL); 721 radeon_bo_unreserve(rdev->stolen_vga_memory); 722 if (r) { 723 radeon_bo_unref(&rdev->stolen_vga_memory); 724 return r; 725 } 726 DRM_INFO("radeon: %uM of VRAM memory ready\n", 727 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024))); 728 729 r = radeon_ttm_init_gtt(rdev); 730 if (r) { 731 DRM_ERROR("Failed initializing GTT heap.\n"); 732 return r; 733 } 734 DRM_INFO("radeon: %uM of GTT memory ready.\n", 735 (unsigned)(rdev->mc.gtt_size / (1024 * 1024))); 736 737 radeon_ttm_debugfs_init(rdev); 738 739 return 0; 740 } 741 742 void radeon_ttm_fini(struct radeon_device *rdev) 743 { 744 int r; 745 746 if (!rdev->mman.initialized) 747 return; 748 749 if (rdev->stolen_vga_memory) { 750 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 751 if (r == 0) { 752 radeon_bo_unpin(rdev->stolen_vga_memory); 753 radeon_bo_unreserve(rdev->stolen_vga_memory); 754 } 755 radeon_bo_unref(&rdev->stolen_vga_memory); 756 } 757 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM); 758 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT); 759 ttm_device_fini(&rdev->mman.bdev); 760 radeon_gart_fini(rdev); 761 rdev->mman.initialized = false; 762 DRM_INFO("radeon: ttm finalized\n"); 763 } 764 765 /* this should only be called at bootup or when userspace 766 * isn't running */ 767 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size) 768 { 769 struct ttm_resource_manager *man; 770 771 if (!rdev->mman.initialized) 772 return; 773 774 man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM); 775 /* this just adjusts TTM size idea, which sets lpfn to the correct value */ 776 man->size = size >> PAGE_SHIFT; 777 } 778 779 #if defined(CONFIG_DEBUG_FS) 780 781 static int radeon_ttm_page_pool_show(struct seq_file *m, void *data) 782 { 783 struct radeon_device *rdev = (struct radeon_device *)m->private; 784 785 return ttm_pool_debugfs(&rdev->mman.bdev.pool, m); 786 } 787 788 DEFINE_SHOW_ATTRIBUTE(radeon_ttm_page_pool); 789 790 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep) 791 { 792 struct radeon_device *rdev = inode->i_private; 793 i_size_write(inode, rdev->mc.mc_vram_size); 794 filep->private_data = inode->i_private; 795 return 0; 796 } 797 798 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf, 799 size_t size, loff_t *pos) 800 { 801 struct radeon_device *rdev = f->private_data; 802 ssize_t result = 0; 803 int r; 804 805 if (size & 0x3 || *pos & 0x3) 806 return -EINVAL; 807 808 while (size) { 809 unsigned long flags; 810 uint32_t value; 811 812 if (*pos >= rdev->mc.mc_vram_size) 813 return result; 814 815 spin_lock_irqsave(&rdev->mmio_idx_lock, flags); 816 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000); 817 if (rdev->family >= CHIP_CEDAR) 818 WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31); 819 value = RREG32(RADEON_MM_DATA); 820 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); 821 822 r = put_user(value, (uint32_t __user *)buf); 823 if (r) 824 return r; 825 826 result += 4; 827 buf += 4; 828 *pos += 4; 829 size -= 4; 830 } 831 832 return result; 833 } 834 835 static const struct file_operations radeon_ttm_vram_fops = { 836 .owner = THIS_MODULE, 837 .open = radeon_ttm_vram_open, 838 .read = radeon_ttm_vram_read, 839 .llseek = default_llseek 840 }; 841 842 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep) 843 { 844 struct radeon_device *rdev = inode->i_private; 845 i_size_write(inode, rdev->mc.gtt_size); 846 filep->private_data = inode->i_private; 847 return 0; 848 } 849 850 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf, 851 size_t size, loff_t *pos) 852 { 853 struct radeon_device *rdev = f->private_data; 854 ssize_t result = 0; 855 int r; 856 857 while (size) { 858 loff_t p = *pos / PAGE_SIZE; 859 unsigned off = *pos & ~PAGE_MASK; 860 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off); 861 struct page *page; 862 void *ptr; 863 864 if (p >= rdev->gart.num_cpu_pages) 865 return result; 866 867 page = rdev->gart.pages[p]; 868 if (page) { 869 ptr = kmap_local_page(page); 870 ptr += off; 871 872 r = copy_to_user(buf, ptr, cur_size); 873 kunmap_local(ptr); 874 } else 875 r = clear_user(buf, cur_size); 876 877 if (r) 878 return -EFAULT; 879 880 result += cur_size; 881 buf += cur_size; 882 *pos += cur_size; 883 size -= cur_size; 884 } 885 886 return result; 887 } 888 889 static const struct file_operations radeon_ttm_gtt_fops = { 890 .owner = THIS_MODULE, 891 .open = radeon_ttm_gtt_open, 892 .read = radeon_ttm_gtt_read, 893 .llseek = default_llseek 894 }; 895 896 #endif 897 898 static void radeon_ttm_debugfs_init(struct radeon_device *rdev) 899 { 900 #if defined(CONFIG_DEBUG_FS) 901 struct drm_minor *minor = rdev->ddev->primary; 902 struct dentry *root = minor->debugfs_root; 903 904 debugfs_create_file("radeon_vram", 0444, root, rdev, 905 &radeon_ttm_vram_fops); 906 debugfs_create_file("radeon_gtt", 0444, root, rdev, 907 &radeon_ttm_gtt_fops); 908 debugfs_create_file("ttm_page_pool", 0444, root, rdev, 909 &radeon_ttm_page_pool_fops); 910 ttm_resource_manager_create_debugfs(ttm_manager_type(&rdev->mman.bdev, 911 TTM_PL_VRAM), 912 root, "radeon_vram_mm"); 913 ttm_resource_manager_create_debugfs(ttm_manager_type(&rdev->mman.bdev, 914 TTM_PL_TT), 915 root, "radeon_gtt_mm"); 916 #endif 917 } 918