1 /* 2 * Copyright 2009 Jerome Glisse. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 19 * USE OR OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * The above copyright notice and this permission notice (including the 22 * next paragraph) shall be included in all copies or substantial portions 23 * of the Software. 24 * 25 */ 26 /* 27 * Authors: 28 * Jerome Glisse <glisse@freedesktop.org> 29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> 30 * Dave Airlie 31 */ 32 33 #include <linux/dma-mapping.h> 34 #include <linux/pagemap.h> 35 #include <linux/pci.h> 36 #include <linux/seq_file.h> 37 #include <linux/slab.h> 38 #include <linux/swap.h> 39 #include <linux/swiotlb.h> 40 41 #include <drm/drm_agpsupport.h> 42 #include <drm/drm_debugfs.h> 43 #include <drm/drm_device.h> 44 #include <drm/drm_file.h> 45 #include <drm/drm_prime.h> 46 #include <drm/radeon_drm.h> 47 #include <drm/ttm/ttm_bo_api.h> 48 #include <drm/ttm/ttm_bo_driver.h> 49 #include <drm/ttm/ttm_module.h> 50 #include <drm/ttm/ttm_placement.h> 51 52 #include "radeon_reg.h" 53 #include "radeon.h" 54 #include "radeon_ttm.h" 55 56 static int radeon_ttm_debugfs_init(struct radeon_device *rdev); 57 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev); 58 59 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev, 60 struct ttm_tt *ttm, 61 struct ttm_resource *bo_mem); 62 static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev, 63 struct ttm_tt *ttm); 64 65 struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev) 66 { 67 struct radeon_mman *mman; 68 struct radeon_device *rdev; 69 70 mman = container_of(bdev, struct radeon_mman, bdev); 71 rdev = container_of(mman, struct radeon_device, mman); 72 return rdev; 73 } 74 75 static int radeon_ttm_init_vram(struct radeon_device *rdev) 76 { 77 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM, 78 false, rdev->mc.real_vram_size >> PAGE_SHIFT); 79 } 80 81 static int radeon_ttm_init_gtt(struct radeon_device *rdev) 82 { 83 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT, 84 true, rdev->mc.gtt_size >> PAGE_SHIFT); 85 } 86 87 static void radeon_evict_flags(struct ttm_buffer_object *bo, 88 struct ttm_placement *placement) 89 { 90 static const struct ttm_place placements = { 91 .fpfn = 0, 92 .lpfn = 0, 93 .mem_type = TTM_PL_SYSTEM, 94 .flags = 0 95 }; 96 97 struct radeon_bo *rbo; 98 99 if (!radeon_ttm_bo_is_radeon_bo(bo)) { 100 placement->placement = &placements; 101 placement->busy_placement = &placements; 102 placement->num_placement = 1; 103 placement->num_busy_placement = 1; 104 return; 105 } 106 rbo = container_of(bo, struct radeon_bo, tbo); 107 switch (bo->mem.mem_type) { 108 case TTM_PL_VRAM: 109 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false) 110 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 111 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size && 112 bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) { 113 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; 114 int i; 115 116 /* Try evicting to the CPU inaccessible part of VRAM 117 * first, but only set GTT as busy placement, so this 118 * BO will be evicted to GTT rather than causing other 119 * BOs to be evicted from VRAM 120 */ 121 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM | 122 RADEON_GEM_DOMAIN_GTT); 123 rbo->placement.num_busy_placement = 0; 124 for (i = 0; i < rbo->placement.num_placement; i++) { 125 if (rbo->placements[i].mem_type == TTM_PL_VRAM) { 126 if (rbo->placements[i].fpfn < fpfn) 127 rbo->placements[i].fpfn = fpfn; 128 } else { 129 rbo->placement.busy_placement = 130 &rbo->placements[i]; 131 rbo->placement.num_busy_placement = 1; 132 } 133 } 134 } else 135 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); 136 break; 137 case TTM_PL_TT: 138 default: 139 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 140 } 141 *placement = rbo->placement; 142 } 143 144 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp) 145 { 146 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo); 147 struct radeon_device *rdev = radeon_get_rdev(bo->bdev); 148 149 if (radeon_ttm_tt_has_userptr(rdev, bo->ttm)) 150 return -EPERM; 151 return drm_vma_node_verify_access(&rbo->tbo.base.vma_node, 152 filp->private_data); 153 } 154 155 static int radeon_move_blit(struct ttm_buffer_object *bo, 156 bool evict, 157 struct ttm_resource *new_mem, 158 struct ttm_resource *old_mem) 159 { 160 struct radeon_device *rdev; 161 uint64_t old_start, new_start; 162 struct radeon_fence *fence; 163 unsigned num_pages; 164 int r, ridx; 165 166 rdev = radeon_get_rdev(bo->bdev); 167 ridx = radeon_copy_ring_index(rdev); 168 old_start = (u64)old_mem->start << PAGE_SHIFT; 169 new_start = (u64)new_mem->start << PAGE_SHIFT; 170 171 switch (old_mem->mem_type) { 172 case TTM_PL_VRAM: 173 old_start += rdev->mc.vram_start; 174 break; 175 case TTM_PL_TT: 176 old_start += rdev->mc.gtt_start; 177 break; 178 default: 179 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 180 return -EINVAL; 181 } 182 switch (new_mem->mem_type) { 183 case TTM_PL_VRAM: 184 new_start += rdev->mc.vram_start; 185 break; 186 case TTM_PL_TT: 187 new_start += rdev->mc.gtt_start; 188 break; 189 default: 190 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 191 return -EINVAL; 192 } 193 if (!rdev->ring[ridx].ready) { 194 DRM_ERROR("Trying to move memory with ring turned off.\n"); 195 return -EINVAL; 196 } 197 198 BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0); 199 200 num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); 201 fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv); 202 if (IS_ERR(fence)) 203 return PTR_ERR(fence); 204 205 r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem); 206 radeon_fence_unref(&fence); 207 return r; 208 } 209 210 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, 211 struct ttm_operation_ctx *ctx, 212 struct ttm_resource *new_mem, 213 struct ttm_place *hop) 214 { 215 struct radeon_device *rdev; 216 struct radeon_bo *rbo; 217 struct ttm_resource *old_mem = &bo->mem; 218 int r; 219 220 if (new_mem->mem_type == TTM_PL_TT) { 221 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem); 222 if (r) 223 return r; 224 } 225 226 r = ttm_bo_wait_ctx(bo, ctx); 227 if (r) 228 return r; 229 230 /* Can't move a pinned BO */ 231 rbo = container_of(bo, struct radeon_bo, tbo); 232 if (WARN_ON_ONCE(rbo->tbo.pin_count > 0)) 233 return -EINVAL; 234 235 rdev = radeon_get_rdev(bo->bdev); 236 if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) { 237 ttm_bo_move_null(bo, new_mem); 238 goto out; 239 } 240 if (old_mem->mem_type == TTM_PL_SYSTEM && 241 new_mem->mem_type == TTM_PL_TT) { 242 ttm_bo_move_null(bo, new_mem); 243 goto out; 244 } 245 246 if (old_mem->mem_type == TTM_PL_TT && 247 new_mem->mem_type == TTM_PL_SYSTEM) { 248 radeon_ttm_tt_unbind(bo->bdev, bo->ttm); 249 ttm_resource_free(bo, &bo->mem); 250 ttm_bo_assign_mem(bo, new_mem); 251 goto out; 252 } 253 if (rdev->ring[radeon_copy_ring_index(rdev)].ready && 254 rdev->asic->copy.copy != NULL) { 255 if ((old_mem->mem_type == TTM_PL_SYSTEM && 256 new_mem->mem_type == TTM_PL_VRAM) || 257 (old_mem->mem_type == TTM_PL_VRAM && 258 new_mem->mem_type == TTM_PL_SYSTEM)) { 259 hop->fpfn = 0; 260 hop->lpfn = 0; 261 hop->mem_type = TTM_PL_TT; 262 hop->flags = 0; 263 return -EMULTIHOP; 264 } 265 266 r = radeon_move_blit(bo, evict, new_mem, old_mem); 267 } else { 268 r = -ENODEV; 269 } 270 271 if (r) { 272 r = ttm_bo_move_memcpy(bo, ctx, new_mem); 273 if (r) 274 return r; 275 } 276 277 out: 278 /* update statistics */ 279 atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved); 280 radeon_bo_move_notify(bo, evict, new_mem); 281 return 0; 282 } 283 284 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *mem) 285 { 286 struct radeon_device *rdev = radeon_get_rdev(bdev); 287 size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT; 288 289 switch (mem->mem_type) { 290 case TTM_PL_SYSTEM: 291 /* system memory */ 292 return 0; 293 case TTM_PL_TT: 294 #if IS_ENABLED(CONFIG_AGP) 295 if (rdev->flags & RADEON_IS_AGP) { 296 /* RADEON_IS_AGP is set only if AGP is active */ 297 mem->bus.offset = (mem->start << PAGE_SHIFT) + 298 rdev->mc.agp_base; 299 mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture; 300 mem->bus.caching = ttm_write_combined; 301 } 302 #endif 303 break; 304 case TTM_PL_VRAM: 305 mem->bus.offset = mem->start << PAGE_SHIFT; 306 /* check if it's visible */ 307 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size) 308 return -EINVAL; 309 mem->bus.offset += rdev->mc.aper_base; 310 mem->bus.is_iomem = true; 311 mem->bus.caching = ttm_write_combined; 312 #ifdef __alpha__ 313 /* 314 * Alpha: use bus.addr to hold the ioremap() return, 315 * so we can modify bus.base below. 316 */ 317 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size); 318 if (!mem->bus.addr) 319 return -ENOMEM; 320 321 /* 322 * Alpha: Use just the bus offset plus 323 * the hose/domain memory base for bus.base. 324 * It then can be used to build PTEs for VRAM 325 * access, as done in ttm_bo_vm_fault(). 326 */ 327 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) + 328 rdev->ddev->hose->dense_mem_base; 329 #endif 330 break; 331 default: 332 return -EINVAL; 333 } 334 return 0; 335 } 336 337 /* 338 * TTM backend functions. 339 */ 340 struct radeon_ttm_tt { 341 struct ttm_tt ttm; 342 u64 offset; 343 344 uint64_t userptr; 345 struct mm_struct *usermm; 346 uint32_t userflags; 347 bool bound; 348 }; 349 350 /* prepare the sg table with the user pages */ 351 static int radeon_ttm_tt_pin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm) 352 { 353 struct radeon_device *rdev = radeon_get_rdev(bdev); 354 struct radeon_ttm_tt *gtt = (void *)ttm; 355 unsigned pinned = 0; 356 int r; 357 358 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 359 enum dma_data_direction direction = write ? 360 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 361 362 if (current->mm != gtt->usermm) 363 return -EPERM; 364 365 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) { 366 /* check that we only pin down anonymous memory 367 to prevent problems with writeback */ 368 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE; 369 struct vm_area_struct *vma; 370 vma = find_vma(gtt->usermm, gtt->userptr); 371 if (!vma || vma->vm_file || vma->vm_end < end) 372 return -EPERM; 373 } 374 375 do { 376 unsigned num_pages = ttm->num_pages - pinned; 377 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE; 378 struct page **pages = ttm->pages + pinned; 379 380 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0, 381 pages, NULL); 382 if (r < 0) 383 goto release_pages; 384 385 pinned += r; 386 387 } while (pinned < ttm->num_pages); 388 389 r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0, 390 ttm->num_pages << PAGE_SHIFT, 391 GFP_KERNEL); 392 if (r) 393 goto release_sg; 394 395 r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0); 396 if (r) 397 goto release_sg; 398 399 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages, 400 gtt->ttm.dma_address, ttm->num_pages); 401 402 return 0; 403 404 release_sg: 405 kfree(ttm->sg); 406 407 release_pages: 408 release_pages(ttm->pages, pinned); 409 return r; 410 } 411 412 static void radeon_ttm_tt_unpin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm) 413 { 414 struct radeon_device *rdev = radeon_get_rdev(bdev); 415 struct radeon_ttm_tt *gtt = (void *)ttm; 416 struct sg_page_iter sg_iter; 417 418 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 419 enum dma_data_direction direction = write ? 420 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 421 422 /* double check that we don't free the table twice */ 423 if (!ttm->sg->sgl) 424 return; 425 426 /* free the sg table and pages again */ 427 dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0); 428 429 for_each_sgtable_page(ttm->sg, &sg_iter, 0) { 430 struct page *page = sg_page_iter_page(&sg_iter); 431 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY)) 432 set_page_dirty(page); 433 434 mark_page_accessed(page); 435 put_page(page); 436 } 437 438 sg_free_table(ttm->sg); 439 } 440 441 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm) 442 { 443 struct radeon_ttm_tt *gtt = (void*)ttm; 444 445 return (gtt->bound); 446 } 447 448 static int radeon_ttm_backend_bind(struct ttm_bo_device *bdev, 449 struct ttm_tt *ttm, 450 struct ttm_resource *bo_mem) 451 { 452 struct radeon_ttm_tt *gtt = (void*)ttm; 453 struct radeon_device *rdev = radeon_get_rdev(bdev); 454 uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ | 455 RADEON_GART_PAGE_WRITE; 456 int r; 457 458 if (gtt->bound) 459 return 0; 460 461 if (gtt->userptr) { 462 radeon_ttm_tt_pin_userptr(bdev, ttm); 463 flags &= ~RADEON_GART_PAGE_WRITE; 464 } 465 466 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT); 467 if (!ttm->num_pages) { 468 WARN(1, "nothing to bind %u pages for mreg %p back %p!\n", 469 ttm->num_pages, bo_mem, ttm); 470 } 471 if (ttm->caching == ttm_cached) 472 flags |= RADEON_GART_PAGE_SNOOP; 473 r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages, 474 ttm->pages, gtt->ttm.dma_address, flags); 475 if (r) { 476 DRM_ERROR("failed to bind %u pages at 0x%08X\n", 477 ttm->num_pages, (unsigned)gtt->offset); 478 return r; 479 } 480 gtt->bound = true; 481 return 0; 482 } 483 484 static void radeon_ttm_backend_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm) 485 { 486 struct radeon_ttm_tt *gtt = (void *)ttm; 487 struct radeon_device *rdev = radeon_get_rdev(bdev); 488 489 if (!gtt->bound) 490 return; 491 492 radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages); 493 494 if (gtt->userptr) 495 radeon_ttm_tt_unpin_userptr(bdev, ttm); 496 gtt->bound = false; 497 } 498 499 static void radeon_ttm_backend_destroy(struct ttm_bo_device *bdev, struct ttm_tt *ttm) 500 { 501 struct radeon_ttm_tt *gtt = (void *)ttm; 502 503 radeon_ttm_backend_unbind(bdev, ttm); 504 ttm_tt_destroy_common(bdev, ttm); 505 506 ttm_tt_fini(>t->ttm); 507 kfree(gtt); 508 } 509 510 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, 511 uint32_t page_flags) 512 { 513 struct radeon_ttm_tt *gtt; 514 enum ttm_caching caching; 515 struct radeon_bo *rbo; 516 #if IS_ENABLED(CONFIG_AGP) 517 struct radeon_device *rdev = radeon_get_rdev(bo->bdev); 518 519 if (rdev->flags & RADEON_IS_AGP) { 520 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge, 521 page_flags); 522 } 523 #endif 524 rbo = container_of(bo, struct radeon_bo, tbo); 525 526 gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); 527 if (gtt == NULL) { 528 return NULL; 529 } 530 531 if (rbo->flags & RADEON_GEM_GTT_UC) 532 caching = ttm_uncached; 533 else if (rbo->flags & RADEON_GEM_GTT_WC) 534 caching = ttm_write_combined; 535 else 536 caching = ttm_cached; 537 538 if (ttm_dma_tt_init(>t->ttm, bo, page_flags, caching)) { 539 kfree(gtt); 540 return NULL; 541 } 542 return >t->ttm; 543 } 544 545 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev, 546 struct ttm_tt *ttm) 547 { 548 #if IS_ENABLED(CONFIG_AGP) 549 if (rdev->flags & RADEON_IS_AGP) 550 return NULL; 551 #endif 552 553 if (!ttm) 554 return NULL; 555 return container_of(ttm, struct radeon_ttm_tt, ttm); 556 } 557 558 static int radeon_ttm_tt_populate(struct ttm_bo_device *bdev, 559 struct ttm_tt *ttm, 560 struct ttm_operation_ctx *ctx) 561 { 562 struct radeon_device *rdev = radeon_get_rdev(bdev); 563 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 564 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); 565 566 if (gtt && gtt->userptr) { 567 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL); 568 if (!ttm->sg) 569 return -ENOMEM; 570 571 ttm->page_flags |= TTM_PAGE_FLAG_SG; 572 return 0; 573 } 574 575 if (slave && ttm->sg) { 576 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages, 577 gtt->ttm.dma_address, ttm->num_pages); 578 return 0; 579 } 580 581 return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx); 582 } 583 584 static void radeon_ttm_tt_unpopulate(struct ttm_bo_device *bdev, struct ttm_tt *ttm) 585 { 586 struct radeon_device *rdev = radeon_get_rdev(bdev); 587 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 588 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); 589 590 if (gtt && gtt->userptr) { 591 kfree(ttm->sg); 592 ttm->page_flags &= ~TTM_PAGE_FLAG_SG; 593 return; 594 } 595 596 if (slave) 597 return; 598 599 return ttm_pool_free(&rdev->mman.bdev.pool, ttm); 600 } 601 602 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev, 603 struct ttm_tt *ttm, uint64_t addr, 604 uint32_t flags) 605 { 606 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 607 608 if (gtt == NULL) 609 return -EINVAL; 610 611 gtt->userptr = addr; 612 gtt->usermm = current->mm; 613 gtt->userflags = flags; 614 return 0; 615 } 616 617 bool radeon_ttm_tt_is_bound(struct ttm_bo_device *bdev, 618 struct ttm_tt *ttm) 619 { 620 #if IS_ENABLED(CONFIG_AGP) 621 struct radeon_device *rdev = radeon_get_rdev(bdev); 622 if (rdev->flags & RADEON_IS_AGP) 623 return ttm_agp_is_bound(ttm); 624 #endif 625 return radeon_ttm_backend_is_bound(ttm); 626 } 627 628 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev, 629 struct ttm_tt *ttm, 630 struct ttm_resource *bo_mem) 631 { 632 #if IS_ENABLED(CONFIG_AGP) 633 struct radeon_device *rdev = radeon_get_rdev(bdev); 634 #endif 635 636 if (!bo_mem) 637 return -EINVAL; 638 #if IS_ENABLED(CONFIG_AGP) 639 if (rdev->flags & RADEON_IS_AGP) 640 return ttm_agp_bind(ttm, bo_mem); 641 #endif 642 643 return radeon_ttm_backend_bind(bdev, ttm, bo_mem); 644 } 645 646 static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev, 647 struct ttm_tt *ttm) 648 { 649 #if IS_ENABLED(CONFIG_AGP) 650 struct radeon_device *rdev = radeon_get_rdev(bdev); 651 652 if (rdev->flags & RADEON_IS_AGP) { 653 ttm_agp_unbind(ttm); 654 return; 655 } 656 #endif 657 radeon_ttm_backend_unbind(bdev, ttm); 658 } 659 660 static void radeon_ttm_tt_destroy(struct ttm_bo_device *bdev, 661 struct ttm_tt *ttm) 662 { 663 #if IS_ENABLED(CONFIG_AGP) 664 struct radeon_device *rdev = radeon_get_rdev(bdev); 665 666 if (rdev->flags & RADEON_IS_AGP) { 667 ttm_agp_unbind(ttm); 668 ttm_tt_destroy_common(bdev, ttm); 669 ttm_agp_destroy(ttm); 670 return; 671 } 672 #endif 673 radeon_ttm_backend_destroy(bdev, ttm); 674 } 675 676 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev, 677 struct ttm_tt *ttm) 678 { 679 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 680 681 if (gtt == NULL) 682 return false; 683 684 return !!gtt->userptr; 685 } 686 687 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev, 688 struct ttm_tt *ttm) 689 { 690 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 691 692 if (gtt == NULL) 693 return false; 694 695 return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 696 } 697 698 static void 699 radeon_bo_delete_mem_notify(struct ttm_buffer_object *bo) 700 { 701 radeon_bo_move_notify(bo, false, NULL); 702 } 703 704 static struct ttm_bo_driver radeon_bo_driver = { 705 .ttm_tt_create = &radeon_ttm_tt_create, 706 .ttm_tt_populate = &radeon_ttm_tt_populate, 707 .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate, 708 .ttm_tt_destroy = &radeon_ttm_tt_destroy, 709 .eviction_valuable = ttm_bo_eviction_valuable, 710 .evict_flags = &radeon_evict_flags, 711 .move = &radeon_bo_move, 712 .verify_access = &radeon_verify_access, 713 .delete_mem_notify = &radeon_bo_delete_mem_notify, 714 .io_mem_reserve = &radeon_ttm_io_mem_reserve, 715 }; 716 717 int radeon_ttm_init(struct radeon_device *rdev) 718 { 719 int r; 720 721 /* No others user of address space so set it to 0 */ 722 r = ttm_bo_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev, 723 rdev->ddev->anon_inode->i_mapping, 724 rdev->ddev->vma_offset_manager, 725 rdev->need_swiotlb, 726 dma_addressing_limited(&rdev->pdev->dev)); 727 if (r) { 728 DRM_ERROR("failed initializing buffer object driver(%d).\n", r); 729 return r; 730 } 731 rdev->mman.initialized = true; 732 733 ttm_pool_init(&rdev->mman.bdev.pool, rdev->dev, rdev->need_swiotlb, 734 dma_addressing_limited(&rdev->pdev->dev)); 735 736 r = radeon_ttm_init_vram(rdev); 737 if (r) { 738 DRM_ERROR("Failed initializing VRAM heap.\n"); 739 return r; 740 } 741 /* Change the size here instead of the init above so only lpfn is affected */ 742 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); 743 744 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true, 745 RADEON_GEM_DOMAIN_VRAM, 0, NULL, 746 NULL, &rdev->stolen_vga_memory); 747 if (r) { 748 return r; 749 } 750 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 751 if (r) 752 return r; 753 r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL); 754 radeon_bo_unreserve(rdev->stolen_vga_memory); 755 if (r) { 756 radeon_bo_unref(&rdev->stolen_vga_memory); 757 return r; 758 } 759 DRM_INFO("radeon: %uM of VRAM memory ready\n", 760 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024))); 761 762 r = radeon_ttm_init_gtt(rdev); 763 if (r) { 764 DRM_ERROR("Failed initializing GTT heap.\n"); 765 return r; 766 } 767 DRM_INFO("radeon: %uM of GTT memory ready.\n", 768 (unsigned)(rdev->mc.gtt_size / (1024 * 1024))); 769 770 r = radeon_ttm_debugfs_init(rdev); 771 if (r) { 772 DRM_ERROR("Failed to init debugfs\n"); 773 return r; 774 } 775 return 0; 776 } 777 778 void radeon_ttm_fini(struct radeon_device *rdev) 779 { 780 int r; 781 782 if (!rdev->mman.initialized) 783 return; 784 radeon_ttm_debugfs_fini(rdev); 785 if (rdev->stolen_vga_memory) { 786 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 787 if (r == 0) { 788 radeon_bo_unpin(rdev->stolen_vga_memory); 789 radeon_bo_unreserve(rdev->stolen_vga_memory); 790 } 791 radeon_bo_unref(&rdev->stolen_vga_memory); 792 } 793 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM); 794 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT); 795 ttm_bo_device_release(&rdev->mman.bdev); 796 radeon_gart_fini(rdev); 797 rdev->mman.initialized = false; 798 DRM_INFO("radeon: ttm finalized\n"); 799 } 800 801 /* this should only be called at bootup or when userspace 802 * isn't running */ 803 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size) 804 { 805 struct ttm_resource_manager *man; 806 807 if (!rdev->mman.initialized) 808 return; 809 810 man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM); 811 /* this just adjusts TTM size idea, which sets lpfn to the correct value */ 812 man->size = size >> PAGE_SHIFT; 813 } 814 815 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf) 816 { 817 struct ttm_buffer_object *bo = vmf->vma->vm_private_data; 818 struct radeon_device *rdev = radeon_get_rdev(bo->bdev); 819 vm_fault_t ret; 820 821 down_read(&rdev->pm.mclk_lock); 822 823 ret = ttm_bo_vm_reserve(bo, vmf); 824 if (ret) 825 goto unlock_mclk; 826 827 ret = radeon_bo_fault_reserve_notify(bo); 828 if (ret) 829 goto unlock_resv; 830 831 ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot, 832 TTM_BO_VM_NUM_PREFAULT, 1); 833 if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT)) 834 goto unlock_mclk; 835 836 unlock_resv: 837 dma_resv_unlock(bo->base.resv); 838 839 unlock_mclk: 840 up_read(&rdev->pm.mclk_lock); 841 return ret; 842 } 843 844 static struct vm_operations_struct radeon_ttm_vm_ops = { 845 .fault = radeon_ttm_fault, 846 .open = ttm_bo_vm_open, 847 .close = ttm_bo_vm_close, 848 .access = ttm_bo_vm_access 849 }; 850 851 int radeon_mmap(struct file *filp, struct vm_area_struct *vma) 852 { 853 int r; 854 struct drm_file *file_priv = filp->private_data; 855 struct radeon_device *rdev = file_priv->minor->dev->dev_private; 856 857 if (rdev == NULL) 858 return -EINVAL; 859 860 r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev); 861 if (unlikely(r != 0)) 862 return r; 863 864 vma->vm_ops = &radeon_ttm_vm_ops; 865 return 0; 866 } 867 868 #if defined(CONFIG_DEBUG_FS) 869 870 static int radeon_mm_dump_table(struct seq_file *m, void *data) 871 { 872 struct drm_info_node *node = (struct drm_info_node *)m->private; 873 unsigned ttm_pl = *(int*)node->info_ent->data; 874 struct drm_device *dev = node->minor->dev; 875 struct radeon_device *rdev = dev->dev_private; 876 struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, ttm_pl); 877 struct drm_printer p = drm_seq_file_printer(m); 878 879 man->func->debug(man, &p); 880 return 0; 881 } 882 883 static int radeon_ttm_pool_debugfs(struct seq_file *m, void *data) 884 { 885 struct drm_info_node *node = (struct drm_info_node *)m->private; 886 struct drm_device *dev = node->minor->dev; 887 struct radeon_device *rdev = dev->dev_private; 888 889 return ttm_pool_debugfs(&rdev->mman.bdev.pool, m); 890 } 891 892 static int ttm_pl_vram = TTM_PL_VRAM; 893 static int ttm_pl_tt = TTM_PL_TT; 894 895 static struct drm_info_list radeon_ttm_debugfs_list[] = { 896 {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram}, 897 {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt}, 898 {"ttm_page_pool", radeon_ttm_pool_debugfs, 0, NULL} 899 }; 900 901 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep) 902 { 903 struct radeon_device *rdev = inode->i_private; 904 i_size_write(inode, rdev->mc.mc_vram_size); 905 filep->private_data = inode->i_private; 906 return 0; 907 } 908 909 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf, 910 size_t size, loff_t *pos) 911 { 912 struct radeon_device *rdev = f->private_data; 913 ssize_t result = 0; 914 int r; 915 916 if (size & 0x3 || *pos & 0x3) 917 return -EINVAL; 918 919 while (size) { 920 unsigned long flags; 921 uint32_t value; 922 923 if (*pos >= rdev->mc.mc_vram_size) 924 return result; 925 926 spin_lock_irqsave(&rdev->mmio_idx_lock, flags); 927 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000); 928 if (rdev->family >= CHIP_CEDAR) 929 WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31); 930 value = RREG32(RADEON_MM_DATA); 931 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); 932 933 r = put_user(value, (uint32_t *)buf); 934 if (r) 935 return r; 936 937 result += 4; 938 buf += 4; 939 *pos += 4; 940 size -= 4; 941 } 942 943 return result; 944 } 945 946 static const struct file_operations radeon_ttm_vram_fops = { 947 .owner = THIS_MODULE, 948 .open = radeon_ttm_vram_open, 949 .read = radeon_ttm_vram_read, 950 .llseek = default_llseek 951 }; 952 953 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep) 954 { 955 struct radeon_device *rdev = inode->i_private; 956 i_size_write(inode, rdev->mc.gtt_size); 957 filep->private_data = inode->i_private; 958 return 0; 959 } 960 961 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf, 962 size_t size, loff_t *pos) 963 { 964 struct radeon_device *rdev = f->private_data; 965 ssize_t result = 0; 966 int r; 967 968 while (size) { 969 loff_t p = *pos / PAGE_SIZE; 970 unsigned off = *pos & ~PAGE_MASK; 971 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off); 972 struct page *page; 973 void *ptr; 974 975 if (p >= rdev->gart.num_cpu_pages) 976 return result; 977 978 page = rdev->gart.pages[p]; 979 if (page) { 980 ptr = kmap(page); 981 ptr += off; 982 983 r = copy_to_user(buf, ptr, cur_size); 984 kunmap(rdev->gart.pages[p]); 985 } else 986 r = clear_user(buf, cur_size); 987 988 if (r) 989 return -EFAULT; 990 991 result += cur_size; 992 buf += cur_size; 993 *pos += cur_size; 994 size -= cur_size; 995 } 996 997 return result; 998 } 999 1000 static const struct file_operations radeon_ttm_gtt_fops = { 1001 .owner = THIS_MODULE, 1002 .open = radeon_ttm_gtt_open, 1003 .read = radeon_ttm_gtt_read, 1004 .llseek = default_llseek 1005 }; 1006 1007 #endif 1008 1009 static int radeon_ttm_debugfs_init(struct radeon_device *rdev) 1010 { 1011 #if defined(CONFIG_DEBUG_FS) 1012 unsigned count; 1013 1014 struct drm_minor *minor = rdev->ddev->primary; 1015 struct dentry *root = minor->debugfs_root; 1016 1017 rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO, 1018 root, rdev, 1019 &radeon_ttm_vram_fops); 1020 1021 rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO, 1022 root, rdev, &radeon_ttm_gtt_fops); 1023 1024 count = ARRAY_SIZE(radeon_ttm_debugfs_list); 1025 1026 return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count); 1027 #else 1028 1029 return 0; 1030 #endif 1031 } 1032 1033 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev) 1034 { 1035 #if defined(CONFIG_DEBUG_FS) 1036 1037 debugfs_remove(rdev->mman.vram); 1038 rdev->mman.vram = NULL; 1039 1040 debugfs_remove(rdev->mman.gtt); 1041 rdev->mman.gtt = NULL; 1042 #endif 1043 } 1044