1 /* 2 * Copyright 2009 VMware, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Michel Dänzer 23 */ 24 #include <drm/drmP.h> 25 #include <drm/radeon_drm.h> 26 #include "radeon_reg.h" 27 #include "radeon.h" 28 29 #define RADEON_TEST_COPY_BLIT 1 30 #define RADEON_TEST_COPY_DMA 0 31 32 33 /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */ 34 static void radeon_do_test_moves(struct radeon_device *rdev, int flag) 35 { 36 struct radeon_bo *vram_obj = NULL; 37 struct radeon_bo **gtt_obj = NULL; 38 uint64_t gtt_addr, vram_addr; 39 unsigned n, size; 40 int i, r, ring; 41 42 switch (flag) { 43 case RADEON_TEST_COPY_DMA: 44 ring = radeon_copy_dma_ring_index(rdev); 45 break; 46 case RADEON_TEST_COPY_BLIT: 47 ring = radeon_copy_blit_ring_index(rdev); 48 break; 49 default: 50 DRM_ERROR("Unknown copy method\n"); 51 return; 52 } 53 54 size = 1024 * 1024; 55 56 /* Number of tests = 57 * (Total GTT - IB pool - writeback page - ring buffers) / test size 58 */ 59 n = rdev->mc.gtt_size - rdev->gart_pin_size; 60 n /= size; 61 62 gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL); 63 if (!gtt_obj) { 64 DRM_ERROR("Failed to allocate %d pointers\n", n); 65 r = 1; 66 goto out_cleanup; 67 } 68 69 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM, 70 0, NULL, &vram_obj); 71 if (r) { 72 DRM_ERROR("Failed to create VRAM object\n"); 73 goto out_cleanup; 74 } 75 r = radeon_bo_reserve(vram_obj, false); 76 if (unlikely(r != 0)) 77 goto out_unref; 78 r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr); 79 if (r) { 80 DRM_ERROR("Failed to pin VRAM object\n"); 81 goto out_unres; 82 } 83 for (i = 0; i < n; i++) { 84 void *gtt_map, *vram_map; 85 void **gtt_start, **gtt_end; 86 void **vram_start, **vram_end; 87 struct radeon_fence *fence = NULL; 88 89 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, 90 RADEON_GEM_DOMAIN_GTT, 0, NULL, gtt_obj + i); 91 if (r) { 92 DRM_ERROR("Failed to create GTT object %d\n", i); 93 goto out_lclean; 94 } 95 96 r = radeon_bo_reserve(gtt_obj[i], false); 97 if (unlikely(r != 0)) 98 goto out_lclean_unref; 99 r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, >t_addr); 100 if (r) { 101 DRM_ERROR("Failed to pin GTT object %d\n", i); 102 goto out_lclean_unres; 103 } 104 105 r = radeon_bo_kmap(gtt_obj[i], >t_map); 106 if (r) { 107 DRM_ERROR("Failed to map GTT object %d\n", i); 108 goto out_lclean_unpin; 109 } 110 111 for (gtt_start = gtt_map, gtt_end = gtt_map + size; 112 gtt_start < gtt_end; 113 gtt_start++) 114 *gtt_start = gtt_start; 115 116 radeon_bo_kunmap(gtt_obj[i]); 117 118 if (ring == R600_RING_TYPE_DMA_INDEX) 119 fence = radeon_copy_dma(rdev, gtt_addr, vram_addr, 120 size / RADEON_GPU_PAGE_SIZE, 121 NULL); 122 else 123 fence = radeon_copy_blit(rdev, gtt_addr, vram_addr, 124 size / RADEON_GPU_PAGE_SIZE, 125 NULL); 126 if (IS_ERR(fence)) { 127 DRM_ERROR("Failed GTT->VRAM copy %d\n", i); 128 r = PTR_ERR(fence); 129 goto out_lclean_unpin; 130 } 131 132 r = radeon_fence_wait(fence, false); 133 if (r) { 134 DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i); 135 goto out_lclean_unpin; 136 } 137 138 radeon_fence_unref(&fence); 139 140 r = radeon_bo_kmap(vram_obj, &vram_map); 141 if (r) { 142 DRM_ERROR("Failed to map VRAM object after copy %d\n", i); 143 goto out_lclean_unpin; 144 } 145 146 for (gtt_start = gtt_map, gtt_end = gtt_map + size, 147 vram_start = vram_map, vram_end = vram_map + size; 148 vram_start < vram_end; 149 gtt_start++, vram_start++) { 150 if (*vram_start != gtt_start) { 151 DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, " 152 "expected 0x%p (GTT/VRAM offset " 153 "0x%16llx/0x%16llx)\n", 154 i, *vram_start, gtt_start, 155 (unsigned long long) 156 (gtt_addr - rdev->mc.gtt_start + 157 (void*)gtt_start - gtt_map), 158 (unsigned long long) 159 (vram_addr - rdev->mc.vram_start + 160 (void*)gtt_start - gtt_map)); 161 radeon_bo_kunmap(vram_obj); 162 goto out_lclean_unpin; 163 } 164 *vram_start = vram_start; 165 } 166 167 radeon_bo_kunmap(vram_obj); 168 169 if (ring == R600_RING_TYPE_DMA_INDEX) 170 fence = radeon_copy_dma(rdev, vram_addr, gtt_addr, 171 size / RADEON_GPU_PAGE_SIZE, 172 NULL); 173 else 174 fence = radeon_copy_blit(rdev, vram_addr, gtt_addr, 175 size / RADEON_GPU_PAGE_SIZE, 176 NULL); 177 if (IS_ERR(fence)) { 178 DRM_ERROR("Failed VRAM->GTT copy %d\n", i); 179 r = PTR_ERR(fence); 180 goto out_lclean_unpin; 181 } 182 183 r = radeon_fence_wait(fence, false); 184 if (r) { 185 DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i); 186 goto out_lclean_unpin; 187 } 188 189 radeon_fence_unref(&fence); 190 191 r = radeon_bo_kmap(gtt_obj[i], >t_map); 192 if (r) { 193 DRM_ERROR("Failed to map GTT object after copy %d\n", i); 194 goto out_lclean_unpin; 195 } 196 197 for (gtt_start = gtt_map, gtt_end = gtt_map + size, 198 vram_start = vram_map, vram_end = vram_map + size; 199 gtt_start < gtt_end; 200 gtt_start++, vram_start++) { 201 if (*gtt_start != vram_start) { 202 DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, " 203 "expected 0x%p (VRAM/GTT offset " 204 "0x%16llx/0x%16llx)\n", 205 i, *gtt_start, vram_start, 206 (unsigned long long) 207 (vram_addr - rdev->mc.vram_start + 208 (void*)vram_start - vram_map), 209 (unsigned long long) 210 (gtt_addr - rdev->mc.gtt_start + 211 (void*)vram_start - vram_map)); 212 radeon_bo_kunmap(gtt_obj[i]); 213 goto out_lclean_unpin; 214 } 215 } 216 217 radeon_bo_kunmap(gtt_obj[i]); 218 219 DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n", 220 gtt_addr - rdev->mc.gtt_start); 221 continue; 222 223 out_lclean_unpin: 224 radeon_bo_unpin(gtt_obj[i]); 225 out_lclean_unres: 226 radeon_bo_unreserve(gtt_obj[i]); 227 out_lclean_unref: 228 radeon_bo_unref(>t_obj[i]); 229 out_lclean: 230 for (--i; i >= 0; --i) { 231 radeon_bo_unpin(gtt_obj[i]); 232 radeon_bo_unreserve(gtt_obj[i]); 233 radeon_bo_unref(>t_obj[i]); 234 } 235 if (fence && !IS_ERR(fence)) 236 radeon_fence_unref(&fence); 237 break; 238 } 239 240 radeon_bo_unpin(vram_obj); 241 out_unres: 242 radeon_bo_unreserve(vram_obj); 243 out_unref: 244 radeon_bo_unref(&vram_obj); 245 out_cleanup: 246 kfree(gtt_obj); 247 if (r) { 248 printk(KERN_WARNING "Error while testing BO move.\n"); 249 } 250 } 251 252 void radeon_test_moves(struct radeon_device *rdev) 253 { 254 if (rdev->asic->copy.dma) 255 radeon_do_test_moves(rdev, RADEON_TEST_COPY_DMA); 256 if (rdev->asic->copy.blit) 257 radeon_do_test_moves(rdev, RADEON_TEST_COPY_BLIT); 258 } 259 260 static int radeon_test_create_and_emit_fence(struct radeon_device *rdev, 261 struct radeon_ring *ring, 262 struct radeon_fence **fence) 263 { 264 uint32_t handle = ring->idx ^ 0xdeafbeef; 265 int r; 266 267 if (ring->idx == R600_RING_TYPE_UVD_INDEX) { 268 r = radeon_uvd_get_create_msg(rdev, ring->idx, handle, NULL); 269 if (r) { 270 DRM_ERROR("Failed to get dummy create msg\n"); 271 return r; 272 } 273 274 r = radeon_uvd_get_destroy_msg(rdev, ring->idx, handle, fence); 275 if (r) { 276 DRM_ERROR("Failed to get dummy destroy msg\n"); 277 return r; 278 } 279 280 } else if (ring->idx == TN_RING_TYPE_VCE1_INDEX || 281 ring->idx == TN_RING_TYPE_VCE2_INDEX) { 282 r = radeon_vce_get_create_msg(rdev, ring->idx, handle, NULL); 283 if (r) { 284 DRM_ERROR("Failed to get dummy create msg\n"); 285 return r; 286 } 287 288 r = radeon_vce_get_destroy_msg(rdev, ring->idx, handle, fence); 289 if (r) { 290 DRM_ERROR("Failed to get dummy destroy msg\n"); 291 return r; 292 } 293 294 } else { 295 r = radeon_ring_lock(rdev, ring, 64); 296 if (r) { 297 DRM_ERROR("Failed to lock ring A %d\n", ring->idx); 298 return r; 299 } 300 radeon_fence_emit(rdev, fence, ring->idx); 301 radeon_ring_unlock_commit(rdev, ring, false); 302 } 303 return 0; 304 } 305 306 void radeon_test_ring_sync(struct radeon_device *rdev, 307 struct radeon_ring *ringA, 308 struct radeon_ring *ringB) 309 { 310 struct radeon_fence *fence1 = NULL, *fence2 = NULL; 311 struct radeon_semaphore *semaphore = NULL; 312 int r; 313 314 r = radeon_semaphore_create(rdev, &semaphore); 315 if (r) { 316 DRM_ERROR("Failed to create semaphore\n"); 317 goto out_cleanup; 318 } 319 320 r = radeon_ring_lock(rdev, ringA, 64); 321 if (r) { 322 DRM_ERROR("Failed to lock ring A %d\n", ringA->idx); 323 goto out_cleanup; 324 } 325 radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); 326 radeon_ring_unlock_commit(rdev, ringA, false); 327 328 r = radeon_test_create_and_emit_fence(rdev, ringA, &fence1); 329 if (r) 330 goto out_cleanup; 331 332 r = radeon_ring_lock(rdev, ringA, 64); 333 if (r) { 334 DRM_ERROR("Failed to lock ring A %d\n", ringA->idx); 335 goto out_cleanup; 336 } 337 radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); 338 radeon_ring_unlock_commit(rdev, ringA, false); 339 340 r = radeon_test_create_and_emit_fence(rdev, ringA, &fence2); 341 if (r) 342 goto out_cleanup; 343 344 mdelay(1000); 345 346 if (radeon_fence_signaled(fence1)) { 347 DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n"); 348 goto out_cleanup; 349 } 350 351 r = radeon_ring_lock(rdev, ringB, 64); 352 if (r) { 353 DRM_ERROR("Failed to lock ring B %p\n", ringB); 354 goto out_cleanup; 355 } 356 radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); 357 radeon_ring_unlock_commit(rdev, ringB, false); 358 359 r = radeon_fence_wait(fence1, false); 360 if (r) { 361 DRM_ERROR("Failed to wait for sync fence 1\n"); 362 goto out_cleanup; 363 } 364 365 mdelay(1000); 366 367 if (radeon_fence_signaled(fence2)) { 368 DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n"); 369 goto out_cleanup; 370 } 371 372 r = radeon_ring_lock(rdev, ringB, 64); 373 if (r) { 374 DRM_ERROR("Failed to lock ring B %p\n", ringB); 375 goto out_cleanup; 376 } 377 radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); 378 radeon_ring_unlock_commit(rdev, ringB, false); 379 380 r = radeon_fence_wait(fence2, false); 381 if (r) { 382 DRM_ERROR("Failed to wait for sync fence 1\n"); 383 goto out_cleanup; 384 } 385 386 out_cleanup: 387 radeon_semaphore_free(rdev, &semaphore, NULL); 388 389 if (fence1) 390 radeon_fence_unref(&fence1); 391 392 if (fence2) 393 radeon_fence_unref(&fence2); 394 395 if (r) 396 printk(KERN_WARNING "Error while testing ring sync (%d).\n", r); 397 } 398 399 static void radeon_test_ring_sync2(struct radeon_device *rdev, 400 struct radeon_ring *ringA, 401 struct radeon_ring *ringB, 402 struct radeon_ring *ringC) 403 { 404 struct radeon_fence *fenceA = NULL, *fenceB = NULL; 405 struct radeon_semaphore *semaphore = NULL; 406 bool sigA, sigB; 407 int i, r; 408 409 r = radeon_semaphore_create(rdev, &semaphore); 410 if (r) { 411 DRM_ERROR("Failed to create semaphore\n"); 412 goto out_cleanup; 413 } 414 415 r = radeon_ring_lock(rdev, ringA, 64); 416 if (r) { 417 DRM_ERROR("Failed to lock ring A %d\n", ringA->idx); 418 goto out_cleanup; 419 } 420 radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); 421 radeon_ring_unlock_commit(rdev, ringA, false); 422 423 r = radeon_test_create_and_emit_fence(rdev, ringA, &fenceA); 424 if (r) 425 goto out_cleanup; 426 427 r = radeon_ring_lock(rdev, ringB, 64); 428 if (r) { 429 DRM_ERROR("Failed to lock ring B %d\n", ringB->idx); 430 goto out_cleanup; 431 } 432 radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore); 433 radeon_ring_unlock_commit(rdev, ringB, false); 434 r = radeon_test_create_and_emit_fence(rdev, ringB, &fenceB); 435 if (r) 436 goto out_cleanup; 437 438 mdelay(1000); 439 440 if (radeon_fence_signaled(fenceA)) { 441 DRM_ERROR("Fence A signaled without waiting for semaphore.\n"); 442 goto out_cleanup; 443 } 444 if (radeon_fence_signaled(fenceB)) { 445 DRM_ERROR("Fence B signaled without waiting for semaphore.\n"); 446 goto out_cleanup; 447 } 448 449 r = radeon_ring_lock(rdev, ringC, 64); 450 if (r) { 451 DRM_ERROR("Failed to lock ring B %p\n", ringC); 452 goto out_cleanup; 453 } 454 radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); 455 radeon_ring_unlock_commit(rdev, ringC, false); 456 457 for (i = 0; i < 30; ++i) { 458 mdelay(100); 459 sigA = radeon_fence_signaled(fenceA); 460 sigB = radeon_fence_signaled(fenceB); 461 if (sigA || sigB) 462 break; 463 } 464 465 if (!sigA && !sigB) { 466 DRM_ERROR("Neither fence A nor B has been signaled\n"); 467 goto out_cleanup; 468 } else if (sigA && sigB) { 469 DRM_ERROR("Both fence A and B has been signaled\n"); 470 goto out_cleanup; 471 } 472 473 DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B'); 474 475 r = radeon_ring_lock(rdev, ringC, 64); 476 if (r) { 477 DRM_ERROR("Failed to lock ring B %p\n", ringC); 478 goto out_cleanup; 479 } 480 radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); 481 radeon_ring_unlock_commit(rdev, ringC, false); 482 483 mdelay(1000); 484 485 r = radeon_fence_wait(fenceA, false); 486 if (r) { 487 DRM_ERROR("Failed to wait for sync fence A\n"); 488 goto out_cleanup; 489 } 490 r = radeon_fence_wait(fenceB, false); 491 if (r) { 492 DRM_ERROR("Failed to wait for sync fence B\n"); 493 goto out_cleanup; 494 } 495 496 out_cleanup: 497 radeon_semaphore_free(rdev, &semaphore, NULL); 498 499 if (fenceA) 500 radeon_fence_unref(&fenceA); 501 502 if (fenceB) 503 radeon_fence_unref(&fenceB); 504 505 if (r) 506 printk(KERN_WARNING "Error while testing ring sync (%d).\n", r); 507 } 508 509 static bool radeon_test_sync_possible(struct radeon_ring *ringA, 510 struct radeon_ring *ringB) 511 { 512 if (ringA->idx == TN_RING_TYPE_VCE2_INDEX && 513 ringB->idx == TN_RING_TYPE_VCE1_INDEX) 514 return false; 515 516 return true; 517 } 518 519 void radeon_test_syncing(struct radeon_device *rdev) 520 { 521 int i, j, k; 522 523 for (i = 1; i < RADEON_NUM_RINGS; ++i) { 524 struct radeon_ring *ringA = &rdev->ring[i]; 525 if (!ringA->ready) 526 continue; 527 528 for (j = 0; j < i; ++j) { 529 struct radeon_ring *ringB = &rdev->ring[j]; 530 if (!ringB->ready) 531 continue; 532 533 if (!radeon_test_sync_possible(ringA, ringB)) 534 continue; 535 536 DRM_INFO("Testing syncing between rings %d and %d...\n", i, j); 537 radeon_test_ring_sync(rdev, ringA, ringB); 538 539 DRM_INFO("Testing syncing between rings %d and %d...\n", j, i); 540 radeon_test_ring_sync(rdev, ringB, ringA); 541 542 for (k = 0; k < j; ++k) { 543 struct radeon_ring *ringC = &rdev->ring[k]; 544 if (!ringC->ready) 545 continue; 546 547 if (!radeon_test_sync_possible(ringA, ringC)) 548 continue; 549 550 if (!radeon_test_sync_possible(ringB, ringC)) 551 continue; 552 553 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k); 554 radeon_test_ring_sync2(rdev, ringA, ringB, ringC); 555 556 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j); 557 radeon_test_ring_sync2(rdev, ringA, ringC, ringB); 558 559 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k); 560 radeon_test_ring_sync2(rdev, ringB, ringA, ringC); 561 562 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i); 563 radeon_test_ring_sync2(rdev, ringB, ringC, ringA); 564 565 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j); 566 radeon_test_ring_sync2(rdev, ringC, ringA, ringB); 567 568 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i); 569 radeon_test_ring_sync2(rdev, ringC, ringB, ringA); 570 } 571 } 572 } 573 } 574