1 /* 2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and 3 * VA Linux Systems Inc., Fremont, California. 4 * Copyright 2008 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Original Authors: 25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane 26 * 27 * Kernel port Author: Dave Airlie 28 */ 29 30 #ifndef RADEON_MODE_H 31 #define RADEON_MODE_H 32 33 #include <drm_crtc.h> 34 #include <drm_mode.h> 35 #include <drm_edid.h> 36 #include <drm_dp_helper.h> 37 #include <drm_fixed.h> 38 #include <drm_crtc_helper.h> 39 #include <linux/i2c.h> 40 #include <linux/i2c-algo-bit.h> 41 42 struct radeon_bo; 43 struct radeon_device; 44 45 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) 46 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) 47 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) 48 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) 49 50 enum radeon_rmx_type { 51 RMX_OFF, 52 RMX_FULL, 53 RMX_CENTER, 54 RMX_ASPECT 55 }; 56 57 enum radeon_tv_std { 58 TV_STD_NTSC, 59 TV_STD_PAL, 60 TV_STD_PAL_M, 61 TV_STD_PAL_60, 62 TV_STD_NTSC_J, 63 TV_STD_SCART_PAL, 64 TV_STD_SECAM, 65 TV_STD_PAL_CN, 66 TV_STD_PAL_N, 67 }; 68 69 enum radeon_underscan_type { 70 UNDERSCAN_OFF, 71 UNDERSCAN_ON, 72 UNDERSCAN_AUTO, 73 }; 74 75 enum radeon_hpd_id { 76 RADEON_HPD_1 = 0, 77 RADEON_HPD_2, 78 RADEON_HPD_3, 79 RADEON_HPD_4, 80 RADEON_HPD_5, 81 RADEON_HPD_6, 82 RADEON_HPD_NONE = 0xff, 83 }; 84 85 #define RADEON_MAX_I2C_BUS 16 86 87 /* radeon gpio-based i2c 88 * 1. "mask" reg and bits 89 * grabs the gpio pins for software use 90 * 0=not held 1=held 91 * 2. "a" reg and bits 92 * output pin value 93 * 0=low 1=high 94 * 3. "en" reg and bits 95 * sets the pin direction 96 * 0=input 1=output 97 * 4. "y" reg and bits 98 * input pin value 99 * 0=low 1=high 100 */ 101 struct radeon_i2c_bus_rec { 102 bool valid; 103 /* id used by atom */ 104 uint8_t i2c_id; 105 /* id used by atom */ 106 enum radeon_hpd_id hpd; 107 /* can be used with hw i2c engine */ 108 bool hw_capable; 109 /* uses multi-media i2c engine */ 110 bool mm_i2c; 111 /* regs and bits */ 112 uint32_t mask_clk_reg; 113 uint32_t mask_data_reg; 114 uint32_t a_clk_reg; 115 uint32_t a_data_reg; 116 uint32_t en_clk_reg; 117 uint32_t en_data_reg; 118 uint32_t y_clk_reg; 119 uint32_t y_data_reg; 120 uint32_t mask_clk_mask; 121 uint32_t mask_data_mask; 122 uint32_t a_clk_mask; 123 uint32_t a_data_mask; 124 uint32_t en_clk_mask; 125 uint32_t en_data_mask; 126 uint32_t y_clk_mask; 127 uint32_t y_data_mask; 128 }; 129 130 struct radeon_tmds_pll { 131 uint32_t freq; 132 uint32_t value; 133 }; 134 135 #define RADEON_MAX_BIOS_CONNECTOR 16 136 137 /* pll flags */ 138 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0) 139 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) 140 #define RADEON_PLL_USE_REF_DIV (1 << 2) 141 #define RADEON_PLL_LEGACY (1 << 3) 142 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4) 143 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5) 144 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6) 145 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7) 146 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) 147 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) 148 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) 149 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) 150 #define RADEON_PLL_USE_POST_DIV (1 << 12) 151 #define RADEON_PLL_IS_LCD (1 << 13) 152 153 struct radeon_pll { 154 /* reference frequency */ 155 uint32_t reference_freq; 156 157 /* fixed dividers */ 158 uint32_t reference_div; 159 uint32_t post_div; 160 161 /* pll in/out limits */ 162 uint32_t pll_in_min; 163 uint32_t pll_in_max; 164 uint32_t pll_out_min; 165 uint32_t pll_out_max; 166 uint32_t lcd_pll_out_min; 167 uint32_t lcd_pll_out_max; 168 uint32_t best_vco; 169 170 /* divider limits */ 171 uint32_t min_ref_div; 172 uint32_t max_ref_div; 173 uint32_t min_post_div; 174 uint32_t max_post_div; 175 uint32_t min_feedback_div; 176 uint32_t max_feedback_div; 177 uint32_t min_frac_feedback_div; 178 uint32_t max_frac_feedback_div; 179 180 /* flags for the current clock */ 181 uint32_t flags; 182 183 /* pll id */ 184 uint32_t id; 185 }; 186 187 struct radeon_i2c_chan { 188 struct i2c_adapter adapter; 189 struct drm_device *dev; 190 union { 191 struct i2c_algo_bit_data bit; 192 struct i2c_algo_dp_aux_data dp; 193 } algo; 194 struct radeon_i2c_bus_rec rec; 195 }; 196 197 /* mostly for macs, but really any system without connector tables */ 198 enum radeon_connector_table { 199 CT_NONE = 0, 200 CT_GENERIC, 201 CT_IBOOK, 202 CT_POWERBOOK_EXTERNAL, 203 CT_POWERBOOK_INTERNAL, 204 CT_POWERBOOK_VGA, 205 CT_MINI_EXTERNAL, 206 CT_MINI_INTERNAL, 207 CT_IMAC_G5_ISIGHT, 208 CT_EMAC, 209 CT_RN50_POWER, 210 CT_MAC_X800, 211 }; 212 213 enum radeon_dvo_chip { 214 DVO_SIL164, 215 DVO_SIL1178, 216 }; 217 218 struct radeon_fbdev; 219 220 struct radeon_mode_info { 221 struct atom_context *atom_context; 222 struct card_info *atom_card_info; 223 enum radeon_connector_table connector_table; 224 bool mode_config_initialized; 225 struct radeon_crtc *crtcs[6]; 226 /* DVI-I properties */ 227 struct drm_property *coherent_mode_property; 228 /* DAC enable load detect */ 229 struct drm_property *load_detect_property; 230 /* TV standard */ 231 struct drm_property *tv_std_property; 232 /* legacy TMDS PLL detect */ 233 struct drm_property *tmds_pll_property; 234 /* underscan */ 235 struct drm_property *underscan_property; 236 struct drm_property *underscan_hborder_property; 237 struct drm_property *underscan_vborder_property; 238 /* hardcoded DFP edid from BIOS */ 239 struct edid *bios_hardcoded_edid; 240 241 /* pointer to fbdev info structure */ 242 struct radeon_fbdev *rfbdev; 243 }; 244 245 #define MAX_H_CODE_TIMING_LEN 32 246 #define MAX_V_CODE_TIMING_LEN 32 247 248 /* need to store these as reading 249 back code tables is excessive */ 250 struct radeon_tv_regs { 251 uint32_t tv_uv_adr; 252 uint32_t timing_cntl; 253 uint32_t hrestart; 254 uint32_t vrestart; 255 uint32_t frestart; 256 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN]; 257 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN]; 258 }; 259 260 struct radeon_crtc { 261 struct drm_crtc base; 262 int crtc_id; 263 u16 lut_r[256], lut_g[256], lut_b[256]; 264 bool enabled; 265 bool can_tile; 266 uint32_t crtc_offset; 267 struct drm_gem_object *cursor_bo; 268 uint64_t cursor_addr; 269 int cursor_width; 270 int cursor_height; 271 uint32_t legacy_display_base_addr; 272 uint32_t legacy_cursor_offset; 273 enum radeon_rmx_type rmx_type; 274 u8 h_border; 275 u8 v_border; 276 fixed20_12 vsc; 277 fixed20_12 hsc; 278 struct drm_display_mode native_mode; 279 int pll_id; 280 }; 281 282 struct radeon_encoder_primary_dac { 283 /* legacy primary dac */ 284 uint32_t ps2_pdac_adj; 285 }; 286 287 struct radeon_encoder_lvds { 288 /* legacy lvds */ 289 uint16_t panel_vcc_delay; 290 uint8_t panel_pwr_delay; 291 uint8_t panel_digon_delay; 292 uint8_t panel_blon_delay; 293 uint16_t panel_ref_divider; 294 uint8_t panel_post_divider; 295 uint16_t panel_fb_divider; 296 bool use_bios_dividers; 297 uint32_t lvds_gen_cntl; 298 /* panel mode */ 299 struct drm_display_mode native_mode; 300 }; 301 302 struct radeon_encoder_tv_dac { 303 /* legacy tv dac */ 304 uint32_t ps2_tvdac_adj; 305 uint32_t ntsc_tvdac_adj; 306 uint32_t pal_tvdac_adj; 307 308 int h_pos; 309 int v_pos; 310 int h_size; 311 int supported_tv_stds; 312 bool tv_on; 313 enum radeon_tv_std tv_std; 314 struct radeon_tv_regs tv; 315 }; 316 317 struct radeon_encoder_int_tmds { 318 /* legacy int tmds */ 319 struct radeon_tmds_pll tmds_pll[4]; 320 }; 321 322 struct radeon_encoder_ext_tmds { 323 /* tmds over dvo */ 324 struct radeon_i2c_chan *i2c_bus; 325 uint8_t slave_addr; 326 enum radeon_dvo_chip dvo_chip; 327 }; 328 329 /* spread spectrum */ 330 struct radeon_atom_ss { 331 uint16_t percentage; 332 uint8_t type; 333 uint16_t step; 334 uint8_t delay; 335 uint8_t range; 336 uint8_t refdiv; 337 /* asic_ss */ 338 uint16_t rate; 339 uint16_t amount; 340 }; 341 342 struct radeon_encoder_atom_dig { 343 bool linkb; 344 /* atom dig */ 345 bool coherent_mode; 346 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */ 347 /* atom lvds/edp */ 348 uint32_t lcd_misc; 349 uint16_t panel_pwr_delay; 350 uint32_t lcd_ss_id; 351 /* panel mode */ 352 struct drm_display_mode native_mode; 353 }; 354 355 struct radeon_encoder_atom_dac { 356 enum radeon_tv_std tv_std; 357 }; 358 359 struct radeon_encoder { 360 struct drm_encoder base; 361 uint32_t encoder_enum; 362 uint32_t encoder_id; 363 uint32_t devices; 364 uint32_t active_device; 365 uint32_t flags; 366 uint32_t pixel_clock; 367 enum radeon_rmx_type rmx_type; 368 enum radeon_underscan_type underscan_type; 369 uint32_t underscan_hborder; 370 uint32_t underscan_vborder; 371 struct drm_display_mode native_mode; 372 void *enc_priv; 373 int audio_polling_active; 374 int hdmi_offset; 375 int hdmi_config_offset; 376 int hdmi_audio_workaround; 377 int hdmi_buffer_status; 378 bool is_ext_encoder; 379 }; 380 381 struct radeon_connector_atom_dig { 382 uint32_t igp_lane_info; 383 /* displayport */ 384 struct radeon_i2c_chan *dp_i2c_bus; 385 u8 dpcd[8]; 386 u8 dp_sink_type; 387 int dp_clock; 388 int dp_lane_count; 389 bool edp_on; 390 }; 391 392 struct radeon_gpio_rec { 393 bool valid; 394 u8 id; 395 u32 reg; 396 u32 mask; 397 }; 398 399 struct radeon_hpd { 400 enum radeon_hpd_id hpd; 401 u8 plugged_state; 402 struct radeon_gpio_rec gpio; 403 }; 404 405 struct radeon_router { 406 u32 router_id; 407 struct radeon_i2c_bus_rec i2c_info; 408 u8 i2c_addr; 409 /* i2c mux */ 410 bool ddc_valid; 411 u8 ddc_mux_type; 412 u8 ddc_mux_control_pin; 413 u8 ddc_mux_state; 414 /* clock/data mux */ 415 bool cd_valid; 416 u8 cd_mux_type; 417 u8 cd_mux_control_pin; 418 u8 cd_mux_state; 419 }; 420 421 struct radeon_connector { 422 struct drm_connector base; 423 uint32_t connector_id; 424 uint32_t devices; 425 struct radeon_i2c_chan *ddc_bus; 426 /* some systems have an hdmi and vga port with a shared ddc line */ 427 bool shared_ddc; 428 bool use_digital; 429 /* we need to mind the EDID between detect 430 and get modes due to analog/digital/tvencoder */ 431 struct edid *edid; 432 void *con_priv; 433 bool dac_load_detect; 434 uint16_t connector_object_id; 435 struct radeon_hpd hpd; 436 struct radeon_router router; 437 struct radeon_i2c_chan *router_bus; 438 }; 439 440 struct radeon_framebuffer { 441 struct drm_framebuffer base; 442 struct drm_gem_object *obj; 443 }; 444 445 /* radeon_get_crtc_scanoutpos() return flags */ 446 #define RADEON_SCANOUTPOS_VALID (1 << 0) 447 #define RADEON_SCANOUTPOS_INVBL (1 << 1) 448 #define RADEON_SCANOUTPOS_ACCURATE (1 << 2) 449 450 extern enum radeon_tv_std 451 radeon_combios_get_tv_info(struct radeon_device *rdev); 452 extern enum radeon_tv_std 453 radeon_atombios_get_tv_info(struct radeon_device *rdev); 454 455 extern struct drm_connector * 456 radeon_get_connector_for_encoder(struct drm_encoder *encoder); 457 458 extern void radeon_connector_hotplug(struct drm_connector *connector); 459 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); 460 extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector, 461 struct drm_display_mode *mode); 462 extern void radeon_dp_set_link_config(struct drm_connector *connector, 463 struct drm_display_mode *mode); 464 extern void dp_link_train(struct drm_encoder *encoder, 465 struct drm_connector *connector); 466 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); 467 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); 468 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action); 469 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, 470 int action, uint8_t lane_num, 471 uint8_t lane_set); 472 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, 473 uint8_t write_byte, uint8_t *read_byte); 474 475 extern void radeon_i2c_init(struct radeon_device *rdev); 476 extern void radeon_i2c_fini(struct radeon_device *rdev); 477 extern void radeon_combios_i2c_init(struct radeon_device *rdev); 478 extern void radeon_atombios_i2c_init(struct radeon_device *rdev); 479 extern void radeon_i2c_add(struct radeon_device *rdev, 480 struct radeon_i2c_bus_rec *rec, 481 const char *name); 482 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev, 483 struct radeon_i2c_bus_rec *i2c_bus); 484 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev, 485 struct radeon_i2c_bus_rec *rec, 486 const char *name); 487 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, 488 struct radeon_i2c_bus_rec *rec, 489 const char *name); 490 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); 491 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus, 492 u8 slave_addr, 493 u8 addr, 494 u8 *val); 495 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c, 496 u8 slave_addr, 497 u8 addr, 498 u8 val); 499 extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector); 500 extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector); 501 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); 502 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); 503 504 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); 505 506 extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev, 507 struct radeon_atom_ss *ss, 508 int id); 509 extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, 510 struct radeon_atom_ss *ss, 511 int id, u32 clock); 512 513 extern void radeon_compute_pll(struct radeon_pll *pll, 514 uint64_t freq, 515 uint32_t *dot_clock_p, 516 uint32_t *fb_div_p, 517 uint32_t *frac_fb_div_p, 518 uint32_t *ref_div_p, 519 uint32_t *post_div_p); 520 521 extern void radeon_setup_encoder_clones(struct drm_device *dev); 522 523 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index); 524 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv); 525 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); 526 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); 527 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); 528 extern void atombios_dvo_setup(struct drm_encoder *encoder, int action); 529 extern void atombios_digital_setup(struct drm_encoder *encoder, int action); 530 extern int atombios_get_encoder_mode(struct drm_encoder *encoder); 531 extern void atombios_set_edp_panel_power(struct drm_connector *connector, int action); 532 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder); 533 534 extern void radeon_crtc_load_lut(struct drm_crtc *crtc); 535 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, 536 struct drm_framebuffer *old_fb); 537 extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc, 538 struct drm_framebuffer *fb, 539 int x, int y, 540 enum mode_set_atomic state); 541 extern int atombios_crtc_mode_set(struct drm_crtc *crtc, 542 struct drm_display_mode *mode, 543 struct drm_display_mode *adjusted_mode, 544 int x, int y, 545 struct drm_framebuffer *old_fb); 546 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); 547 548 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, 549 struct drm_framebuffer *old_fb); 550 extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc, 551 struct drm_framebuffer *fb, 552 int x, int y, 553 enum mode_set_atomic state); 554 extern int radeon_crtc_do_set_base(struct drm_crtc *crtc, 555 struct drm_framebuffer *fb, 556 int x, int y, int atomic); 557 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, 558 struct drm_file *file_priv, 559 uint32_t handle, 560 uint32_t width, 561 uint32_t height); 562 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, 563 int x, int y); 564 565 extern int radeon_get_crtc_scanoutpos(struct radeon_device *rdev, int crtc, int *vpos, int *hpos); 566 567 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev); 568 extern struct edid * 569 radeon_combios_get_hardcoded_edid(struct radeon_device *rdev); 570 extern bool radeon_atom_get_clock_info(struct drm_device *dev); 571 extern bool radeon_combios_get_clock_info(struct drm_device *dev); 572 extern struct radeon_encoder_atom_dig * 573 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); 574 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, 575 struct radeon_encoder_int_tmds *tmds); 576 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder, 577 struct radeon_encoder_int_tmds *tmds); 578 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder, 579 struct radeon_encoder_int_tmds *tmds); 580 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder, 581 struct radeon_encoder_ext_tmds *tmds); 582 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder, 583 struct radeon_encoder_ext_tmds *tmds); 584 extern struct radeon_encoder_primary_dac * 585 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder); 586 extern struct radeon_encoder_tv_dac * 587 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder); 588 extern struct radeon_encoder_lvds * 589 radeon_combios_get_lvds_info(struct radeon_encoder *encoder); 590 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder); 591 extern struct radeon_encoder_tv_dac * 592 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder); 593 extern struct radeon_encoder_primary_dac * 594 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder); 595 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder); 596 extern void radeon_external_tmds_setup(struct drm_encoder *encoder); 597 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock); 598 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev); 599 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock); 600 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev); 601 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev); 602 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev); 603 extern void 604 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); 605 extern void 606 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); 607 extern void 608 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); 609 extern void 610 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); 611 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, 612 u16 blue, int regno); 613 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, 614 u16 *blue, int regno); 615 void radeon_framebuffer_init(struct drm_device *dev, 616 struct radeon_framebuffer *rfb, 617 struct drm_mode_fb_cmd *mode_cmd, 618 struct drm_gem_object *obj); 619 620 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); 621 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev); 622 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev); 623 void radeon_atombios_init_crtc(struct drm_device *dev, 624 struct radeon_crtc *radeon_crtc); 625 void radeon_legacy_init_crtc(struct drm_device *dev, 626 struct radeon_crtc *radeon_crtc); 627 628 void radeon_get_clock_info(struct drm_device *dev); 629 630 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev); 631 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev); 632 633 void radeon_enc_destroy(struct drm_encoder *encoder); 634 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); 635 void radeon_combios_asic_init(struct drm_device *dev); 636 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, 637 struct drm_display_mode *mode, 638 struct drm_display_mode *adjusted_mode); 639 void radeon_panel_mode_fixup(struct drm_encoder *encoder, 640 struct drm_display_mode *adjusted_mode); 641 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc); 642 643 /* legacy tv */ 644 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder, 645 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid, 646 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid); 647 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder, 648 uint32_t *htotal_cntl, uint32_t *ppll_ref_div, 649 uint32_t *ppll_div_3, uint32_t *pixclks_cntl); 650 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder, 651 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div, 652 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl); 653 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, 654 struct drm_display_mode *mode, 655 struct drm_display_mode *adjusted_mode); 656 657 /* fbdev layer */ 658 int radeon_fbdev_init(struct radeon_device *rdev); 659 void radeon_fbdev_fini(struct radeon_device *rdev); 660 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state); 661 int radeon_fbdev_total_size(struct radeon_device *rdev); 662 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj); 663 664 void radeon_fb_output_poll_changed(struct radeon_device *rdev); 665 #endif 666