1 /* 2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and 3 * VA Linux Systems Inc., Fremont, California. 4 * Copyright 2008 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Original Authors: 25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane 26 * 27 * Kernel port Author: Dave Airlie 28 */ 29 30 #ifndef RADEON_MODE_H 31 #define RADEON_MODE_H 32 33 #include <drm_crtc.h> 34 #include <drm_mode.h> 35 #include <drm_edid.h> 36 #include <drm_dp_helper.h> 37 #include <linux/i2c.h> 38 #include <linux/i2c-id.h> 39 #include <linux/i2c-algo-bit.h> 40 #include "radeon_fixed.h" 41 42 struct radeon_device; 43 44 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) 45 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) 46 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) 47 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) 48 49 enum radeon_rmx_type { 50 RMX_OFF, 51 RMX_FULL, 52 RMX_CENTER, 53 RMX_ASPECT 54 }; 55 56 enum radeon_tv_std { 57 TV_STD_NTSC, 58 TV_STD_PAL, 59 TV_STD_PAL_M, 60 TV_STD_PAL_60, 61 TV_STD_NTSC_J, 62 TV_STD_SCART_PAL, 63 TV_STD_SECAM, 64 TV_STD_PAL_CN, 65 TV_STD_PAL_N, 66 }; 67 68 /* radeon gpio-based i2c 69 * 1. "mask" reg and bits 70 * grabs the gpio pins for software use 71 * 0=not held 1=held 72 * 2. "a" reg and bits 73 * output pin value 74 * 0=low 1=high 75 * 3. "en" reg and bits 76 * sets the pin direction 77 * 0=input 1=output 78 * 4. "y" reg and bits 79 * input pin value 80 * 0=low 1=high 81 */ 82 struct radeon_i2c_bus_rec { 83 bool valid; 84 /* id used by atom */ 85 uint8_t i2c_id; 86 /* can be used with hw i2c engine */ 87 bool hw_capable; 88 /* uses multi-media i2c engine */ 89 bool mm_i2c; 90 /* regs and bits */ 91 uint32_t mask_clk_reg; 92 uint32_t mask_data_reg; 93 uint32_t a_clk_reg; 94 uint32_t a_data_reg; 95 uint32_t en_clk_reg; 96 uint32_t en_data_reg; 97 uint32_t y_clk_reg; 98 uint32_t y_data_reg; 99 uint32_t mask_clk_mask; 100 uint32_t mask_data_mask; 101 uint32_t a_clk_mask; 102 uint32_t a_data_mask; 103 uint32_t en_clk_mask; 104 uint32_t en_data_mask; 105 uint32_t y_clk_mask; 106 uint32_t y_data_mask; 107 }; 108 109 struct radeon_tmds_pll { 110 uint32_t freq; 111 uint32_t value; 112 }; 113 114 #define RADEON_MAX_BIOS_CONNECTOR 16 115 116 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0) 117 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) 118 #define RADEON_PLL_USE_REF_DIV (1 << 2) 119 #define RADEON_PLL_LEGACY (1 << 3) 120 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4) 121 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5) 122 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6) 123 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7) 124 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) 125 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) 126 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) 127 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) 128 129 struct radeon_pll { 130 uint16_t reference_freq; 131 uint16_t reference_div; 132 uint32_t pll_in_min; 133 uint32_t pll_in_max; 134 uint32_t pll_out_min; 135 uint32_t pll_out_max; 136 uint16_t xclk; 137 138 uint32_t min_ref_div; 139 uint32_t max_ref_div; 140 uint32_t min_post_div; 141 uint32_t max_post_div; 142 uint32_t min_feedback_div; 143 uint32_t max_feedback_div; 144 uint32_t min_frac_feedback_div; 145 uint32_t max_frac_feedback_div; 146 uint32_t best_vco; 147 }; 148 149 struct radeon_i2c_chan { 150 struct i2c_adapter adapter; 151 struct drm_device *dev; 152 union { 153 struct i2c_algo_dp_aux_data dp; 154 struct i2c_algo_bit_data bit; 155 } algo; 156 struct radeon_i2c_bus_rec rec; 157 }; 158 159 /* mostly for macs, but really any system without connector tables */ 160 enum radeon_connector_table { 161 CT_NONE, 162 CT_GENERIC, 163 CT_IBOOK, 164 CT_POWERBOOK_EXTERNAL, 165 CT_POWERBOOK_INTERNAL, 166 CT_POWERBOOK_VGA, 167 CT_MINI_EXTERNAL, 168 CT_MINI_INTERNAL, 169 CT_IMAC_G5_ISIGHT, 170 CT_EMAC, 171 }; 172 173 enum radeon_dvo_chip { 174 DVO_SIL164, 175 DVO_SIL1178, 176 }; 177 178 struct radeon_mode_info { 179 struct atom_context *atom_context; 180 struct card_info *atom_card_info; 181 enum radeon_connector_table connector_table; 182 bool mode_config_initialized; 183 struct radeon_crtc *crtcs[2]; 184 /* DVI-I properties */ 185 struct drm_property *coherent_mode_property; 186 /* DAC enable load detect */ 187 struct drm_property *load_detect_property; 188 /* TV standard load detect */ 189 struct drm_property *tv_std_property; 190 /* legacy TMDS PLL detect */ 191 struct drm_property *tmds_pll_property; 192 193 }; 194 195 #define MAX_H_CODE_TIMING_LEN 32 196 #define MAX_V_CODE_TIMING_LEN 32 197 198 /* need to store these as reading 199 back code tables is excessive */ 200 struct radeon_tv_regs { 201 uint32_t tv_uv_adr; 202 uint32_t timing_cntl; 203 uint32_t hrestart; 204 uint32_t vrestart; 205 uint32_t frestart; 206 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN]; 207 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN]; 208 }; 209 210 struct radeon_crtc { 211 struct drm_crtc base; 212 int crtc_id; 213 u16 lut_r[256], lut_g[256], lut_b[256]; 214 bool enabled; 215 bool can_tile; 216 uint32_t crtc_offset; 217 struct drm_gem_object *cursor_bo; 218 uint64_t cursor_addr; 219 int cursor_width; 220 int cursor_height; 221 uint32_t legacy_display_base_addr; 222 uint32_t legacy_cursor_offset; 223 enum radeon_rmx_type rmx_type; 224 fixed20_12 vsc; 225 fixed20_12 hsc; 226 struct drm_display_mode native_mode; 227 }; 228 229 struct radeon_encoder_primary_dac { 230 /* legacy primary dac */ 231 uint32_t ps2_pdac_adj; 232 }; 233 234 struct radeon_encoder_lvds { 235 /* legacy lvds */ 236 uint16_t panel_vcc_delay; 237 uint8_t panel_pwr_delay; 238 uint8_t panel_digon_delay; 239 uint8_t panel_blon_delay; 240 uint16_t panel_ref_divider; 241 uint8_t panel_post_divider; 242 uint16_t panel_fb_divider; 243 bool use_bios_dividers; 244 uint32_t lvds_gen_cntl; 245 /* panel mode */ 246 struct drm_display_mode native_mode; 247 }; 248 249 struct radeon_encoder_tv_dac { 250 /* legacy tv dac */ 251 uint32_t ps2_tvdac_adj; 252 uint32_t ntsc_tvdac_adj; 253 uint32_t pal_tvdac_adj; 254 255 int h_pos; 256 int v_pos; 257 int h_size; 258 int supported_tv_stds; 259 bool tv_on; 260 enum radeon_tv_std tv_std; 261 struct radeon_tv_regs tv; 262 }; 263 264 struct radeon_encoder_int_tmds { 265 /* legacy int tmds */ 266 struct radeon_tmds_pll tmds_pll[4]; 267 }; 268 269 struct radeon_encoder_ext_tmds { 270 /* tmds over dvo */ 271 struct radeon_i2c_chan *i2c_bus; 272 uint8_t slave_addr; 273 enum radeon_dvo_chip dvo_chip; 274 }; 275 276 /* spread spectrum */ 277 struct radeon_atom_ss { 278 uint16_t percentage; 279 uint8_t type; 280 uint8_t step; 281 uint8_t delay; 282 uint8_t range; 283 uint8_t refdiv; 284 }; 285 286 struct radeon_encoder_atom_dig { 287 /* atom dig */ 288 bool coherent_mode; 289 int dig_block; 290 /* atom lvds */ 291 uint32_t lvds_misc; 292 uint16_t panel_pwr_delay; 293 struct radeon_atom_ss *ss; 294 /* panel mode */ 295 struct drm_display_mode native_mode; 296 }; 297 298 struct radeon_encoder_atom_dac { 299 enum radeon_tv_std tv_std; 300 }; 301 302 struct radeon_encoder { 303 struct drm_encoder base; 304 uint32_t encoder_id; 305 uint32_t devices; 306 uint32_t active_device; 307 uint32_t flags; 308 uint32_t pixel_clock; 309 enum radeon_rmx_type rmx_type; 310 struct drm_display_mode native_mode; 311 void *enc_priv; 312 int hdmi_offset; 313 int hdmi_audio_workaround; 314 int hdmi_buffer_status; 315 }; 316 317 struct radeon_connector_atom_dig { 318 uint32_t igp_lane_info; 319 bool linkb; 320 /* displayport */ 321 struct radeon_i2c_chan *dp_i2c_bus; 322 u8 dpcd[8]; 323 u8 dp_sink_type; 324 int dp_clock; 325 int dp_lane_count; 326 }; 327 328 struct radeon_gpio_rec { 329 bool valid; 330 u8 id; 331 u32 reg; 332 u32 mask; 333 }; 334 335 enum radeon_hpd_id { 336 RADEON_HPD_NONE = 0, 337 RADEON_HPD_1, 338 RADEON_HPD_2, 339 RADEON_HPD_3, 340 RADEON_HPD_4, 341 RADEON_HPD_5, 342 RADEON_HPD_6, 343 }; 344 345 struct radeon_hpd { 346 enum radeon_hpd_id hpd; 347 u8 plugged_state; 348 struct radeon_gpio_rec gpio; 349 }; 350 351 struct radeon_connector { 352 struct drm_connector base; 353 uint32_t connector_id; 354 uint32_t devices; 355 struct radeon_i2c_chan *ddc_bus; 356 /* some systems have a an hdmi and vga port with a shared ddc line */ 357 bool shared_ddc; 358 bool use_digital; 359 /* we need to mind the EDID between detect 360 and get modes due to analog/digital/tvencoder */ 361 struct edid *edid; 362 void *con_priv; 363 bool dac_load_detect; 364 uint16_t connector_object_id; 365 struct radeon_hpd hpd; 366 }; 367 368 struct radeon_framebuffer { 369 struct drm_framebuffer base; 370 struct drm_gem_object *obj; 371 }; 372 373 extern enum radeon_tv_std 374 radeon_combios_get_tv_info(struct radeon_device *rdev); 375 extern enum radeon_tv_std 376 radeon_atombios_get_tv_info(struct radeon_device *rdev); 377 378 extern void radeon_connector_hotplug(struct drm_connector *connector); 379 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); 380 extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector, 381 struct drm_display_mode *mode); 382 extern void radeon_dp_set_link_config(struct drm_connector *connector, 383 struct drm_display_mode *mode); 384 extern void dp_link_train(struct drm_encoder *encoder, 385 struct drm_connector *connector); 386 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); 387 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); 388 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, 389 int action, uint8_t lane_num, 390 uint8_t lane_set); 391 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, 392 uint8_t write_byte, uint8_t *read_byte); 393 394 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev, 395 struct radeon_i2c_bus_rec *rec, 396 const char *name); 397 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, 398 struct radeon_i2c_bus_rec *rec, 399 const char *name); 400 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); 401 extern void radeon_i2c_sw_get_byte(struct radeon_i2c_chan *i2c_bus, 402 u8 slave_addr, 403 u8 addr, 404 u8 *val); 405 extern void radeon_i2c_sw_put_byte(struct radeon_i2c_chan *i2c, 406 u8 slave_addr, 407 u8 addr, 408 u8 val); 409 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); 410 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); 411 412 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); 413 414 extern void radeon_compute_pll(struct radeon_pll *pll, 415 uint64_t freq, 416 uint32_t *dot_clock_p, 417 uint32_t *fb_div_p, 418 uint32_t *frac_fb_div_p, 419 uint32_t *ref_div_p, 420 uint32_t *post_div_p, 421 int flags); 422 423 extern void radeon_compute_pll_avivo(struct radeon_pll *pll, 424 uint64_t freq, 425 uint32_t *dot_clock_p, 426 uint32_t *fb_div_p, 427 uint32_t *frac_fb_div_p, 428 uint32_t *ref_div_p, 429 uint32_t *post_div_p, 430 int flags); 431 432 extern void radeon_setup_encoder_clones(struct drm_device *dev); 433 434 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index); 435 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv); 436 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); 437 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); 438 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); 439 extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); 440 extern void atombios_digital_setup(struct drm_encoder *encoder, int action); 441 extern int atombios_get_encoder_mode(struct drm_encoder *encoder); 442 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder); 443 444 extern void radeon_crtc_load_lut(struct drm_crtc *crtc); 445 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, 446 struct drm_framebuffer *old_fb); 447 extern int atombios_crtc_mode_set(struct drm_crtc *crtc, 448 struct drm_display_mode *mode, 449 struct drm_display_mode *adjusted_mode, 450 int x, int y, 451 struct drm_framebuffer *old_fb); 452 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); 453 454 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, 455 struct drm_framebuffer *old_fb); 456 extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc); 457 458 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, 459 struct drm_file *file_priv, 460 uint32_t handle, 461 uint32_t width, 462 uint32_t height); 463 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, 464 int x, int y); 465 466 extern bool radeon_atom_get_clock_info(struct drm_device *dev); 467 extern bool radeon_combios_get_clock_info(struct drm_device *dev); 468 extern struct radeon_encoder_atom_dig * 469 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); 470 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, 471 struct radeon_encoder_int_tmds *tmds); 472 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder, 473 struct radeon_encoder_int_tmds *tmds); 474 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder, 475 struct radeon_encoder_int_tmds *tmds); 476 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder, 477 struct radeon_encoder_ext_tmds *tmds); 478 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder, 479 struct radeon_encoder_ext_tmds *tmds); 480 extern struct radeon_encoder_primary_dac * 481 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder); 482 extern struct radeon_encoder_tv_dac * 483 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder); 484 extern struct radeon_encoder_lvds * 485 radeon_combios_get_lvds_info(struct radeon_encoder *encoder); 486 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder); 487 extern struct radeon_encoder_tv_dac * 488 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder); 489 extern struct radeon_encoder_primary_dac * 490 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder); 491 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder); 492 extern void radeon_external_tmds_setup(struct drm_encoder *encoder); 493 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock); 494 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev); 495 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock); 496 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev); 497 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev); 498 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev); 499 extern void 500 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); 501 extern void 502 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); 503 extern void 504 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); 505 extern void 506 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); 507 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, 508 u16 blue, int regno); 509 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, 510 u16 *blue, int regno); 511 struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev, 512 struct drm_mode_fb_cmd *mode_cmd, 513 struct drm_gem_object *obj); 514 515 int radeonfb_probe(struct drm_device *dev); 516 517 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); 518 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev); 519 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev); 520 void radeon_atombios_init_crtc(struct drm_device *dev, 521 struct radeon_crtc *radeon_crtc); 522 void radeon_legacy_init_crtc(struct drm_device *dev, 523 struct radeon_crtc *radeon_crtc); 524 extern void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state); 525 526 void radeon_get_clock_info(struct drm_device *dev); 527 528 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev); 529 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev); 530 531 void radeon_enc_destroy(struct drm_encoder *encoder); 532 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); 533 void radeon_combios_asic_init(struct drm_device *dev); 534 extern int radeon_static_clocks_init(struct drm_device *dev); 535 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, 536 struct drm_display_mode *mode, 537 struct drm_display_mode *adjusted_mode); 538 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc); 539 540 /* legacy tv */ 541 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder, 542 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid, 543 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid); 544 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder, 545 uint32_t *htotal_cntl, uint32_t *ppll_ref_div, 546 uint32_t *ppll_div_3, uint32_t *pixclks_cntl); 547 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder, 548 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div, 549 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl); 550 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, 551 struct drm_display_mode *mode, 552 struct drm_display_mode *adjusted_mode); 553 #endif 554