1 /* 2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and 3 * VA Linux Systems Inc., Fremont, California. 4 * Copyright 2008 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Original Authors: 25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane 26 * 27 * Kernel port Author: Dave Airlie 28 */ 29 30 #ifndef RADEON_MODE_H 31 #define RADEON_MODE_H 32 33 #include <drm_crtc.h> 34 #include <drm_mode.h> 35 #include <drm_edid.h> 36 #include <drm_dp_helper.h> 37 #include <linux/i2c.h> 38 #include <linux/i2c-id.h> 39 #include <linux/i2c-algo-bit.h> 40 #include "radeon_fixed.h" 41 42 struct radeon_device; 43 44 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) 45 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) 46 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) 47 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) 48 49 enum radeon_connector_type { 50 CONNECTOR_NONE, 51 CONNECTOR_VGA, 52 CONNECTOR_DVI_I, 53 CONNECTOR_DVI_D, 54 CONNECTOR_DVI_A, 55 CONNECTOR_STV, 56 CONNECTOR_CTV, 57 CONNECTOR_LVDS, 58 CONNECTOR_DIGITAL, 59 CONNECTOR_SCART, 60 CONNECTOR_HDMI_TYPE_A, 61 CONNECTOR_HDMI_TYPE_B, 62 CONNECTOR_0XC, 63 CONNECTOR_0XD, 64 CONNECTOR_DIN, 65 CONNECTOR_DISPLAY_PORT, 66 CONNECTOR_UNSUPPORTED 67 }; 68 69 enum radeon_dvi_type { 70 DVI_AUTO, 71 DVI_DIGITAL, 72 DVI_ANALOG 73 }; 74 75 enum radeon_rmx_type { 76 RMX_OFF, 77 RMX_FULL, 78 RMX_CENTER, 79 RMX_ASPECT 80 }; 81 82 enum radeon_tv_std { 83 TV_STD_NTSC, 84 TV_STD_PAL, 85 TV_STD_PAL_M, 86 TV_STD_PAL_60, 87 TV_STD_NTSC_J, 88 TV_STD_SCART_PAL, 89 TV_STD_SECAM, 90 TV_STD_PAL_CN, 91 TV_STD_PAL_N, 92 }; 93 94 /* radeon gpio-based i2c 95 * 1. "mask" reg and bits 96 * grabs the gpio pins for software use 97 * 0=not held 1=held 98 * 2. "a" reg and bits 99 * output pin value 100 * 0=low 1=high 101 * 3. "en" reg and bits 102 * sets the pin direction 103 * 0=input 1=output 104 * 4. "y" reg and bits 105 * input pin value 106 * 0=low 1=high 107 */ 108 struct radeon_i2c_bus_rec { 109 bool valid; 110 /* id used by atom */ 111 uint8_t i2c_id; 112 /* can be used with hw i2c engine */ 113 bool hw_capable; 114 /* uses multi-media i2c engine */ 115 bool mm_i2c; 116 /* regs and bits */ 117 uint32_t mask_clk_reg; 118 uint32_t mask_data_reg; 119 uint32_t a_clk_reg; 120 uint32_t a_data_reg; 121 uint32_t en_clk_reg; 122 uint32_t en_data_reg; 123 uint32_t y_clk_reg; 124 uint32_t y_data_reg; 125 uint32_t mask_clk_mask; 126 uint32_t mask_data_mask; 127 uint32_t a_clk_mask; 128 uint32_t a_data_mask; 129 uint32_t en_clk_mask; 130 uint32_t en_data_mask; 131 uint32_t y_clk_mask; 132 uint32_t y_data_mask; 133 }; 134 135 struct radeon_tmds_pll { 136 uint32_t freq; 137 uint32_t value; 138 }; 139 140 #define RADEON_MAX_BIOS_CONNECTOR 16 141 142 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0) 143 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) 144 #define RADEON_PLL_USE_REF_DIV (1 << 2) 145 #define RADEON_PLL_LEGACY (1 << 3) 146 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4) 147 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5) 148 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6) 149 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7) 150 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) 151 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) 152 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) 153 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) 154 155 struct radeon_pll { 156 uint16_t reference_freq; 157 uint16_t reference_div; 158 uint32_t pll_in_min; 159 uint32_t pll_in_max; 160 uint32_t pll_out_min; 161 uint32_t pll_out_max; 162 uint16_t xclk; 163 164 uint32_t min_ref_div; 165 uint32_t max_ref_div; 166 uint32_t min_post_div; 167 uint32_t max_post_div; 168 uint32_t min_feedback_div; 169 uint32_t max_feedback_div; 170 uint32_t min_frac_feedback_div; 171 uint32_t max_frac_feedback_div; 172 uint32_t best_vco; 173 }; 174 175 struct radeon_i2c_chan { 176 struct i2c_adapter adapter; 177 struct drm_device *dev; 178 union { 179 struct i2c_algo_dp_aux_data dp; 180 struct i2c_algo_bit_data bit; 181 } algo; 182 struct radeon_i2c_bus_rec rec; 183 }; 184 185 /* mostly for macs, but really any system without connector tables */ 186 enum radeon_connector_table { 187 CT_NONE, 188 CT_GENERIC, 189 CT_IBOOK, 190 CT_POWERBOOK_EXTERNAL, 191 CT_POWERBOOK_INTERNAL, 192 CT_POWERBOOK_VGA, 193 CT_MINI_EXTERNAL, 194 CT_MINI_INTERNAL, 195 CT_IMAC_G5_ISIGHT, 196 CT_EMAC, 197 }; 198 199 enum radeon_dvo_chip { 200 DVO_SIL164, 201 DVO_SIL1178, 202 }; 203 204 struct radeon_mode_info { 205 struct atom_context *atom_context; 206 struct card_info *atom_card_info; 207 enum radeon_connector_table connector_table; 208 bool mode_config_initialized; 209 struct radeon_crtc *crtcs[2]; 210 /* DVI-I properties */ 211 struct drm_property *coherent_mode_property; 212 /* DAC enable load detect */ 213 struct drm_property *load_detect_property; 214 /* TV standard load detect */ 215 struct drm_property *tv_std_property; 216 /* legacy TMDS PLL detect */ 217 struct drm_property *tmds_pll_property; 218 219 }; 220 221 #define MAX_H_CODE_TIMING_LEN 32 222 #define MAX_V_CODE_TIMING_LEN 32 223 224 /* need to store these as reading 225 back code tables is excessive */ 226 struct radeon_tv_regs { 227 uint32_t tv_uv_adr; 228 uint32_t timing_cntl; 229 uint32_t hrestart; 230 uint32_t vrestart; 231 uint32_t frestart; 232 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN]; 233 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN]; 234 }; 235 236 struct radeon_crtc { 237 struct drm_crtc base; 238 int crtc_id; 239 u16 lut_r[256], lut_g[256], lut_b[256]; 240 bool enabled; 241 bool can_tile; 242 uint32_t crtc_offset; 243 struct drm_gem_object *cursor_bo; 244 uint64_t cursor_addr; 245 int cursor_width; 246 int cursor_height; 247 uint32_t legacy_display_base_addr; 248 uint32_t legacy_cursor_offset; 249 enum radeon_rmx_type rmx_type; 250 fixed20_12 vsc; 251 fixed20_12 hsc; 252 struct drm_display_mode native_mode; 253 }; 254 255 struct radeon_encoder_primary_dac { 256 /* legacy primary dac */ 257 uint32_t ps2_pdac_adj; 258 }; 259 260 struct radeon_encoder_lvds { 261 /* legacy lvds */ 262 uint16_t panel_vcc_delay; 263 uint8_t panel_pwr_delay; 264 uint8_t panel_digon_delay; 265 uint8_t panel_blon_delay; 266 uint16_t panel_ref_divider; 267 uint8_t panel_post_divider; 268 uint16_t panel_fb_divider; 269 bool use_bios_dividers; 270 uint32_t lvds_gen_cntl; 271 /* panel mode */ 272 struct drm_display_mode native_mode; 273 }; 274 275 struct radeon_encoder_tv_dac { 276 /* legacy tv dac */ 277 uint32_t ps2_tvdac_adj; 278 uint32_t ntsc_tvdac_adj; 279 uint32_t pal_tvdac_adj; 280 281 int h_pos; 282 int v_pos; 283 int h_size; 284 int supported_tv_stds; 285 bool tv_on; 286 enum radeon_tv_std tv_std; 287 struct radeon_tv_regs tv; 288 }; 289 290 struct radeon_encoder_int_tmds { 291 /* legacy int tmds */ 292 struct radeon_tmds_pll tmds_pll[4]; 293 }; 294 295 struct radeon_encoder_ext_tmds { 296 /* tmds over dvo */ 297 struct radeon_i2c_chan *i2c_bus; 298 uint8_t slave_addr; 299 enum radeon_dvo_chip dvo_chip; 300 }; 301 302 /* spread spectrum */ 303 struct radeon_atom_ss { 304 uint16_t percentage; 305 uint8_t type; 306 uint8_t step; 307 uint8_t delay; 308 uint8_t range; 309 uint8_t refdiv; 310 }; 311 312 struct radeon_encoder_atom_dig { 313 /* atom dig */ 314 bool coherent_mode; 315 int dig_block; 316 /* atom lvds */ 317 uint32_t lvds_misc; 318 uint16_t panel_pwr_delay; 319 struct radeon_atom_ss *ss; 320 /* panel mode */ 321 struct drm_display_mode native_mode; 322 }; 323 324 struct radeon_encoder_atom_dac { 325 enum radeon_tv_std tv_std; 326 }; 327 328 struct radeon_encoder { 329 struct drm_encoder base; 330 uint32_t encoder_id; 331 uint32_t devices; 332 uint32_t active_device; 333 uint32_t flags; 334 uint32_t pixel_clock; 335 enum radeon_rmx_type rmx_type; 336 struct drm_display_mode native_mode; 337 void *enc_priv; 338 int hdmi_offset; 339 int hdmi_audio_workaround; 340 int hdmi_buffer_status; 341 }; 342 343 struct radeon_connector_atom_dig { 344 uint32_t igp_lane_info; 345 bool linkb; 346 /* displayport */ 347 struct radeon_i2c_chan *dp_i2c_bus; 348 u8 dpcd[8]; 349 u8 dp_sink_type; 350 int dp_clock; 351 int dp_lane_count; 352 }; 353 354 struct radeon_gpio_rec { 355 bool valid; 356 u8 id; 357 u32 reg; 358 u32 mask; 359 }; 360 361 enum radeon_hpd_id { 362 RADEON_HPD_NONE = 0, 363 RADEON_HPD_1, 364 RADEON_HPD_2, 365 RADEON_HPD_3, 366 RADEON_HPD_4, 367 RADEON_HPD_5, 368 RADEON_HPD_6, 369 }; 370 371 struct radeon_hpd { 372 enum radeon_hpd_id hpd; 373 u8 plugged_state; 374 struct radeon_gpio_rec gpio; 375 }; 376 377 struct radeon_connector { 378 struct drm_connector base; 379 uint32_t connector_id; 380 uint32_t devices; 381 struct radeon_i2c_chan *ddc_bus; 382 /* some systems have a an hdmi and vga port with a shared ddc line */ 383 bool shared_ddc; 384 bool use_digital; 385 /* we need to mind the EDID between detect 386 and get modes due to analog/digital/tvencoder */ 387 struct edid *edid; 388 void *con_priv; 389 bool dac_load_detect; 390 uint16_t connector_object_id; 391 struct radeon_hpd hpd; 392 }; 393 394 struct radeon_framebuffer { 395 struct drm_framebuffer base; 396 struct drm_gem_object *obj; 397 }; 398 399 extern enum radeon_tv_std 400 radeon_combios_get_tv_info(struct radeon_device *rdev); 401 extern enum radeon_tv_std 402 radeon_atombios_get_tv_info(struct radeon_device *rdev); 403 404 extern void radeon_connector_hotplug(struct drm_connector *connector); 405 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); 406 extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector, 407 struct drm_display_mode *mode); 408 extern void radeon_dp_set_link_config(struct drm_connector *connector, 409 struct drm_display_mode *mode); 410 extern void dp_link_train(struct drm_encoder *encoder, 411 struct drm_connector *connector); 412 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); 413 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); 414 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, 415 int action, uint8_t lane_num, 416 uint8_t lane_set); 417 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, 418 uint8_t write_byte, uint8_t *read_byte); 419 420 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev, 421 struct radeon_i2c_bus_rec *rec, 422 const char *name); 423 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, 424 struct radeon_i2c_bus_rec *rec, 425 const char *name); 426 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); 427 extern void radeon_i2c_sw_get_byte(struct radeon_i2c_chan *i2c_bus, 428 u8 slave_addr, 429 u8 addr, 430 u8 *val); 431 extern void radeon_i2c_sw_put_byte(struct radeon_i2c_chan *i2c, 432 u8 slave_addr, 433 u8 addr, 434 u8 val); 435 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); 436 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); 437 438 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); 439 440 extern void radeon_compute_pll(struct radeon_pll *pll, 441 uint64_t freq, 442 uint32_t *dot_clock_p, 443 uint32_t *fb_div_p, 444 uint32_t *frac_fb_div_p, 445 uint32_t *ref_div_p, 446 uint32_t *post_div_p, 447 int flags); 448 449 extern void radeon_compute_pll_avivo(struct radeon_pll *pll, 450 uint64_t freq, 451 uint32_t *dot_clock_p, 452 uint32_t *fb_div_p, 453 uint32_t *frac_fb_div_p, 454 uint32_t *ref_div_p, 455 uint32_t *post_div_p, 456 int flags); 457 458 extern void radeon_setup_encoder_clones(struct drm_device *dev); 459 460 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index); 461 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv); 462 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); 463 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); 464 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); 465 extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); 466 extern void atombios_digital_setup(struct drm_encoder *encoder, int action); 467 extern int atombios_get_encoder_mode(struct drm_encoder *encoder); 468 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder); 469 470 extern void radeon_crtc_load_lut(struct drm_crtc *crtc); 471 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, 472 struct drm_framebuffer *old_fb); 473 extern int atombios_crtc_mode_set(struct drm_crtc *crtc, 474 struct drm_display_mode *mode, 475 struct drm_display_mode *adjusted_mode, 476 int x, int y, 477 struct drm_framebuffer *old_fb); 478 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); 479 480 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, 481 struct drm_framebuffer *old_fb); 482 extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc); 483 484 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, 485 struct drm_file *file_priv, 486 uint32_t handle, 487 uint32_t width, 488 uint32_t height); 489 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, 490 int x, int y); 491 492 extern bool radeon_atom_get_clock_info(struct drm_device *dev); 493 extern bool radeon_combios_get_clock_info(struct drm_device *dev); 494 extern struct radeon_encoder_atom_dig * 495 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); 496 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, 497 struct radeon_encoder_int_tmds *tmds); 498 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder, 499 struct radeon_encoder_int_tmds *tmds); 500 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder, 501 struct radeon_encoder_int_tmds *tmds); 502 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder, 503 struct radeon_encoder_ext_tmds *tmds); 504 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder, 505 struct radeon_encoder_ext_tmds *tmds); 506 extern struct radeon_encoder_primary_dac * 507 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder); 508 extern struct radeon_encoder_tv_dac * 509 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder); 510 extern struct radeon_encoder_lvds * 511 radeon_combios_get_lvds_info(struct radeon_encoder *encoder); 512 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder); 513 extern struct radeon_encoder_tv_dac * 514 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder); 515 extern struct radeon_encoder_primary_dac * 516 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder); 517 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder); 518 extern void radeon_external_tmds_setup(struct drm_encoder *encoder); 519 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock); 520 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev); 521 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock); 522 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev); 523 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev); 524 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev); 525 extern void 526 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); 527 extern void 528 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); 529 extern void 530 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); 531 extern void 532 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); 533 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, 534 u16 blue, int regno); 535 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, 536 u16 *blue, int regno); 537 struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev, 538 struct drm_mode_fb_cmd *mode_cmd, 539 struct drm_gem_object *obj); 540 541 int radeonfb_probe(struct drm_device *dev); 542 543 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); 544 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev); 545 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev); 546 void radeon_atombios_init_crtc(struct drm_device *dev, 547 struct radeon_crtc *radeon_crtc); 548 void radeon_legacy_init_crtc(struct drm_device *dev, 549 struct radeon_crtc *radeon_crtc); 550 extern void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state); 551 552 void radeon_get_clock_info(struct drm_device *dev); 553 554 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev); 555 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev); 556 557 void radeon_enc_destroy(struct drm_encoder *encoder); 558 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); 559 void radeon_combios_asic_init(struct drm_device *dev); 560 extern int radeon_static_clocks_init(struct drm_device *dev); 561 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, 562 struct drm_display_mode *mode, 563 struct drm_display_mode *adjusted_mode); 564 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc); 565 566 /* legacy tv */ 567 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder, 568 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid, 569 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid); 570 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder, 571 uint32_t *htotal_cntl, uint32_t *ppll_ref_div, 572 uint32_t *ppll_div_3, uint32_t *pixclks_cntl); 573 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder, 574 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div, 575 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl); 576 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, 577 struct drm_display_mode *mode, 578 struct drm_display_mode *adjusted_mode); 579 #endif 580