1 /* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Dave Airlie 25 * Alex Deucher 26 * Jerome Glisse 27 */ 28 #include "drmP.h" 29 #include "drm_sarea.h" 30 #include "radeon.h" 31 #include "radeon_drm.h" 32 33 #include <linux/vga_switcheroo.h> 34 #include <linux/slab.h> 35 36 int radeon_driver_unload_kms(struct drm_device *dev) 37 { 38 struct radeon_device *rdev = dev->dev_private; 39 40 if (rdev == NULL) 41 return 0; 42 radeon_modeset_fini(rdev); 43 radeon_device_fini(rdev); 44 kfree(rdev); 45 dev->dev_private = NULL; 46 return 0; 47 } 48 49 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) 50 { 51 struct radeon_device *rdev; 52 int r, acpi_status; 53 54 rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL); 55 if (rdev == NULL) { 56 return -ENOMEM; 57 } 58 dev->dev_private = (void *)rdev; 59 60 /* update BUS flag */ 61 if (drm_device_is_agp(dev)) { 62 flags |= RADEON_IS_AGP; 63 } else if (drm_device_is_pcie(dev)) { 64 flags |= RADEON_IS_PCIE; 65 } else { 66 flags |= RADEON_IS_PCI; 67 } 68 69 /* radeon_device_init should report only fatal error 70 * like memory allocation failure or iomapping failure, 71 * or memory manager initialization failure, it must 72 * properly initialize the GPU MC controller and permit 73 * VRAM allocation 74 */ 75 r = radeon_device_init(rdev, dev, dev->pdev, flags); 76 if (r) { 77 dev_err(&dev->pdev->dev, "Fatal error during GPU init\n"); 78 goto out; 79 } 80 81 /* Call ACPI methods */ 82 acpi_status = radeon_acpi_init(rdev); 83 if (acpi_status) 84 dev_dbg(&dev->pdev->dev, "Error during ACPI methods call\n"); 85 86 /* Again modeset_init should fail only on fatal error 87 * otherwise it should provide enough functionalities 88 * for shadowfb to run 89 */ 90 r = radeon_modeset_init(rdev); 91 if (r) 92 dev_err(&dev->pdev->dev, "Fatal error during modeset init\n"); 93 out: 94 if (r) 95 radeon_driver_unload_kms(dev); 96 return r; 97 } 98 99 100 /* 101 * Userspace get informations ioctl 102 */ 103 int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) 104 { 105 struct radeon_device *rdev = dev->dev_private; 106 struct drm_radeon_info *info; 107 struct radeon_mode_info *minfo = &rdev->mode_info; 108 uint32_t *value_ptr; 109 uint32_t value; 110 struct drm_crtc *crtc; 111 int i, found; 112 113 info = data; 114 value_ptr = (uint32_t *)((unsigned long)info->value); 115 if (DRM_COPY_FROM_USER(&value, value_ptr, sizeof(value))) 116 return -EFAULT; 117 118 switch (info->request) { 119 case RADEON_INFO_DEVICE_ID: 120 value = dev->pci_device; 121 break; 122 case RADEON_INFO_NUM_GB_PIPES: 123 value = rdev->num_gb_pipes; 124 break; 125 case RADEON_INFO_NUM_Z_PIPES: 126 value = rdev->num_z_pipes; 127 break; 128 case RADEON_INFO_ACCEL_WORKING: 129 /* xf86-video-ati 6.13.0 relies on this being false for evergreen */ 130 if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK)) 131 value = false; 132 else 133 value = rdev->accel_working; 134 break; 135 case RADEON_INFO_CRTC_FROM_ID: 136 for (i = 0, found = 0; i < rdev->num_crtc; i++) { 137 crtc = (struct drm_crtc *)minfo->crtcs[i]; 138 if (crtc && crtc->base.id == value) { 139 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 140 value = radeon_crtc->crtc_id; 141 found = 1; 142 break; 143 } 144 } 145 if (!found) { 146 DRM_DEBUG_KMS("unknown crtc id %d\n", value); 147 return -EINVAL; 148 } 149 break; 150 case RADEON_INFO_ACCEL_WORKING2: 151 value = rdev->accel_working; 152 break; 153 case RADEON_INFO_TILING_CONFIG: 154 if (rdev->family >= CHIP_CEDAR) 155 value = rdev->config.evergreen.tile_config; 156 else if (rdev->family >= CHIP_RV770) 157 value = rdev->config.rv770.tile_config; 158 else if (rdev->family >= CHIP_R600) 159 value = rdev->config.r600.tile_config; 160 else { 161 DRM_DEBUG_KMS("tiling config is r6xx+ only!\n"); 162 return -EINVAL; 163 } 164 break; 165 case RADEON_INFO_WANT_HYPERZ: 166 /* The "value" here is both an input and output parameter. 167 * If the input value is 1, filp requests hyper-z access. 168 * If the input value is 0, filp revokes its hyper-z access. 169 * 170 * When returning, the value is 1 if filp owns hyper-z access, 171 * 0 otherwise. */ 172 if (value >= 2) { 173 DRM_DEBUG_KMS("WANT_HYPERZ: invalid value %d\n", value); 174 return -EINVAL; 175 } 176 mutex_lock(&dev->struct_mutex); 177 if (value == 1) { 178 /* wants hyper-z */ 179 if (!rdev->hyperz_filp) 180 rdev->hyperz_filp = filp; 181 } else if (value == 0) { 182 /* revokes hyper-z */ 183 if (rdev->hyperz_filp == filp) 184 rdev->hyperz_filp = NULL; 185 } 186 value = rdev->hyperz_filp == filp ? 1 : 0; 187 mutex_unlock(&dev->struct_mutex); 188 break; 189 default: 190 DRM_DEBUG_KMS("Invalid request %d\n", info->request); 191 return -EINVAL; 192 } 193 if (DRM_COPY_TO_USER(value_ptr, &value, sizeof(uint32_t))) { 194 DRM_ERROR("copy_to_user\n"); 195 return -EFAULT; 196 } 197 return 0; 198 } 199 200 201 /* 202 * Outdated mess for old drm with Xorg being in charge (void function now). 203 */ 204 int radeon_driver_firstopen_kms(struct drm_device *dev) 205 { 206 struct radeon_device *rdev = dev->dev_private; 207 208 if (rdev->powered_down) 209 return -EINVAL; 210 return 0; 211 } 212 213 214 void radeon_driver_lastclose_kms(struct drm_device *dev) 215 { 216 vga_switcheroo_process_delayed_switch(); 217 } 218 219 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv) 220 { 221 return 0; 222 } 223 224 void radeon_driver_postclose_kms(struct drm_device *dev, 225 struct drm_file *file_priv) 226 { 227 } 228 229 void radeon_driver_preclose_kms(struct drm_device *dev, 230 struct drm_file *file_priv) 231 { 232 struct radeon_device *rdev = dev->dev_private; 233 if (rdev->hyperz_filp == file_priv) 234 rdev->hyperz_filp = NULL; 235 } 236 237 /* 238 * VBlank related functions. 239 */ 240 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc) 241 { 242 struct radeon_device *rdev = dev->dev_private; 243 244 if (crtc < 0 || crtc >= rdev->num_crtc) { 245 DRM_ERROR("Invalid crtc %d\n", crtc); 246 return -EINVAL; 247 } 248 249 return radeon_get_vblank_counter(rdev, crtc); 250 } 251 252 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc) 253 { 254 struct radeon_device *rdev = dev->dev_private; 255 256 if (crtc < 0 || crtc >= rdev->num_crtc) { 257 DRM_ERROR("Invalid crtc %d\n", crtc); 258 return -EINVAL; 259 } 260 261 rdev->irq.crtc_vblank_int[crtc] = true; 262 263 return radeon_irq_set(rdev); 264 } 265 266 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc) 267 { 268 struct radeon_device *rdev = dev->dev_private; 269 270 if (crtc < 0 || crtc >= rdev->num_crtc) { 271 DRM_ERROR("Invalid crtc %d\n", crtc); 272 return; 273 } 274 275 rdev->irq.crtc_vblank_int[crtc] = false; 276 277 radeon_irq_set(rdev); 278 } 279 280 281 /* 282 * IOCTL. 283 */ 284 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data, 285 struct drm_file *file_priv) 286 { 287 /* Not valid in KMS. */ 288 return -EINVAL; 289 } 290 291 #define KMS_INVALID_IOCTL(name) \ 292 int name(struct drm_device *dev, void *data, struct drm_file *file_priv)\ 293 { \ 294 DRM_ERROR("invalid ioctl with kms %s\n", __func__); \ 295 return -EINVAL; \ 296 } 297 298 /* 299 * All these ioctls are invalid in kms world. 300 */ 301 KMS_INVALID_IOCTL(radeon_cp_init_kms) 302 KMS_INVALID_IOCTL(radeon_cp_start_kms) 303 KMS_INVALID_IOCTL(radeon_cp_stop_kms) 304 KMS_INVALID_IOCTL(radeon_cp_reset_kms) 305 KMS_INVALID_IOCTL(radeon_cp_idle_kms) 306 KMS_INVALID_IOCTL(radeon_cp_resume_kms) 307 KMS_INVALID_IOCTL(radeon_engine_reset_kms) 308 KMS_INVALID_IOCTL(radeon_fullscreen_kms) 309 KMS_INVALID_IOCTL(radeon_cp_swap_kms) 310 KMS_INVALID_IOCTL(radeon_cp_clear_kms) 311 KMS_INVALID_IOCTL(radeon_cp_vertex_kms) 312 KMS_INVALID_IOCTL(radeon_cp_indices_kms) 313 KMS_INVALID_IOCTL(radeon_cp_texture_kms) 314 KMS_INVALID_IOCTL(radeon_cp_stipple_kms) 315 KMS_INVALID_IOCTL(radeon_cp_indirect_kms) 316 KMS_INVALID_IOCTL(radeon_cp_vertex2_kms) 317 KMS_INVALID_IOCTL(radeon_cp_cmdbuf_kms) 318 KMS_INVALID_IOCTL(radeon_cp_getparam_kms) 319 KMS_INVALID_IOCTL(radeon_cp_flip_kms) 320 KMS_INVALID_IOCTL(radeon_mem_alloc_kms) 321 KMS_INVALID_IOCTL(radeon_mem_free_kms) 322 KMS_INVALID_IOCTL(radeon_mem_init_heap_kms) 323 KMS_INVALID_IOCTL(radeon_irq_emit_kms) 324 KMS_INVALID_IOCTL(radeon_irq_wait_kms) 325 KMS_INVALID_IOCTL(radeon_cp_setparam_kms) 326 KMS_INVALID_IOCTL(radeon_surface_alloc_kms) 327 KMS_INVALID_IOCTL(radeon_surface_free_kms) 328 329 330 struct drm_ioctl_desc radeon_ioctls_kms[] = { 331 DRM_IOCTL_DEF_DRV(RADEON_CP_INIT, radeon_cp_init_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 332 DRM_IOCTL_DEF_DRV(RADEON_CP_START, radeon_cp_start_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 333 DRM_IOCTL_DEF_DRV(RADEON_CP_STOP, radeon_cp_stop_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 334 DRM_IOCTL_DEF_DRV(RADEON_CP_RESET, radeon_cp_reset_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 335 DRM_IOCTL_DEF_DRV(RADEON_CP_IDLE, radeon_cp_idle_kms, DRM_AUTH), 336 DRM_IOCTL_DEF_DRV(RADEON_CP_RESUME, radeon_cp_resume_kms, DRM_AUTH), 337 DRM_IOCTL_DEF_DRV(RADEON_RESET, radeon_engine_reset_kms, DRM_AUTH), 338 DRM_IOCTL_DEF_DRV(RADEON_FULLSCREEN, radeon_fullscreen_kms, DRM_AUTH), 339 DRM_IOCTL_DEF_DRV(RADEON_SWAP, radeon_cp_swap_kms, DRM_AUTH), 340 DRM_IOCTL_DEF_DRV(RADEON_CLEAR, radeon_cp_clear_kms, DRM_AUTH), 341 DRM_IOCTL_DEF_DRV(RADEON_VERTEX, radeon_cp_vertex_kms, DRM_AUTH), 342 DRM_IOCTL_DEF_DRV(RADEON_INDICES, radeon_cp_indices_kms, DRM_AUTH), 343 DRM_IOCTL_DEF_DRV(RADEON_TEXTURE, radeon_cp_texture_kms, DRM_AUTH), 344 DRM_IOCTL_DEF_DRV(RADEON_STIPPLE, radeon_cp_stipple_kms, DRM_AUTH), 345 DRM_IOCTL_DEF_DRV(RADEON_INDIRECT, radeon_cp_indirect_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 346 DRM_IOCTL_DEF_DRV(RADEON_VERTEX2, radeon_cp_vertex2_kms, DRM_AUTH), 347 DRM_IOCTL_DEF_DRV(RADEON_CMDBUF, radeon_cp_cmdbuf_kms, DRM_AUTH), 348 DRM_IOCTL_DEF_DRV(RADEON_GETPARAM, radeon_cp_getparam_kms, DRM_AUTH), 349 DRM_IOCTL_DEF_DRV(RADEON_FLIP, radeon_cp_flip_kms, DRM_AUTH), 350 DRM_IOCTL_DEF_DRV(RADEON_ALLOC, radeon_mem_alloc_kms, DRM_AUTH), 351 DRM_IOCTL_DEF_DRV(RADEON_FREE, radeon_mem_free_kms, DRM_AUTH), 352 DRM_IOCTL_DEF_DRV(RADEON_INIT_HEAP, radeon_mem_init_heap_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 353 DRM_IOCTL_DEF_DRV(RADEON_IRQ_EMIT, radeon_irq_emit_kms, DRM_AUTH), 354 DRM_IOCTL_DEF_DRV(RADEON_IRQ_WAIT, radeon_irq_wait_kms, DRM_AUTH), 355 DRM_IOCTL_DEF_DRV(RADEON_SETPARAM, radeon_cp_setparam_kms, DRM_AUTH), 356 DRM_IOCTL_DEF_DRV(RADEON_SURF_ALLOC, radeon_surface_alloc_kms, DRM_AUTH), 357 DRM_IOCTL_DEF_DRV(RADEON_SURF_FREE, radeon_surface_free_kms, DRM_AUTH), 358 /* KMS */ 359 DRM_IOCTL_DEF_DRV(RADEON_GEM_INFO, radeon_gem_info_ioctl, DRM_AUTH|DRM_UNLOCKED), 360 DRM_IOCTL_DEF_DRV(RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH|DRM_UNLOCKED), 361 DRM_IOCTL_DEF_DRV(RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH|DRM_UNLOCKED), 362 DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH|DRM_UNLOCKED), 363 DRM_IOCTL_DEF_DRV(RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH|DRM_UNLOCKED), 364 DRM_IOCTL_DEF_DRV(RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH|DRM_UNLOCKED), 365 DRM_IOCTL_DEF_DRV(RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH|DRM_UNLOCKED), 366 DRM_IOCTL_DEF_DRV(RADEON_CS, radeon_cs_ioctl, DRM_AUTH|DRM_UNLOCKED), 367 DRM_IOCTL_DEF_DRV(RADEON_INFO, radeon_info_ioctl, DRM_AUTH|DRM_UNLOCKED), 368 DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED), 369 DRM_IOCTL_DEF_DRV(RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED), 370 DRM_IOCTL_DEF_DRV(RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED), 371 }; 372 int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms); 373