1 /* 2 * Copyright 2009 Jerome Glisse. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 19 * USE OR OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * The above copyright notice and this permission notice (including the 22 * next paragraph) shall be included in all copies or substantial portions 23 * of the Software. 24 * 25 */ 26 /* 27 * Authors: 28 * Jerome Glisse <glisse@freedesktop.org> 29 * Dave Airlie 30 */ 31 #include <linux/seq_file.h> 32 #include <asm/atomic.h> 33 #include <linux/wait.h> 34 #include <linux/list.h> 35 #include <linux/kref.h> 36 #include <linux/slab.h> 37 #include "drmP.h" 38 #include "drm.h" 39 #include "radeon_reg.h" 40 #include "radeon.h" 41 #include "radeon_trace.h" 42 43 int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence) 44 { 45 unsigned long irq_flags; 46 47 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags); 48 if (fence->emited) { 49 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 50 return 0; 51 } 52 fence->seq = atomic_add_return(1, &rdev->fence_drv.seq); 53 if (!rdev->cp.ready) { 54 /* FIXME: cp is not running assume everythings is done right 55 * away 56 */ 57 WREG32(rdev->fence_drv.scratch_reg, fence->seq); 58 } else 59 radeon_fence_ring_emit(rdev, fence); 60 61 trace_radeon_fence_emit(rdev->ddev, fence->seq); 62 fence->emited = true; 63 list_move_tail(&fence->list, &rdev->fence_drv.emited); 64 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 65 return 0; 66 } 67 68 static bool radeon_fence_poll_locked(struct radeon_device *rdev) 69 { 70 struct radeon_fence *fence; 71 struct list_head *i, *n; 72 uint32_t seq; 73 bool wake = false; 74 unsigned long cjiffies; 75 76 if (rdev->wb.enabled) { 77 u32 scratch_index; 78 if (rdev->wb.use_event) 79 scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; 80 else 81 scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; 82 seq = rdev->wb.wb[scratch_index/4]; 83 } else 84 seq = RREG32(rdev->fence_drv.scratch_reg); 85 if (seq != rdev->fence_drv.last_seq) { 86 rdev->fence_drv.last_seq = seq; 87 rdev->fence_drv.last_jiffies = jiffies; 88 rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT; 89 } else { 90 cjiffies = jiffies; 91 if (time_after(cjiffies, rdev->fence_drv.last_jiffies)) { 92 cjiffies -= rdev->fence_drv.last_jiffies; 93 if (time_after(rdev->fence_drv.last_timeout, cjiffies)) { 94 /* update the timeout */ 95 rdev->fence_drv.last_timeout -= cjiffies; 96 } else { 97 /* the 500ms timeout is elapsed we should test 98 * for GPU lockup 99 */ 100 rdev->fence_drv.last_timeout = 1; 101 } 102 } else { 103 /* wrap around update last jiffies, we will just wait 104 * a little longer 105 */ 106 rdev->fence_drv.last_jiffies = cjiffies; 107 } 108 return false; 109 } 110 n = NULL; 111 list_for_each(i, &rdev->fence_drv.emited) { 112 fence = list_entry(i, struct radeon_fence, list); 113 if (fence->seq == seq) { 114 n = i; 115 break; 116 } 117 } 118 /* all fence previous to this one are considered as signaled */ 119 if (n) { 120 i = n; 121 do { 122 n = i->prev; 123 list_move_tail(i, &rdev->fence_drv.signaled); 124 fence = list_entry(i, struct radeon_fence, list); 125 fence->signaled = true; 126 i = n; 127 } while (i != &rdev->fence_drv.emited); 128 wake = true; 129 } 130 return wake; 131 } 132 133 static void radeon_fence_destroy(struct kref *kref) 134 { 135 unsigned long irq_flags; 136 struct radeon_fence *fence; 137 138 fence = container_of(kref, struct radeon_fence, kref); 139 write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags); 140 list_del(&fence->list); 141 fence->emited = false; 142 write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags); 143 kfree(fence); 144 } 145 146 int radeon_fence_create(struct radeon_device *rdev, struct radeon_fence **fence) 147 { 148 unsigned long irq_flags; 149 150 *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL); 151 if ((*fence) == NULL) { 152 return -ENOMEM; 153 } 154 kref_init(&((*fence)->kref)); 155 (*fence)->rdev = rdev; 156 (*fence)->emited = false; 157 (*fence)->signaled = false; 158 (*fence)->seq = 0; 159 INIT_LIST_HEAD(&(*fence)->list); 160 161 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags); 162 list_add_tail(&(*fence)->list, &rdev->fence_drv.created); 163 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 164 return 0; 165 } 166 167 168 bool radeon_fence_signaled(struct radeon_fence *fence) 169 { 170 unsigned long irq_flags; 171 bool signaled = false; 172 173 if (!fence) 174 return true; 175 176 if (fence->rdev->gpu_lockup) 177 return true; 178 179 write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags); 180 signaled = fence->signaled; 181 /* if we are shuting down report all fence as signaled */ 182 if (fence->rdev->shutdown) { 183 signaled = true; 184 } 185 if (!fence->emited) { 186 WARN(1, "Querying an unemited fence : %p !\n", fence); 187 signaled = true; 188 } 189 if (!signaled) { 190 radeon_fence_poll_locked(fence->rdev); 191 signaled = fence->signaled; 192 } 193 write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags); 194 return signaled; 195 } 196 197 int radeon_fence_wait(struct radeon_fence *fence, bool intr) 198 { 199 struct radeon_device *rdev; 200 unsigned long irq_flags, timeout; 201 u32 seq; 202 int r; 203 204 if (fence == NULL) { 205 WARN(1, "Querying an invalid fence : %p !\n", fence); 206 return 0; 207 } 208 rdev = fence->rdev; 209 if (radeon_fence_signaled(fence)) { 210 return 0; 211 } 212 timeout = rdev->fence_drv.last_timeout; 213 retry: 214 /* save current sequence used to check for GPU lockup */ 215 seq = rdev->fence_drv.last_seq; 216 trace_radeon_fence_wait_begin(rdev->ddev, seq); 217 if (intr) { 218 radeon_irq_kms_sw_irq_get(rdev); 219 r = wait_event_interruptible_timeout(rdev->fence_drv.queue, 220 radeon_fence_signaled(fence), timeout); 221 radeon_irq_kms_sw_irq_put(rdev); 222 if (unlikely(r < 0)) { 223 return r; 224 } 225 } else { 226 radeon_irq_kms_sw_irq_get(rdev); 227 r = wait_event_timeout(rdev->fence_drv.queue, 228 radeon_fence_signaled(fence), timeout); 229 radeon_irq_kms_sw_irq_put(rdev); 230 } 231 trace_radeon_fence_wait_end(rdev->ddev, seq); 232 if (unlikely(!radeon_fence_signaled(fence))) { 233 /* we were interrupted for some reason and fence isn't 234 * isn't signaled yet, resume wait 235 */ 236 if (r) { 237 timeout = r; 238 goto retry; 239 } 240 /* don't protect read access to rdev->fence_drv.last_seq 241 * if we experiencing a lockup the value doesn't change 242 */ 243 if (seq == rdev->fence_drv.last_seq && radeon_gpu_is_lockup(rdev)) { 244 /* good news we believe it's a lockup */ 245 WARN(1, "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n", 246 fence->seq, seq); 247 /* FIXME: what should we do ? marking everyone 248 * as signaled for now 249 */ 250 rdev->gpu_lockup = true; 251 r = radeon_gpu_reset(rdev); 252 if (r) 253 return r; 254 WREG32(rdev->fence_drv.scratch_reg, fence->seq); 255 rdev->gpu_lockup = false; 256 } 257 timeout = RADEON_FENCE_JIFFIES_TIMEOUT; 258 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags); 259 rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT; 260 rdev->fence_drv.last_jiffies = jiffies; 261 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 262 goto retry; 263 } 264 return 0; 265 } 266 267 int radeon_fence_wait_next(struct radeon_device *rdev) 268 { 269 unsigned long irq_flags; 270 struct radeon_fence *fence; 271 int r; 272 273 if (rdev->gpu_lockup) { 274 return 0; 275 } 276 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags); 277 if (list_empty(&rdev->fence_drv.emited)) { 278 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 279 return 0; 280 } 281 fence = list_entry(rdev->fence_drv.emited.next, 282 struct radeon_fence, list); 283 radeon_fence_ref(fence); 284 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 285 r = radeon_fence_wait(fence, false); 286 radeon_fence_unref(&fence); 287 return r; 288 } 289 290 int radeon_fence_wait_last(struct radeon_device *rdev) 291 { 292 unsigned long irq_flags; 293 struct radeon_fence *fence; 294 int r; 295 296 if (rdev->gpu_lockup) { 297 return 0; 298 } 299 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags); 300 if (list_empty(&rdev->fence_drv.emited)) { 301 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 302 return 0; 303 } 304 fence = list_entry(rdev->fence_drv.emited.prev, 305 struct radeon_fence, list); 306 radeon_fence_ref(fence); 307 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 308 r = radeon_fence_wait(fence, false); 309 radeon_fence_unref(&fence); 310 return r; 311 } 312 313 struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence) 314 { 315 kref_get(&fence->kref); 316 return fence; 317 } 318 319 void radeon_fence_unref(struct radeon_fence **fence) 320 { 321 struct radeon_fence *tmp = *fence; 322 323 *fence = NULL; 324 if (tmp) { 325 kref_put(&tmp->kref, &radeon_fence_destroy); 326 } 327 } 328 329 void radeon_fence_process(struct radeon_device *rdev) 330 { 331 unsigned long irq_flags; 332 bool wake; 333 334 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags); 335 wake = radeon_fence_poll_locked(rdev); 336 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 337 if (wake) { 338 wake_up_all(&rdev->fence_drv.queue); 339 } 340 } 341 342 int radeon_fence_driver_init(struct radeon_device *rdev) 343 { 344 unsigned long irq_flags; 345 int r; 346 347 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags); 348 r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg); 349 if (r) { 350 dev_err(rdev->dev, "fence failed to get scratch register\n"); 351 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 352 return r; 353 } 354 WREG32(rdev->fence_drv.scratch_reg, 0); 355 atomic_set(&rdev->fence_drv.seq, 0); 356 INIT_LIST_HEAD(&rdev->fence_drv.created); 357 INIT_LIST_HEAD(&rdev->fence_drv.emited); 358 INIT_LIST_HEAD(&rdev->fence_drv.signaled); 359 init_waitqueue_head(&rdev->fence_drv.queue); 360 rdev->fence_drv.initialized = true; 361 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 362 if (radeon_debugfs_fence_init(rdev)) { 363 dev_err(rdev->dev, "fence debugfs file creation failed\n"); 364 } 365 return 0; 366 } 367 368 void radeon_fence_driver_fini(struct radeon_device *rdev) 369 { 370 unsigned long irq_flags; 371 372 if (!rdev->fence_drv.initialized) 373 return; 374 wake_up_all(&rdev->fence_drv.queue); 375 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags); 376 radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg); 377 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 378 rdev->fence_drv.initialized = false; 379 } 380 381 382 /* 383 * Fence debugfs 384 */ 385 #if defined(CONFIG_DEBUG_FS) 386 static int radeon_debugfs_fence_info(struct seq_file *m, void *data) 387 { 388 struct drm_info_node *node = (struct drm_info_node *)m->private; 389 struct drm_device *dev = node->minor->dev; 390 struct radeon_device *rdev = dev->dev_private; 391 struct radeon_fence *fence; 392 393 seq_printf(m, "Last signaled fence 0x%08X\n", 394 RREG32(rdev->fence_drv.scratch_reg)); 395 if (!list_empty(&rdev->fence_drv.emited)) { 396 fence = list_entry(rdev->fence_drv.emited.prev, 397 struct radeon_fence, list); 398 seq_printf(m, "Last emited fence %p with 0x%08X\n", 399 fence, fence->seq); 400 } 401 return 0; 402 } 403 404 static struct drm_info_list radeon_debugfs_fence_list[] = { 405 {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL}, 406 }; 407 #endif 408 409 int radeon_debugfs_fence_init(struct radeon_device *rdev) 410 { 411 #if defined(CONFIG_DEBUG_FS) 412 return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1); 413 #else 414 return 0; 415 #endif 416 } 417