1 /** 2 * \file radeon_drv.c 3 * ATI Radeon driver 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8 /* 9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 10 * All Rights Reserved. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a 13 * copy of this software and associated documentation files (the "Software"), 14 * to deal in the Software without restriction, including without limitation 15 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 16 * and/or sell copies of the Software, and to permit persons to whom the 17 * Software is furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice (including the next 20 * paragraph) shall be included in all copies or substantial portions of the 21 * Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * OTHER DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include <drm/drmP.h> 33 #include <drm/radeon_drm.h> 34 #include "radeon_drv.h" 35 36 #include <drm/drm_pciids.h> 37 #include <linux/console.h> 38 #include <linux/module.h> 39 #include <linux/pm_runtime.h> 40 #include <linux/vga_switcheroo.h> 41 #include "drm_crtc_helper.h" 42 /* 43 * KMS wrapper. 44 * - 2.0.0 - initial interface 45 * - 2.1.0 - add square tiling interface 46 * - 2.2.0 - add r6xx/r7xx const buffer support 47 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 48 * - 2.4.0 - add crtc id query 49 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 50 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 51 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 52 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 53 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 54 * 2.10.0 - fusion 2D tiling 55 * 2.11.0 - backend map, initial compute support for the CS checker 56 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 57 * 2.13.0 - virtual memory support, streamout 58 * 2.14.0 - add evergreen tiling informations 59 * 2.15.0 - add max_pipes query 60 * 2.16.0 - fix evergreen 2D tiled surface calculation 61 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx 62 * 2.18.0 - r600-eg: allow "invalid" DB formats 63 * 2.19.0 - r600-eg: MSAA textures 64 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query 65 * 2.21.0 - r600-r700: FMASK and CMASK 66 * 2.22.0 - r600 only: RESOLVE_BOX allowed 67 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 68 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures 69 * 2.25.0 - eg+: new info request for num SE and num SH 70 * 2.26.0 - r600-eg: fix htile size computation 71 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 72 * 2.28.0 - r600-eg: Add MEM_WRITE packet support 73 * 2.29.0 - R500 FP16 color clear registers 74 * 2.30.0 - fix for FMASK texturing 75 * 2.31.0 - Add fastfb support for rs690 76 * 2.32.0 - new info request for rings working 77 * 2.33.0 - Add SI tiling mode array query 78 * 2.34.0 - Add CIK tiling mode array query 79 * 2.35.0 - Add CIK macrotile mode array query 80 * 2.36.0 - Fix CIK DCE tiling setup 81 * 2.37.0 - allow GS ring setup on r6xx/r7xx 82 */ 83 #define KMS_DRIVER_MAJOR 2 84 #define KMS_DRIVER_MINOR 37 85 #define KMS_DRIVER_PATCHLEVEL 0 86 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 87 int radeon_driver_unload_kms(struct drm_device *dev); 88 void radeon_driver_lastclose_kms(struct drm_device *dev); 89 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); 90 void radeon_driver_postclose_kms(struct drm_device *dev, 91 struct drm_file *file_priv); 92 void radeon_driver_preclose_kms(struct drm_device *dev, 93 struct drm_file *file_priv); 94 int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon); 95 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); 96 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc); 97 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc); 98 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc); 99 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc, 100 int *max_error, 101 struct timeval *vblank_time, 102 unsigned flags); 103 void radeon_driver_irq_preinstall_kms(struct drm_device *dev); 104 int radeon_driver_irq_postinstall_kms(struct drm_device *dev); 105 void radeon_driver_irq_uninstall_kms(struct drm_device *dev); 106 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg); 107 void radeon_gem_object_free(struct drm_gem_object *obj); 108 int radeon_gem_object_open(struct drm_gem_object *obj, 109 struct drm_file *file_priv); 110 void radeon_gem_object_close(struct drm_gem_object *obj, 111 struct drm_file *file_priv); 112 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, 113 unsigned int flags, 114 int *vpos, int *hpos, ktime_t *stime, 115 ktime_t *etime); 116 extern const struct drm_ioctl_desc radeon_ioctls_kms[]; 117 extern int radeon_max_kms_ioctl; 118 int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 119 int radeon_mode_dumb_mmap(struct drm_file *filp, 120 struct drm_device *dev, 121 uint32_t handle, uint64_t *offset_p); 122 int radeon_mode_dumb_create(struct drm_file *file_priv, 123 struct drm_device *dev, 124 struct drm_mode_create_dumb *args); 125 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); 126 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, 127 size_t size, 128 struct sg_table *sg); 129 int radeon_gem_prime_pin(struct drm_gem_object *obj); 130 void radeon_gem_prime_unpin(struct drm_gem_object *obj); 131 void *radeon_gem_prime_vmap(struct drm_gem_object *obj); 132 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 133 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, 134 unsigned long arg); 135 136 #if defined(CONFIG_DEBUG_FS) 137 int radeon_debugfs_init(struct drm_minor *minor); 138 void radeon_debugfs_cleanup(struct drm_minor *minor); 139 #endif 140 141 /* atpx handler */ 142 #if defined(CONFIG_VGA_SWITCHEROO) 143 void radeon_register_atpx_handler(void); 144 void radeon_unregister_atpx_handler(void); 145 bool radeon_is_px(void); 146 #else 147 static inline void radeon_register_atpx_handler(void) {} 148 static inline void radeon_unregister_atpx_handler(void) {} 149 static inline bool radeon_is_px(void) { return false; } 150 #endif 151 152 int radeon_no_wb; 153 int radeon_modeset = -1; 154 int radeon_dynclks = -1; 155 int radeon_r4xx_atom = 0; 156 int radeon_agpmode = 0; 157 int radeon_vram_limit = 0; 158 int radeon_gart_size = -1; /* auto */ 159 int radeon_benchmarking = 0; 160 int radeon_testing = 0; 161 int radeon_connector_table = 0; 162 int radeon_tv = 1; 163 int radeon_audio = -1; 164 int radeon_disp_priority = 0; 165 int radeon_hw_i2c = 0; 166 int radeon_pcie_gen2 = -1; 167 int radeon_msi = -1; 168 int radeon_lockup_timeout = 10000; 169 int radeon_fastfb = 0; 170 int radeon_dpm = -1; 171 int radeon_aspm = -1; 172 int radeon_runtime_pm = -1; 173 int radeon_hard_reset = 0; 174 175 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 176 module_param_named(no_wb, radeon_no_wb, int, 0444); 177 178 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 179 module_param_named(modeset, radeon_modeset, int, 0400); 180 181 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 182 module_param_named(dynclks, radeon_dynclks, int, 0444); 183 184 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 185 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 186 187 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing"); 188 module_param_named(vramlimit, radeon_vram_limit, int, 0600); 189 190 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 191 module_param_named(agpmode, radeon_agpmode, int, 0444); 192 193 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); 194 module_param_named(gartsize, radeon_gart_size, int, 0600); 195 196 MODULE_PARM_DESC(benchmark, "Run benchmark"); 197 module_param_named(benchmark, radeon_benchmarking, int, 0444); 198 199 MODULE_PARM_DESC(test, "Run tests"); 200 module_param_named(test, radeon_testing, int, 0444); 201 202 MODULE_PARM_DESC(connector_table, "Force connector table"); 203 module_param_named(connector_table, radeon_connector_table, int, 0444); 204 205 MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 206 module_param_named(tv, radeon_tv, int, 0444); 207 208 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)"); 209 module_param_named(audio, radeon_audio, int, 0444); 210 211 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 212 module_param_named(disp_priority, radeon_disp_priority, int, 0444); 213 214 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 215 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 216 217 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 218 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 219 220 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 221 module_param_named(msi, radeon_msi, int, 0444); 222 223 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)"); 224 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); 225 226 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)"); 227 module_param_named(fastfb, radeon_fastfb, int, 0444); 228 229 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)"); 230 module_param_named(dpm, radeon_dpm, int, 0444); 231 232 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)"); 233 module_param_named(aspm, radeon_aspm, int, 0444); 234 235 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)"); 236 module_param_named(runpm, radeon_runtime_pm, int, 0444); 237 238 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))"); 239 module_param_named(hard_reset, radeon_hard_reset, int, 0444); 240 241 static struct pci_device_id pciidlist[] = { 242 radeon_PCI_IDS 243 }; 244 245 MODULE_DEVICE_TABLE(pci, pciidlist); 246 247 #ifdef CONFIG_DRM_RADEON_UMS 248 249 static int radeon_suspend(struct drm_device *dev, pm_message_t state) 250 { 251 drm_radeon_private_t *dev_priv = dev->dev_private; 252 253 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 254 return 0; 255 256 /* Disable *all* interrupts */ 257 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 258 RADEON_WRITE(R500_DxMODE_INT_MASK, 0); 259 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 260 return 0; 261 } 262 263 static int radeon_resume(struct drm_device *dev) 264 { 265 drm_radeon_private_t *dev_priv = dev->dev_private; 266 267 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 268 return 0; 269 270 /* Restore interrupt registers */ 271 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 272 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); 273 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); 274 return 0; 275 } 276 277 278 static const struct file_operations radeon_driver_old_fops = { 279 .owner = THIS_MODULE, 280 .open = drm_open, 281 .release = drm_release, 282 .unlocked_ioctl = drm_ioctl, 283 .mmap = drm_mmap, 284 .poll = drm_poll, 285 .read = drm_read, 286 #ifdef CONFIG_COMPAT 287 .compat_ioctl = radeon_compat_ioctl, 288 #endif 289 .llseek = noop_llseek, 290 }; 291 292 static struct drm_driver driver_old = { 293 .driver_features = 294 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | 295 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED, 296 .dev_priv_size = sizeof(drm_radeon_buf_priv_t), 297 .load = radeon_driver_load, 298 .firstopen = radeon_driver_firstopen, 299 .open = radeon_driver_open, 300 .preclose = radeon_driver_preclose, 301 .postclose = radeon_driver_postclose, 302 .lastclose = radeon_driver_lastclose, 303 .unload = radeon_driver_unload, 304 .suspend = radeon_suspend, 305 .resume = radeon_resume, 306 .get_vblank_counter = radeon_get_vblank_counter, 307 .enable_vblank = radeon_enable_vblank, 308 .disable_vblank = radeon_disable_vblank, 309 .master_create = radeon_master_create, 310 .master_destroy = radeon_master_destroy, 311 .irq_preinstall = radeon_driver_irq_preinstall, 312 .irq_postinstall = radeon_driver_irq_postinstall, 313 .irq_uninstall = radeon_driver_irq_uninstall, 314 .irq_handler = radeon_driver_irq_handler, 315 .ioctls = radeon_ioctls, 316 .dma_ioctl = radeon_cp_buffers, 317 .fops = &radeon_driver_old_fops, 318 .name = DRIVER_NAME, 319 .desc = DRIVER_DESC, 320 .date = DRIVER_DATE, 321 .major = DRIVER_MAJOR, 322 .minor = DRIVER_MINOR, 323 .patchlevel = DRIVER_PATCHLEVEL, 324 }; 325 326 #endif 327 328 static struct drm_driver kms_driver; 329 330 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) 331 { 332 struct apertures_struct *ap; 333 bool primary = false; 334 335 ap = alloc_apertures(1); 336 if (!ap) 337 return -ENOMEM; 338 339 ap->ranges[0].base = pci_resource_start(pdev, 0); 340 ap->ranges[0].size = pci_resource_len(pdev, 0); 341 342 #ifdef CONFIG_X86 343 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 344 #endif 345 remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 346 kfree(ap); 347 348 return 0; 349 } 350 351 static int radeon_pci_probe(struct pci_dev *pdev, 352 const struct pci_device_id *ent) 353 { 354 int ret; 355 356 /* Get rid of things like offb */ 357 ret = radeon_kick_out_firmware_fb(pdev); 358 if (ret) 359 return ret; 360 361 return drm_get_pci_dev(pdev, ent, &kms_driver); 362 } 363 364 static void 365 radeon_pci_remove(struct pci_dev *pdev) 366 { 367 struct drm_device *dev = pci_get_drvdata(pdev); 368 369 drm_put_dev(dev); 370 } 371 372 static int radeon_pmops_suspend(struct device *dev) 373 { 374 struct pci_dev *pdev = to_pci_dev(dev); 375 struct drm_device *drm_dev = pci_get_drvdata(pdev); 376 return radeon_suspend_kms(drm_dev, true, true); 377 } 378 379 static int radeon_pmops_resume(struct device *dev) 380 { 381 struct pci_dev *pdev = to_pci_dev(dev); 382 struct drm_device *drm_dev = pci_get_drvdata(pdev); 383 return radeon_resume_kms(drm_dev, true, true); 384 } 385 386 static int radeon_pmops_freeze(struct device *dev) 387 { 388 struct pci_dev *pdev = to_pci_dev(dev); 389 struct drm_device *drm_dev = pci_get_drvdata(pdev); 390 return radeon_suspend_kms(drm_dev, false, true); 391 } 392 393 static int radeon_pmops_thaw(struct device *dev) 394 { 395 struct pci_dev *pdev = to_pci_dev(dev); 396 struct drm_device *drm_dev = pci_get_drvdata(pdev); 397 return radeon_resume_kms(drm_dev, false, true); 398 } 399 400 static int radeon_pmops_runtime_suspend(struct device *dev) 401 { 402 struct pci_dev *pdev = to_pci_dev(dev); 403 struct drm_device *drm_dev = pci_get_drvdata(pdev); 404 int ret; 405 406 if (radeon_runtime_pm == 0) 407 return -EINVAL; 408 409 if (radeon_runtime_pm == -1 && !radeon_is_px()) 410 return -EINVAL; 411 412 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 413 drm_kms_helper_poll_disable(drm_dev); 414 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); 415 416 ret = radeon_suspend_kms(drm_dev, false, false); 417 pci_save_state(pdev); 418 pci_disable_device(pdev); 419 pci_set_power_state(pdev, PCI_D3cold); 420 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 421 422 return 0; 423 } 424 425 static int radeon_pmops_runtime_resume(struct device *dev) 426 { 427 struct pci_dev *pdev = to_pci_dev(dev); 428 struct drm_device *drm_dev = pci_get_drvdata(pdev); 429 int ret; 430 431 if (radeon_runtime_pm == 0) 432 return -EINVAL; 433 434 if (radeon_runtime_pm == -1 && !radeon_is_px()) 435 return -EINVAL; 436 437 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 438 439 pci_set_power_state(pdev, PCI_D0); 440 pci_restore_state(pdev); 441 ret = pci_enable_device(pdev); 442 if (ret) 443 return ret; 444 pci_set_master(pdev); 445 446 ret = radeon_resume_kms(drm_dev, false, false); 447 drm_kms_helper_poll_enable(drm_dev); 448 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); 449 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 450 return 0; 451 } 452 453 static int radeon_pmops_runtime_idle(struct device *dev) 454 { 455 struct pci_dev *pdev = to_pci_dev(dev); 456 struct drm_device *drm_dev = pci_get_drvdata(pdev); 457 struct drm_crtc *crtc; 458 459 if (radeon_runtime_pm == 0) 460 return -EBUSY; 461 462 /* are we PX enabled? */ 463 if (radeon_runtime_pm == -1 && !radeon_is_px()) { 464 DRM_DEBUG_DRIVER("failing to power off - not px\n"); 465 return -EBUSY; 466 } 467 468 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { 469 if (crtc->enabled) { 470 DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); 471 return -EBUSY; 472 } 473 } 474 475 pm_runtime_mark_last_busy(dev); 476 pm_runtime_autosuspend(dev); 477 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 478 return 1; 479 } 480 481 long radeon_drm_ioctl(struct file *filp, 482 unsigned int cmd, unsigned long arg) 483 { 484 struct drm_file *file_priv = filp->private_data; 485 struct drm_device *dev; 486 long ret; 487 dev = file_priv->minor->dev; 488 ret = pm_runtime_get_sync(dev->dev); 489 if (ret < 0) 490 return ret; 491 492 ret = drm_ioctl(filp, cmd, arg); 493 494 pm_runtime_mark_last_busy(dev->dev); 495 pm_runtime_put_autosuspend(dev->dev); 496 return ret; 497 } 498 499 static const struct dev_pm_ops radeon_pm_ops = { 500 .suspend = radeon_pmops_suspend, 501 .resume = radeon_pmops_resume, 502 .freeze = radeon_pmops_freeze, 503 .thaw = radeon_pmops_thaw, 504 .poweroff = radeon_pmops_freeze, 505 .restore = radeon_pmops_resume, 506 .runtime_suspend = radeon_pmops_runtime_suspend, 507 .runtime_resume = radeon_pmops_runtime_resume, 508 .runtime_idle = radeon_pmops_runtime_idle, 509 }; 510 511 static const struct file_operations radeon_driver_kms_fops = { 512 .owner = THIS_MODULE, 513 .open = drm_open, 514 .release = drm_release, 515 .unlocked_ioctl = radeon_drm_ioctl, 516 .mmap = radeon_mmap, 517 .poll = drm_poll, 518 .read = drm_read, 519 #ifdef CONFIG_COMPAT 520 .compat_ioctl = radeon_kms_compat_ioctl, 521 #endif 522 }; 523 524 static struct drm_driver kms_driver = { 525 .driver_features = 526 DRIVER_USE_AGP | 527 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | 528 DRIVER_PRIME | DRIVER_RENDER, 529 .dev_priv_size = 0, 530 .load = radeon_driver_load_kms, 531 .open = radeon_driver_open_kms, 532 .preclose = radeon_driver_preclose_kms, 533 .postclose = radeon_driver_postclose_kms, 534 .lastclose = radeon_driver_lastclose_kms, 535 .unload = radeon_driver_unload_kms, 536 .get_vblank_counter = radeon_get_vblank_counter_kms, 537 .enable_vblank = radeon_enable_vblank_kms, 538 .disable_vblank = radeon_disable_vblank_kms, 539 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms, 540 .get_scanout_position = radeon_get_crtc_scanoutpos, 541 #if defined(CONFIG_DEBUG_FS) 542 .debugfs_init = radeon_debugfs_init, 543 .debugfs_cleanup = radeon_debugfs_cleanup, 544 #endif 545 .irq_preinstall = radeon_driver_irq_preinstall_kms, 546 .irq_postinstall = radeon_driver_irq_postinstall_kms, 547 .irq_uninstall = radeon_driver_irq_uninstall_kms, 548 .irq_handler = radeon_driver_irq_handler_kms, 549 .ioctls = radeon_ioctls_kms, 550 .gem_free_object = radeon_gem_object_free, 551 .gem_open_object = radeon_gem_object_open, 552 .gem_close_object = radeon_gem_object_close, 553 .dumb_create = radeon_mode_dumb_create, 554 .dumb_map_offset = radeon_mode_dumb_mmap, 555 .dumb_destroy = drm_gem_dumb_destroy, 556 .fops = &radeon_driver_kms_fops, 557 558 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 559 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 560 .gem_prime_export = drm_gem_prime_export, 561 .gem_prime_import = drm_gem_prime_import, 562 .gem_prime_pin = radeon_gem_prime_pin, 563 .gem_prime_unpin = radeon_gem_prime_unpin, 564 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, 565 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, 566 .gem_prime_vmap = radeon_gem_prime_vmap, 567 .gem_prime_vunmap = radeon_gem_prime_vunmap, 568 569 .name = DRIVER_NAME, 570 .desc = DRIVER_DESC, 571 .date = DRIVER_DATE, 572 .major = KMS_DRIVER_MAJOR, 573 .minor = KMS_DRIVER_MINOR, 574 .patchlevel = KMS_DRIVER_PATCHLEVEL, 575 }; 576 577 static struct drm_driver *driver; 578 static struct pci_driver *pdriver; 579 580 #ifdef CONFIG_DRM_RADEON_UMS 581 static struct pci_driver radeon_pci_driver = { 582 .name = DRIVER_NAME, 583 .id_table = pciidlist, 584 }; 585 #endif 586 587 static struct pci_driver radeon_kms_pci_driver = { 588 .name = DRIVER_NAME, 589 .id_table = pciidlist, 590 .probe = radeon_pci_probe, 591 .remove = radeon_pci_remove, 592 .driver.pm = &radeon_pm_ops, 593 }; 594 595 static int __init radeon_init(void) 596 { 597 #ifdef CONFIG_VGA_CONSOLE 598 if (vgacon_text_force() && radeon_modeset == -1) { 599 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 600 radeon_modeset = 0; 601 } 602 #endif 603 /* set to modesetting by default if not nomodeset */ 604 if (radeon_modeset == -1) 605 radeon_modeset = 1; 606 607 if (radeon_modeset == 1) { 608 DRM_INFO("radeon kernel modesetting enabled.\n"); 609 driver = &kms_driver; 610 pdriver = &radeon_kms_pci_driver; 611 driver->driver_features |= DRIVER_MODESET; 612 driver->num_ioctls = radeon_max_kms_ioctl; 613 radeon_register_atpx_handler(); 614 615 } else { 616 #ifdef CONFIG_DRM_RADEON_UMS 617 DRM_INFO("radeon userspace modesetting enabled.\n"); 618 driver = &driver_old; 619 pdriver = &radeon_pci_driver; 620 driver->driver_features &= ~DRIVER_MODESET; 621 driver->num_ioctls = radeon_max_ioctl; 622 #else 623 DRM_ERROR("No UMS support in radeon module!\n"); 624 return -EINVAL; 625 #endif 626 } 627 628 /* let modprobe override vga console setting */ 629 return drm_pci_init(driver, pdriver); 630 } 631 632 static void __exit radeon_exit(void) 633 { 634 drm_pci_exit(driver, pdriver); 635 radeon_unregister_atpx_handler(); 636 } 637 638 module_init(radeon_init); 639 module_exit(radeon_exit); 640 641 MODULE_AUTHOR(DRIVER_AUTHOR); 642 MODULE_DESCRIPTION(DRIVER_DESC); 643 MODULE_LICENSE("GPL and additional rights"); 644