1 /** 2 * \file radeon_drv.c 3 * ATI Radeon driver 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8 /* 9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 10 * All Rights Reserved. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a 13 * copy of this software and associated documentation files (the "Software"), 14 * to deal in the Software without restriction, including without limitation 15 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 16 * and/or sell copies of the Software, and to permit persons to whom the 17 * Software is furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice (including the next 20 * paragraph) shall be included in all copies or substantial portions of the 21 * Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * OTHER DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include <drm/drmP.h> 33 #include <drm/radeon_drm.h> 34 #include "radeon_drv.h" 35 36 #include <drm/drm_pciids.h> 37 #include <linux/console.h> 38 #include <linux/module.h> 39 40 41 /* 42 * KMS wrapper. 43 * - 2.0.0 - initial interface 44 * - 2.1.0 - add square tiling interface 45 * - 2.2.0 - add r6xx/r7xx const buffer support 46 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 47 * - 2.4.0 - add crtc id query 48 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 49 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 50 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 51 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 52 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 53 * 2.10.0 - fusion 2D tiling 54 * 2.11.0 - backend map, initial compute support for the CS checker 55 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 56 * 2.13.0 - virtual memory support, streamout 57 * 2.14.0 - add evergreen tiling informations 58 * 2.15.0 - add max_pipes query 59 * 2.16.0 - fix evergreen 2D tiled surface calculation 60 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx 61 * 2.18.0 - r600-eg: allow "invalid" DB formats 62 * 2.19.0 - r600-eg: MSAA textures 63 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query 64 * 2.21.0 - r600-r700: FMASK and CMASK 65 * 2.22.0 - r600 only: RESOLVE_BOX allowed 66 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 67 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures 68 * 2.25.0 - eg+: new info request for num SE and num SH 69 * 2.26.0 - r600-eg: fix htile size computation 70 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 71 * 2.28.0 - r600-eg: Add MEM_WRITE packet support 72 * 2.29.0 - R500 FP16 color clear registers 73 * 2.30.0 - fix for FMASK texturing 74 * 2.31.0 - Add fastfb support for rs690 75 * 2.32.0 - new info request for rings working 76 * 2.33.0 - Add SI tiling mode array query 77 * 2.34.0 - Add CIK tiling mode array query 78 */ 79 #define KMS_DRIVER_MAJOR 2 80 #define KMS_DRIVER_MINOR 34 81 #define KMS_DRIVER_PATCHLEVEL 0 82 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 83 int radeon_driver_unload_kms(struct drm_device *dev); 84 void radeon_driver_lastclose_kms(struct drm_device *dev); 85 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); 86 void radeon_driver_postclose_kms(struct drm_device *dev, 87 struct drm_file *file_priv); 88 void radeon_driver_preclose_kms(struct drm_device *dev, 89 struct drm_file *file_priv); 90 int radeon_suspend_kms(struct drm_device *dev, pm_message_t state); 91 int radeon_resume_kms(struct drm_device *dev); 92 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc); 93 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc); 94 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc); 95 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc, 96 int *max_error, 97 struct timeval *vblank_time, 98 unsigned flags); 99 void radeon_driver_irq_preinstall_kms(struct drm_device *dev); 100 int radeon_driver_irq_postinstall_kms(struct drm_device *dev); 101 void radeon_driver_irq_uninstall_kms(struct drm_device *dev); 102 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS); 103 int radeon_gem_object_init(struct drm_gem_object *obj); 104 void radeon_gem_object_free(struct drm_gem_object *obj); 105 int radeon_gem_object_open(struct drm_gem_object *obj, 106 struct drm_file *file_priv); 107 void radeon_gem_object_close(struct drm_gem_object *obj, 108 struct drm_file *file_priv); 109 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, 110 int *vpos, int *hpos); 111 extern const struct drm_ioctl_desc radeon_ioctls_kms[]; 112 extern int radeon_max_kms_ioctl; 113 int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 114 int radeon_mode_dumb_mmap(struct drm_file *filp, 115 struct drm_device *dev, 116 uint32_t handle, uint64_t *offset_p); 117 int radeon_mode_dumb_create(struct drm_file *file_priv, 118 struct drm_device *dev, 119 struct drm_mode_create_dumb *args); 120 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); 121 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, 122 size_t size, 123 struct sg_table *sg); 124 int radeon_gem_prime_pin(struct drm_gem_object *obj); 125 void radeon_gem_prime_unpin(struct drm_gem_object *obj); 126 void *radeon_gem_prime_vmap(struct drm_gem_object *obj); 127 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 128 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, 129 unsigned long arg); 130 131 #if defined(CONFIG_DEBUG_FS) 132 int radeon_debugfs_init(struct drm_minor *minor); 133 void radeon_debugfs_cleanup(struct drm_minor *minor); 134 #endif 135 136 /* atpx handler */ 137 #if defined(CONFIG_VGA_SWITCHEROO) 138 void radeon_register_atpx_handler(void); 139 void radeon_unregister_atpx_handler(void); 140 #else 141 static inline void radeon_register_atpx_handler(void) {} 142 static inline void radeon_unregister_atpx_handler(void) {} 143 #endif 144 145 int radeon_no_wb; 146 int radeon_modeset = -1; 147 int radeon_dynclks = -1; 148 int radeon_r4xx_atom = 0; 149 int radeon_agpmode = 0; 150 int radeon_vram_limit = 0; 151 int radeon_gart_size = -1; /* auto */ 152 int radeon_benchmarking = 0; 153 int radeon_testing = 0; 154 int radeon_connector_table = 0; 155 int radeon_tv = 1; 156 int radeon_audio = 1; 157 int radeon_disp_priority = 0; 158 int radeon_hw_i2c = 0; 159 int radeon_pcie_gen2 = -1; 160 int radeon_msi = -1; 161 int radeon_lockup_timeout = 10000; 162 int radeon_fastfb = 0; 163 int radeon_dpm = -1; 164 int radeon_aspm = -1; 165 166 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 167 module_param_named(no_wb, radeon_no_wb, int, 0444); 168 169 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 170 module_param_named(modeset, radeon_modeset, int, 0400); 171 172 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 173 module_param_named(dynclks, radeon_dynclks, int, 0444); 174 175 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 176 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 177 178 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing"); 179 module_param_named(vramlimit, radeon_vram_limit, int, 0600); 180 181 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 182 module_param_named(agpmode, radeon_agpmode, int, 0444); 183 184 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); 185 module_param_named(gartsize, radeon_gart_size, int, 0600); 186 187 MODULE_PARM_DESC(benchmark, "Run benchmark"); 188 module_param_named(benchmark, radeon_benchmarking, int, 0444); 189 190 MODULE_PARM_DESC(test, "Run tests"); 191 module_param_named(test, radeon_testing, int, 0444); 192 193 MODULE_PARM_DESC(connector_table, "Force connector table"); 194 module_param_named(connector_table, radeon_connector_table, int, 0444); 195 196 MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 197 module_param_named(tv, radeon_tv, int, 0444); 198 199 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)"); 200 module_param_named(audio, radeon_audio, int, 0444); 201 202 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 203 module_param_named(disp_priority, radeon_disp_priority, int, 0444); 204 205 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 206 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 207 208 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 209 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 210 211 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 212 module_param_named(msi, radeon_msi, int, 0444); 213 214 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)"); 215 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); 216 217 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)"); 218 module_param_named(fastfb, radeon_fastfb, int, 0444); 219 220 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)"); 221 module_param_named(dpm, radeon_dpm, int, 0444); 222 223 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)"); 224 module_param_named(aspm, radeon_aspm, int, 0444); 225 226 static struct pci_device_id pciidlist[] = { 227 radeon_PCI_IDS 228 }; 229 230 MODULE_DEVICE_TABLE(pci, pciidlist); 231 232 #ifdef CONFIG_DRM_RADEON_UMS 233 234 static int radeon_suspend(struct drm_device *dev, pm_message_t state) 235 { 236 drm_radeon_private_t *dev_priv = dev->dev_private; 237 238 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 239 return 0; 240 241 /* Disable *all* interrupts */ 242 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 243 RADEON_WRITE(R500_DxMODE_INT_MASK, 0); 244 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 245 return 0; 246 } 247 248 static int radeon_resume(struct drm_device *dev) 249 { 250 drm_radeon_private_t *dev_priv = dev->dev_private; 251 252 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 253 return 0; 254 255 /* Restore interrupt registers */ 256 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 257 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); 258 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); 259 return 0; 260 } 261 262 static const struct file_operations radeon_driver_old_fops = { 263 .owner = THIS_MODULE, 264 .open = drm_open, 265 .release = drm_release, 266 .unlocked_ioctl = drm_ioctl, 267 .mmap = drm_mmap, 268 .poll = drm_poll, 269 .read = drm_read, 270 #ifdef CONFIG_COMPAT 271 .compat_ioctl = radeon_compat_ioctl, 272 #endif 273 .llseek = noop_llseek, 274 }; 275 276 static struct drm_driver driver_old = { 277 .driver_features = 278 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | 279 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED, 280 .dev_priv_size = sizeof(drm_radeon_buf_priv_t), 281 .load = radeon_driver_load, 282 .firstopen = radeon_driver_firstopen, 283 .open = radeon_driver_open, 284 .preclose = radeon_driver_preclose, 285 .postclose = radeon_driver_postclose, 286 .lastclose = radeon_driver_lastclose, 287 .unload = radeon_driver_unload, 288 .suspend = radeon_suspend, 289 .resume = radeon_resume, 290 .get_vblank_counter = radeon_get_vblank_counter, 291 .enable_vblank = radeon_enable_vblank, 292 .disable_vblank = radeon_disable_vblank, 293 .master_create = radeon_master_create, 294 .master_destroy = radeon_master_destroy, 295 .irq_preinstall = radeon_driver_irq_preinstall, 296 .irq_postinstall = radeon_driver_irq_postinstall, 297 .irq_uninstall = radeon_driver_irq_uninstall, 298 .irq_handler = radeon_driver_irq_handler, 299 .ioctls = radeon_ioctls, 300 .dma_ioctl = radeon_cp_buffers, 301 .fops = &radeon_driver_old_fops, 302 .name = DRIVER_NAME, 303 .desc = DRIVER_DESC, 304 .date = DRIVER_DATE, 305 .major = DRIVER_MAJOR, 306 .minor = DRIVER_MINOR, 307 .patchlevel = DRIVER_PATCHLEVEL, 308 }; 309 310 #endif 311 312 static struct drm_driver kms_driver; 313 314 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) 315 { 316 struct apertures_struct *ap; 317 bool primary = false; 318 319 ap = alloc_apertures(1); 320 if (!ap) 321 return -ENOMEM; 322 323 ap->ranges[0].base = pci_resource_start(pdev, 0); 324 ap->ranges[0].size = pci_resource_len(pdev, 0); 325 326 #ifdef CONFIG_X86 327 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 328 #endif 329 remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 330 kfree(ap); 331 332 return 0; 333 } 334 335 static int radeon_pci_probe(struct pci_dev *pdev, 336 const struct pci_device_id *ent) 337 { 338 int ret; 339 340 /* Get rid of things like offb */ 341 ret = radeon_kick_out_firmware_fb(pdev); 342 if (ret) 343 return ret; 344 345 return drm_get_pci_dev(pdev, ent, &kms_driver); 346 } 347 348 static void 349 radeon_pci_remove(struct pci_dev *pdev) 350 { 351 struct drm_device *dev = pci_get_drvdata(pdev); 352 353 drm_put_dev(dev); 354 } 355 356 static int 357 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state) 358 { 359 struct drm_device *dev = pci_get_drvdata(pdev); 360 return radeon_suspend_kms(dev, state); 361 } 362 363 static int 364 radeon_pci_resume(struct pci_dev *pdev) 365 { 366 struct drm_device *dev = pci_get_drvdata(pdev); 367 return radeon_resume_kms(dev); 368 } 369 370 static const struct file_operations radeon_driver_kms_fops = { 371 .owner = THIS_MODULE, 372 .open = drm_open, 373 .release = drm_release, 374 .unlocked_ioctl = drm_ioctl, 375 .mmap = radeon_mmap, 376 .poll = drm_poll, 377 .read = drm_read, 378 #ifdef CONFIG_COMPAT 379 .compat_ioctl = radeon_kms_compat_ioctl, 380 #endif 381 }; 382 383 static struct drm_driver kms_driver = { 384 .driver_features = 385 DRIVER_USE_AGP | 386 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | 387 DRIVER_PRIME | DRIVER_RENDER, 388 .dev_priv_size = 0, 389 .load = radeon_driver_load_kms, 390 .open = radeon_driver_open_kms, 391 .preclose = radeon_driver_preclose_kms, 392 .postclose = radeon_driver_postclose_kms, 393 .lastclose = radeon_driver_lastclose_kms, 394 .unload = radeon_driver_unload_kms, 395 .suspend = radeon_suspend_kms, 396 .resume = radeon_resume_kms, 397 .get_vblank_counter = radeon_get_vblank_counter_kms, 398 .enable_vblank = radeon_enable_vblank_kms, 399 .disable_vblank = radeon_disable_vblank_kms, 400 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms, 401 .get_scanout_position = radeon_get_crtc_scanoutpos, 402 #if defined(CONFIG_DEBUG_FS) 403 .debugfs_init = radeon_debugfs_init, 404 .debugfs_cleanup = radeon_debugfs_cleanup, 405 #endif 406 .irq_preinstall = radeon_driver_irq_preinstall_kms, 407 .irq_postinstall = radeon_driver_irq_postinstall_kms, 408 .irq_uninstall = radeon_driver_irq_uninstall_kms, 409 .irq_handler = radeon_driver_irq_handler_kms, 410 .ioctls = radeon_ioctls_kms, 411 .gem_init_object = radeon_gem_object_init, 412 .gem_free_object = radeon_gem_object_free, 413 .gem_open_object = radeon_gem_object_open, 414 .gem_close_object = radeon_gem_object_close, 415 .dumb_create = radeon_mode_dumb_create, 416 .dumb_map_offset = radeon_mode_dumb_mmap, 417 .dumb_destroy = drm_gem_dumb_destroy, 418 .fops = &radeon_driver_kms_fops, 419 420 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 421 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 422 .gem_prime_export = drm_gem_prime_export, 423 .gem_prime_import = drm_gem_prime_import, 424 .gem_prime_pin = radeon_gem_prime_pin, 425 .gem_prime_unpin = radeon_gem_prime_unpin, 426 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, 427 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, 428 .gem_prime_vmap = radeon_gem_prime_vmap, 429 .gem_prime_vunmap = radeon_gem_prime_vunmap, 430 431 .name = DRIVER_NAME, 432 .desc = DRIVER_DESC, 433 .date = DRIVER_DATE, 434 .major = KMS_DRIVER_MAJOR, 435 .minor = KMS_DRIVER_MINOR, 436 .patchlevel = KMS_DRIVER_PATCHLEVEL, 437 }; 438 439 static struct drm_driver *driver; 440 static struct pci_driver *pdriver; 441 442 #ifdef CONFIG_DRM_RADEON_UMS 443 static struct pci_driver radeon_pci_driver = { 444 .name = DRIVER_NAME, 445 .id_table = pciidlist, 446 }; 447 #endif 448 449 static struct pci_driver radeon_kms_pci_driver = { 450 .name = DRIVER_NAME, 451 .id_table = pciidlist, 452 .probe = radeon_pci_probe, 453 .remove = radeon_pci_remove, 454 .suspend = radeon_pci_suspend, 455 .resume = radeon_pci_resume, 456 }; 457 458 static int __init radeon_init(void) 459 { 460 #ifdef CONFIG_VGA_CONSOLE 461 if (vgacon_text_force() && radeon_modeset == -1) { 462 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 463 radeon_modeset = 0; 464 } 465 #endif 466 /* set to modesetting by default if not nomodeset */ 467 if (radeon_modeset == -1) 468 radeon_modeset = 1; 469 470 if (radeon_modeset == 1) { 471 DRM_INFO("radeon kernel modesetting enabled.\n"); 472 driver = &kms_driver; 473 pdriver = &radeon_kms_pci_driver; 474 driver->driver_features |= DRIVER_MODESET; 475 driver->num_ioctls = radeon_max_kms_ioctl; 476 radeon_register_atpx_handler(); 477 478 } else { 479 #ifdef CONFIG_DRM_RADEON_UMS 480 DRM_INFO("radeon userspace modesetting enabled.\n"); 481 driver = &driver_old; 482 pdriver = &radeon_pci_driver; 483 driver->driver_features &= ~DRIVER_MODESET; 484 driver->num_ioctls = radeon_max_ioctl; 485 #else 486 DRM_ERROR("No UMS support in radeon module!\n"); 487 return -EINVAL; 488 #endif 489 } 490 491 /* let modprobe override vga console setting */ 492 return drm_pci_init(driver, pdriver); 493 } 494 495 static void __exit radeon_exit(void) 496 { 497 drm_pci_exit(driver, pdriver); 498 radeon_unregister_atpx_handler(); 499 } 500 501 module_init(radeon_init); 502 module_exit(radeon_exit); 503 504 MODULE_AUTHOR(DRIVER_AUTHOR); 505 MODULE_DESCRIPTION(DRIVER_DESC); 506 MODULE_LICENSE("GPL and additional rights"); 507