1 /** 2 * \file radeon_drv.c 3 * ATI Radeon driver 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8 /* 9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 10 * All Rights Reserved. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a 13 * copy of this software and associated documentation files (the "Software"), 14 * to deal in the Software without restriction, including without limitation 15 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 16 * and/or sell copies of the Software, and to permit persons to whom the 17 * Software is furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice (including the next 20 * paragraph) shall be included in all copies or substantial portions of the 21 * Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * OTHER DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include <drm/drmP.h> 33 #include <drm/radeon_drm.h> 34 #include "radeon_drv.h" 35 36 #include <drm/drm_pciids.h> 37 #include <linux/console.h> 38 #include <linux/module.h> 39 #include <linux/pm_runtime.h> 40 #include <linux/vga_switcheroo.h> 41 #include <drm/drm_gem.h> 42 43 #include "drm_crtc_helper.h" 44 #include "radeon_kfd.h" 45 46 /* 47 * KMS wrapper. 48 * - 2.0.0 - initial interface 49 * - 2.1.0 - add square tiling interface 50 * - 2.2.0 - add r6xx/r7xx const buffer support 51 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 52 * - 2.4.0 - add crtc id query 53 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 54 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 55 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 56 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 57 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 58 * 2.10.0 - fusion 2D tiling 59 * 2.11.0 - backend map, initial compute support for the CS checker 60 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 61 * 2.13.0 - virtual memory support, streamout 62 * 2.14.0 - add evergreen tiling informations 63 * 2.15.0 - add max_pipes query 64 * 2.16.0 - fix evergreen 2D tiled surface calculation 65 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx 66 * 2.18.0 - r600-eg: allow "invalid" DB formats 67 * 2.19.0 - r600-eg: MSAA textures 68 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query 69 * 2.21.0 - r600-r700: FMASK and CMASK 70 * 2.22.0 - r600 only: RESOLVE_BOX allowed 71 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 72 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures 73 * 2.25.0 - eg+: new info request for num SE and num SH 74 * 2.26.0 - r600-eg: fix htile size computation 75 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 76 * 2.28.0 - r600-eg: Add MEM_WRITE packet support 77 * 2.29.0 - R500 FP16 color clear registers 78 * 2.30.0 - fix for FMASK texturing 79 * 2.31.0 - Add fastfb support for rs690 80 * 2.32.0 - new info request for rings working 81 * 2.33.0 - Add SI tiling mode array query 82 * 2.34.0 - Add CIK tiling mode array query 83 * 2.35.0 - Add CIK macrotile mode array query 84 * 2.36.0 - Fix CIK DCE tiling setup 85 * 2.37.0 - allow GS ring setup on r6xx/r7xx 86 * 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN), 87 * CIK: 1D and linear tiling modes contain valid PIPE_CONFIG 88 * 2.39.0 - Add INFO query for number of active CUs 89 * 2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting 90 * CS to GPU on >= r600 91 * 2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support 92 * 2.42.0 - Add VCE/VUI (Video Usability Information) support 93 * 2.43.0 - RADEON_INFO_GPU_RESET_COUNTER 94 */ 95 #define KMS_DRIVER_MAJOR 2 96 #define KMS_DRIVER_MINOR 43 97 #define KMS_DRIVER_PATCHLEVEL 0 98 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 99 int radeon_driver_unload_kms(struct drm_device *dev); 100 void radeon_driver_lastclose_kms(struct drm_device *dev); 101 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); 102 void radeon_driver_postclose_kms(struct drm_device *dev, 103 struct drm_file *file_priv); 104 void radeon_driver_preclose_kms(struct drm_device *dev, 105 struct drm_file *file_priv); 106 int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon); 107 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); 108 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe); 109 int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe); 110 void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe); 111 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, unsigned int pipe, 112 int *max_error, 113 struct timeval *vblank_time, 114 unsigned flags); 115 void radeon_driver_irq_preinstall_kms(struct drm_device *dev); 116 int radeon_driver_irq_postinstall_kms(struct drm_device *dev); 117 void radeon_driver_irq_uninstall_kms(struct drm_device *dev); 118 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg); 119 void radeon_gem_object_free(struct drm_gem_object *obj); 120 int radeon_gem_object_open(struct drm_gem_object *obj, 121 struct drm_file *file_priv); 122 void radeon_gem_object_close(struct drm_gem_object *obj, 123 struct drm_file *file_priv); 124 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev, 125 struct drm_gem_object *gobj, 126 int flags); 127 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc, 128 unsigned int flags, int *vpos, int *hpos, 129 ktime_t *stime, ktime_t *etime, 130 const struct drm_display_mode *mode); 131 extern bool radeon_is_px(struct drm_device *dev); 132 extern const struct drm_ioctl_desc radeon_ioctls_kms[]; 133 extern int radeon_max_kms_ioctl; 134 int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 135 int radeon_mode_dumb_mmap(struct drm_file *filp, 136 struct drm_device *dev, 137 uint32_t handle, uint64_t *offset_p); 138 int radeon_mode_dumb_create(struct drm_file *file_priv, 139 struct drm_device *dev, 140 struct drm_mode_create_dumb *args); 141 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); 142 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, 143 struct dma_buf_attachment *, 144 struct sg_table *sg); 145 int radeon_gem_prime_pin(struct drm_gem_object *obj); 146 void radeon_gem_prime_unpin(struct drm_gem_object *obj); 147 struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *); 148 void *radeon_gem_prime_vmap(struct drm_gem_object *obj); 149 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 150 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, 151 unsigned long arg); 152 153 #if defined(CONFIG_DEBUG_FS) 154 int radeon_debugfs_init(struct drm_minor *minor); 155 void radeon_debugfs_cleanup(struct drm_minor *minor); 156 #endif 157 158 /* atpx handler */ 159 #if defined(CONFIG_VGA_SWITCHEROO) 160 void radeon_register_atpx_handler(void); 161 void radeon_unregister_atpx_handler(void); 162 #else 163 static inline void radeon_register_atpx_handler(void) {} 164 static inline void radeon_unregister_atpx_handler(void) {} 165 #endif 166 167 int radeon_no_wb; 168 int radeon_modeset = -1; 169 int radeon_dynclks = -1; 170 int radeon_r4xx_atom = 0; 171 int radeon_agpmode = 0; 172 int radeon_vram_limit = 0; 173 int radeon_gart_size = -1; /* auto */ 174 int radeon_benchmarking = 0; 175 int radeon_testing = 0; 176 int radeon_connector_table = 0; 177 int radeon_tv = 1; 178 int radeon_audio = -1; 179 int radeon_disp_priority = 0; 180 int radeon_hw_i2c = 0; 181 int radeon_pcie_gen2 = -1; 182 int radeon_msi = -1; 183 int radeon_lockup_timeout = 10000; 184 int radeon_fastfb = 0; 185 int radeon_dpm = -1; 186 int radeon_aspm = -1; 187 int radeon_runtime_pm = -1; 188 int radeon_hard_reset = 0; 189 int radeon_vm_size = 8; 190 int radeon_vm_block_size = -1; 191 int radeon_deep_color = 0; 192 int radeon_use_pflipirq = 2; 193 int radeon_bapm = -1; 194 int radeon_backlight = -1; 195 int radeon_auxch = -1; 196 int radeon_mst = 0; 197 198 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 199 module_param_named(no_wb, radeon_no_wb, int, 0444); 200 201 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 202 module_param_named(modeset, radeon_modeset, int, 0400); 203 204 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 205 module_param_named(dynclks, radeon_dynclks, int, 0444); 206 207 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 208 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 209 210 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes"); 211 module_param_named(vramlimit, radeon_vram_limit, int, 0600); 212 213 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 214 module_param_named(agpmode, radeon_agpmode, int, 0444); 215 216 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); 217 module_param_named(gartsize, radeon_gart_size, int, 0600); 218 219 MODULE_PARM_DESC(benchmark, "Run benchmark"); 220 module_param_named(benchmark, radeon_benchmarking, int, 0444); 221 222 MODULE_PARM_DESC(test, "Run tests"); 223 module_param_named(test, radeon_testing, int, 0444); 224 225 MODULE_PARM_DESC(connector_table, "Force connector table"); 226 module_param_named(connector_table, radeon_connector_table, int, 0444); 227 228 MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 229 module_param_named(tv, radeon_tv, int, 0444); 230 231 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)"); 232 module_param_named(audio, radeon_audio, int, 0444); 233 234 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 235 module_param_named(disp_priority, radeon_disp_priority, int, 0444); 236 237 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 238 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 239 240 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 241 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 242 243 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 244 module_param_named(msi, radeon_msi, int, 0444); 245 246 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)"); 247 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); 248 249 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)"); 250 module_param_named(fastfb, radeon_fastfb, int, 0444); 251 252 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)"); 253 module_param_named(dpm, radeon_dpm, int, 0444); 254 255 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)"); 256 module_param_named(aspm, radeon_aspm, int, 0444); 257 258 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)"); 259 module_param_named(runpm, radeon_runtime_pm, int, 0444); 260 261 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))"); 262 module_param_named(hard_reset, radeon_hard_reset, int, 0444); 263 264 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)"); 265 module_param_named(vm_size, radeon_vm_size, int, 0444); 266 267 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)"); 268 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444); 269 270 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))"); 271 module_param_named(deep_color, radeon_deep_color, int, 0444); 272 273 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))"); 274 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444); 275 276 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)"); 277 module_param_named(bapm, radeon_bapm, int, 0444); 278 279 MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)"); 280 module_param_named(backlight, radeon_backlight, int, 0444); 281 282 MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)"); 283 module_param_named(auxch, radeon_auxch, int, 0444); 284 285 MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)"); 286 module_param_named(mst, radeon_mst, int, 0444); 287 288 static struct pci_device_id pciidlist[] = { 289 radeon_PCI_IDS 290 }; 291 292 MODULE_DEVICE_TABLE(pci, pciidlist); 293 294 static struct drm_driver kms_driver; 295 296 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) 297 { 298 struct apertures_struct *ap; 299 bool primary = false; 300 301 ap = alloc_apertures(1); 302 if (!ap) 303 return -ENOMEM; 304 305 ap->ranges[0].base = pci_resource_start(pdev, 0); 306 ap->ranges[0].size = pci_resource_len(pdev, 0); 307 308 #ifdef CONFIG_X86 309 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 310 #endif 311 remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 312 kfree(ap); 313 314 return 0; 315 } 316 317 static int radeon_pci_probe(struct pci_dev *pdev, 318 const struct pci_device_id *ent) 319 { 320 int ret; 321 322 /* Get rid of things like offb */ 323 ret = radeon_kick_out_firmware_fb(pdev); 324 if (ret) 325 return ret; 326 327 return drm_get_pci_dev(pdev, ent, &kms_driver); 328 } 329 330 static void 331 radeon_pci_remove(struct pci_dev *pdev) 332 { 333 struct drm_device *dev = pci_get_drvdata(pdev); 334 335 drm_put_dev(dev); 336 } 337 338 static int radeon_pmops_suspend(struct device *dev) 339 { 340 struct pci_dev *pdev = to_pci_dev(dev); 341 struct drm_device *drm_dev = pci_get_drvdata(pdev); 342 return radeon_suspend_kms(drm_dev, true, true); 343 } 344 345 static int radeon_pmops_resume(struct device *dev) 346 { 347 struct pci_dev *pdev = to_pci_dev(dev); 348 struct drm_device *drm_dev = pci_get_drvdata(pdev); 349 return radeon_resume_kms(drm_dev, true, true); 350 } 351 352 static int radeon_pmops_freeze(struct device *dev) 353 { 354 struct pci_dev *pdev = to_pci_dev(dev); 355 struct drm_device *drm_dev = pci_get_drvdata(pdev); 356 return radeon_suspend_kms(drm_dev, false, true); 357 } 358 359 static int radeon_pmops_thaw(struct device *dev) 360 { 361 struct pci_dev *pdev = to_pci_dev(dev); 362 struct drm_device *drm_dev = pci_get_drvdata(pdev); 363 return radeon_resume_kms(drm_dev, false, true); 364 } 365 366 static int radeon_pmops_runtime_suspend(struct device *dev) 367 { 368 struct pci_dev *pdev = to_pci_dev(dev); 369 struct drm_device *drm_dev = pci_get_drvdata(pdev); 370 int ret; 371 372 if (!radeon_is_px(drm_dev)) { 373 pm_runtime_forbid(dev); 374 return -EBUSY; 375 } 376 377 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 378 drm_kms_helper_poll_disable(drm_dev); 379 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); 380 381 ret = radeon_suspend_kms(drm_dev, false, false); 382 pci_save_state(pdev); 383 pci_disable_device(pdev); 384 pci_ignore_hotplug(pdev); 385 pci_set_power_state(pdev, PCI_D3cold); 386 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 387 388 return 0; 389 } 390 391 static int radeon_pmops_runtime_resume(struct device *dev) 392 { 393 struct pci_dev *pdev = to_pci_dev(dev); 394 struct drm_device *drm_dev = pci_get_drvdata(pdev); 395 int ret; 396 397 if (!radeon_is_px(drm_dev)) 398 return -EINVAL; 399 400 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 401 402 pci_set_power_state(pdev, PCI_D0); 403 pci_restore_state(pdev); 404 ret = pci_enable_device(pdev); 405 if (ret) 406 return ret; 407 pci_set_master(pdev); 408 409 ret = radeon_resume_kms(drm_dev, false, false); 410 drm_kms_helper_poll_enable(drm_dev); 411 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); 412 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 413 return 0; 414 } 415 416 static int radeon_pmops_runtime_idle(struct device *dev) 417 { 418 struct pci_dev *pdev = to_pci_dev(dev); 419 struct drm_device *drm_dev = pci_get_drvdata(pdev); 420 struct drm_crtc *crtc; 421 422 if (!radeon_is_px(drm_dev)) { 423 pm_runtime_forbid(dev); 424 return -EBUSY; 425 } 426 427 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { 428 if (crtc->enabled) { 429 DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); 430 return -EBUSY; 431 } 432 } 433 434 pm_runtime_mark_last_busy(dev); 435 pm_runtime_autosuspend(dev); 436 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 437 return 1; 438 } 439 440 long radeon_drm_ioctl(struct file *filp, 441 unsigned int cmd, unsigned long arg) 442 { 443 struct drm_file *file_priv = filp->private_data; 444 struct drm_device *dev; 445 long ret; 446 dev = file_priv->minor->dev; 447 ret = pm_runtime_get_sync(dev->dev); 448 if (ret < 0) 449 return ret; 450 451 ret = drm_ioctl(filp, cmd, arg); 452 453 pm_runtime_mark_last_busy(dev->dev); 454 pm_runtime_put_autosuspend(dev->dev); 455 return ret; 456 } 457 458 static const struct dev_pm_ops radeon_pm_ops = { 459 .suspend = radeon_pmops_suspend, 460 .resume = radeon_pmops_resume, 461 .freeze = radeon_pmops_freeze, 462 .thaw = radeon_pmops_thaw, 463 .poweroff = radeon_pmops_freeze, 464 .restore = radeon_pmops_resume, 465 .runtime_suspend = radeon_pmops_runtime_suspend, 466 .runtime_resume = radeon_pmops_runtime_resume, 467 .runtime_idle = radeon_pmops_runtime_idle, 468 }; 469 470 static const struct file_operations radeon_driver_kms_fops = { 471 .owner = THIS_MODULE, 472 .open = drm_open, 473 .release = drm_release, 474 .unlocked_ioctl = radeon_drm_ioctl, 475 .mmap = radeon_mmap, 476 .poll = drm_poll, 477 .read = drm_read, 478 #ifdef CONFIG_COMPAT 479 .compat_ioctl = radeon_kms_compat_ioctl, 480 #endif 481 }; 482 483 static struct drm_driver kms_driver = { 484 .driver_features = 485 DRIVER_USE_AGP | 486 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | 487 DRIVER_PRIME | DRIVER_RENDER, 488 .load = radeon_driver_load_kms, 489 .open = radeon_driver_open_kms, 490 .preclose = radeon_driver_preclose_kms, 491 .postclose = radeon_driver_postclose_kms, 492 .lastclose = radeon_driver_lastclose_kms, 493 .set_busid = drm_pci_set_busid, 494 .unload = radeon_driver_unload_kms, 495 .get_vblank_counter = radeon_get_vblank_counter_kms, 496 .enable_vblank = radeon_enable_vblank_kms, 497 .disable_vblank = radeon_disable_vblank_kms, 498 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms, 499 .get_scanout_position = radeon_get_crtc_scanoutpos, 500 #if defined(CONFIG_DEBUG_FS) 501 .debugfs_init = radeon_debugfs_init, 502 .debugfs_cleanup = radeon_debugfs_cleanup, 503 #endif 504 .irq_preinstall = radeon_driver_irq_preinstall_kms, 505 .irq_postinstall = radeon_driver_irq_postinstall_kms, 506 .irq_uninstall = radeon_driver_irq_uninstall_kms, 507 .irq_handler = radeon_driver_irq_handler_kms, 508 .ioctls = radeon_ioctls_kms, 509 .gem_free_object = radeon_gem_object_free, 510 .gem_open_object = radeon_gem_object_open, 511 .gem_close_object = radeon_gem_object_close, 512 .dumb_create = radeon_mode_dumb_create, 513 .dumb_map_offset = radeon_mode_dumb_mmap, 514 .dumb_destroy = drm_gem_dumb_destroy, 515 .fops = &radeon_driver_kms_fops, 516 517 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 518 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 519 .gem_prime_export = radeon_gem_prime_export, 520 .gem_prime_import = drm_gem_prime_import, 521 .gem_prime_pin = radeon_gem_prime_pin, 522 .gem_prime_unpin = radeon_gem_prime_unpin, 523 .gem_prime_res_obj = radeon_gem_prime_res_obj, 524 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, 525 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, 526 .gem_prime_vmap = radeon_gem_prime_vmap, 527 .gem_prime_vunmap = radeon_gem_prime_vunmap, 528 529 .name = DRIVER_NAME, 530 .desc = DRIVER_DESC, 531 .date = DRIVER_DATE, 532 .major = KMS_DRIVER_MAJOR, 533 .minor = KMS_DRIVER_MINOR, 534 .patchlevel = KMS_DRIVER_PATCHLEVEL, 535 }; 536 537 static struct drm_driver *driver; 538 static struct pci_driver *pdriver; 539 540 static struct pci_driver radeon_kms_pci_driver = { 541 .name = DRIVER_NAME, 542 .id_table = pciidlist, 543 .probe = radeon_pci_probe, 544 .remove = radeon_pci_remove, 545 .driver.pm = &radeon_pm_ops, 546 }; 547 548 static int __init radeon_init(void) 549 { 550 #ifdef CONFIG_VGA_CONSOLE 551 if (vgacon_text_force() && radeon_modeset == -1) { 552 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 553 radeon_modeset = 0; 554 } 555 #endif 556 /* set to modesetting by default if not nomodeset */ 557 if (radeon_modeset == -1) 558 radeon_modeset = 1; 559 560 if (radeon_modeset == 1) { 561 DRM_INFO("radeon kernel modesetting enabled.\n"); 562 driver = &kms_driver; 563 pdriver = &radeon_kms_pci_driver; 564 driver->driver_features |= DRIVER_MODESET; 565 driver->num_ioctls = radeon_max_kms_ioctl; 566 radeon_register_atpx_handler(); 567 568 } else { 569 DRM_ERROR("No UMS support in radeon module!\n"); 570 return -EINVAL; 571 } 572 573 radeon_kfd_init(); 574 575 /* let modprobe override vga console setting */ 576 return drm_pci_init(driver, pdriver); 577 } 578 579 static void __exit radeon_exit(void) 580 { 581 radeon_kfd_fini(); 582 drm_pci_exit(driver, pdriver); 583 radeon_unregister_atpx_handler(); 584 } 585 586 module_init(radeon_init); 587 module_exit(radeon_exit); 588 589 MODULE_AUTHOR(DRIVER_AUTHOR); 590 MODULE_DESCRIPTION(DRIVER_DESC); 591 MODULE_LICENSE("GPL and additional rights"); 592