1 /**
2  * \file radeon_drv.c
3  * ATI Radeon driver
4  *
5  * \author Gareth Hughes <gareth@valinux.com>
6  */
7 
8 /*
9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10  * All Rights Reserved.
11  *
12  * Permission is hereby granted, free of charge, to any person obtaining a
13  * copy of this software and associated documentation files (the "Software"),
14  * to deal in the Software without restriction, including without limitation
15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16  * and/or sell copies of the Software, and to permit persons to whom the
17  * Software is furnished to do so, subject to the following conditions:
18  *
19  * The above copyright notice and this permission notice (including the next
20  * paragraph) shall be included in all copies or substantial portions of the
21  * Software.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29  * OTHER DEALINGS IN THE SOFTWARE.
30  */
31 
32 #include <drm/drmP.h>
33 #include <drm/radeon_drm.h>
34 #include "radeon_drv.h"
35 
36 #include <drm/drm_pciids.h>
37 #include <linux/console.h>
38 #include <linux/module.h>
39 #include <linux/pm_runtime.h>
40 #include <linux/vga_switcheroo.h>
41 #include <drm/drm_gem.h>
42 
43 #include "drm_crtc_helper.h"
44 #include "radeon_kfd.h"
45 
46 /*
47  * KMS wrapper.
48  * - 2.0.0 - initial interface
49  * - 2.1.0 - add square tiling interface
50  * - 2.2.0 - add r6xx/r7xx const buffer support
51  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
52  * - 2.4.0 - add crtc id query
53  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
54  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
55  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
56  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
57  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
58  *   2.10.0 - fusion 2D tiling
59  *   2.11.0 - backend map, initial compute support for the CS checker
60  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
61  *   2.13.0 - virtual memory support, streamout
62  *   2.14.0 - add evergreen tiling informations
63  *   2.15.0 - add max_pipes query
64  *   2.16.0 - fix evergreen 2D tiled surface calculation
65  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
66  *   2.18.0 - r600-eg: allow "invalid" DB formats
67  *   2.19.0 - r600-eg: MSAA textures
68  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
69  *   2.21.0 - r600-r700: FMASK and CMASK
70  *   2.22.0 - r600 only: RESOLVE_BOX allowed
71  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
72  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
73  *   2.25.0 - eg+: new info request for num SE and num SH
74  *   2.26.0 - r600-eg: fix htile size computation
75  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
76  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
77  *   2.29.0 - R500 FP16 color clear registers
78  *   2.30.0 - fix for FMASK texturing
79  *   2.31.0 - Add fastfb support for rs690
80  *   2.32.0 - new info request for rings working
81  *   2.33.0 - Add SI tiling mode array query
82  *   2.34.0 - Add CIK tiling mode array query
83  *   2.35.0 - Add CIK macrotile mode array query
84  *   2.36.0 - Fix CIK DCE tiling setup
85  *   2.37.0 - allow GS ring setup on r6xx/r7xx
86  *   2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
87  *            CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
88  *   2.39.0 - Add INFO query for number of active CUs
89  *   2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
90  *            CS to GPU on >= r600
91  *   2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support
92  *   2.42.0 - Add VCE/VUI (Video Usability Information) support
93  *   2.43.0 - RADEON_INFO_GPU_RESET_COUNTER
94  */
95 #define KMS_DRIVER_MAJOR	2
96 #define KMS_DRIVER_MINOR	43
97 #define KMS_DRIVER_PATCHLEVEL	0
98 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
99 int radeon_driver_unload_kms(struct drm_device *dev);
100 void radeon_driver_lastclose_kms(struct drm_device *dev);
101 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
102 void radeon_driver_postclose_kms(struct drm_device *dev,
103 				 struct drm_file *file_priv);
104 void radeon_driver_preclose_kms(struct drm_device *dev,
105 				struct drm_file *file_priv);
106 int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
107 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
108 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
109 int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
110 void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
111 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, unsigned int pipe,
112 				    int *max_error,
113 				    struct timeval *vblank_time,
114 				    unsigned flags);
115 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
116 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
117 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
118 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
119 void radeon_gem_object_free(struct drm_gem_object *obj);
120 int radeon_gem_object_open(struct drm_gem_object *obj,
121 				struct drm_file *file_priv);
122 void radeon_gem_object_close(struct drm_gem_object *obj,
123 				struct drm_file *file_priv);
124 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
125 					struct drm_gem_object *gobj,
126 					int flags);
127 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc,
128 				      unsigned int flags, int *vpos, int *hpos,
129 				      ktime_t *stime, ktime_t *etime,
130 				      const struct drm_display_mode *mode);
131 extern bool radeon_is_px(struct drm_device *dev);
132 extern const struct drm_ioctl_desc radeon_ioctls_kms[];
133 extern int radeon_max_kms_ioctl;
134 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
135 int radeon_mode_dumb_mmap(struct drm_file *filp,
136 			  struct drm_device *dev,
137 			  uint32_t handle, uint64_t *offset_p);
138 int radeon_mode_dumb_create(struct drm_file *file_priv,
139 			    struct drm_device *dev,
140 			    struct drm_mode_create_dumb *args);
141 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
142 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
143 							struct dma_buf_attachment *,
144 							struct sg_table *sg);
145 int radeon_gem_prime_pin(struct drm_gem_object *obj);
146 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
147 struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
148 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
149 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
150 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
151 				    unsigned long arg);
152 
153 #if defined(CONFIG_DEBUG_FS)
154 int radeon_debugfs_init(struct drm_minor *minor);
155 void radeon_debugfs_cleanup(struct drm_minor *minor);
156 #endif
157 
158 /* atpx handler */
159 #if defined(CONFIG_VGA_SWITCHEROO)
160 void radeon_register_atpx_handler(void);
161 void radeon_unregister_atpx_handler(void);
162 #else
163 static inline void radeon_register_atpx_handler(void) {}
164 static inline void radeon_unregister_atpx_handler(void) {}
165 #endif
166 
167 int radeon_no_wb;
168 int radeon_modeset = -1;
169 int radeon_dynclks = -1;
170 int radeon_r4xx_atom = 0;
171 int radeon_agpmode = 0;
172 int radeon_vram_limit = 0;
173 int radeon_gart_size = -1; /* auto */
174 int radeon_benchmarking = 0;
175 int radeon_testing = 0;
176 int radeon_connector_table = 0;
177 int radeon_tv = 1;
178 int radeon_audio = -1;
179 int radeon_disp_priority = 0;
180 int radeon_hw_i2c = 0;
181 int radeon_pcie_gen2 = -1;
182 int radeon_msi = -1;
183 int radeon_lockup_timeout = 10000;
184 int radeon_fastfb = 0;
185 int radeon_dpm = -1;
186 int radeon_aspm = -1;
187 int radeon_runtime_pm = -1;
188 int radeon_hard_reset = 0;
189 int radeon_vm_size = 8;
190 int radeon_vm_block_size = -1;
191 int radeon_deep_color = 0;
192 int radeon_use_pflipirq = 2;
193 int radeon_bapm = -1;
194 int radeon_backlight = -1;
195 int radeon_auxch = -1;
196 int radeon_mst = 0;
197 
198 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
199 module_param_named(no_wb, radeon_no_wb, int, 0444);
200 
201 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
202 module_param_named(modeset, radeon_modeset, int, 0400);
203 
204 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
205 module_param_named(dynclks, radeon_dynclks, int, 0444);
206 
207 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
208 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
209 
210 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
211 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
212 
213 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
214 module_param_named(agpmode, radeon_agpmode, int, 0444);
215 
216 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
217 module_param_named(gartsize, radeon_gart_size, int, 0600);
218 
219 MODULE_PARM_DESC(benchmark, "Run benchmark");
220 module_param_named(benchmark, radeon_benchmarking, int, 0444);
221 
222 MODULE_PARM_DESC(test, "Run tests");
223 module_param_named(test, radeon_testing, int, 0444);
224 
225 MODULE_PARM_DESC(connector_table, "Force connector table");
226 module_param_named(connector_table, radeon_connector_table, int, 0444);
227 
228 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
229 module_param_named(tv, radeon_tv, int, 0444);
230 
231 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
232 module_param_named(audio, radeon_audio, int, 0444);
233 
234 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
235 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
236 
237 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
238 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
239 
240 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
241 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
242 
243 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
244 module_param_named(msi, radeon_msi, int, 0444);
245 
246 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)");
247 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
248 
249 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
250 module_param_named(fastfb, radeon_fastfb, int, 0444);
251 
252 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
253 module_param_named(dpm, radeon_dpm, int, 0444);
254 
255 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
256 module_param_named(aspm, radeon_aspm, int, 0444);
257 
258 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
259 module_param_named(runpm, radeon_runtime_pm, int, 0444);
260 
261 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
262 module_param_named(hard_reset, radeon_hard_reset, int, 0444);
263 
264 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
265 module_param_named(vm_size, radeon_vm_size, int, 0444);
266 
267 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
268 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
269 
270 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
271 module_param_named(deep_color, radeon_deep_color, int, 0444);
272 
273 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
274 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
275 
276 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
277 module_param_named(bapm, radeon_bapm, int, 0444);
278 
279 MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
280 module_param_named(backlight, radeon_backlight, int, 0444);
281 
282 MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)");
283 module_param_named(auxch, radeon_auxch, int, 0444);
284 
285 MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)");
286 module_param_named(mst, radeon_mst, int, 0444);
287 
288 static struct pci_device_id pciidlist[] = {
289 	radeon_PCI_IDS
290 };
291 
292 MODULE_DEVICE_TABLE(pci, pciidlist);
293 
294 #ifdef CONFIG_DRM_RADEON_UMS
295 
296 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
297 {
298 	drm_radeon_private_t *dev_priv = dev->dev_private;
299 
300 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
301 		return 0;
302 
303 	/* Disable *all* interrupts */
304 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
305 		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
306 	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
307 	return 0;
308 }
309 
310 static int radeon_resume(struct drm_device *dev)
311 {
312 	drm_radeon_private_t *dev_priv = dev->dev_private;
313 
314 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
315 		return 0;
316 
317 	/* Restore interrupt registers */
318 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
319 		RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
320 	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
321 	return 0;
322 }
323 
324 
325 static const struct file_operations radeon_driver_old_fops = {
326 	.owner = THIS_MODULE,
327 	.open = drm_open,
328 	.release = drm_release,
329 	.unlocked_ioctl = drm_ioctl,
330 	.mmap = drm_legacy_mmap,
331 	.poll = drm_poll,
332 	.read = drm_read,
333 #ifdef CONFIG_COMPAT
334 	.compat_ioctl = radeon_compat_ioctl,
335 #endif
336 	.llseek = noop_llseek,
337 };
338 
339 static struct drm_driver driver_old = {
340 	.driver_features =
341 	    DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
342 	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
343 	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
344 	.load = radeon_driver_load,
345 	.firstopen = radeon_driver_firstopen,
346 	.open = radeon_driver_open,
347 	.preclose = radeon_driver_preclose,
348 	.postclose = radeon_driver_postclose,
349 	.lastclose = radeon_driver_lastclose,
350 	.set_busid = drm_pci_set_busid,
351 	.unload = radeon_driver_unload,
352 	.suspend = radeon_suspend,
353 	.resume = radeon_resume,
354 	.get_vblank_counter = radeon_get_vblank_counter,
355 	.enable_vblank = radeon_enable_vblank,
356 	.disable_vblank = radeon_disable_vblank,
357 	.master_create = radeon_master_create,
358 	.master_destroy = radeon_master_destroy,
359 	.irq_preinstall = radeon_driver_irq_preinstall,
360 	.irq_postinstall = radeon_driver_irq_postinstall,
361 	.irq_uninstall = radeon_driver_irq_uninstall,
362 	.irq_handler = radeon_driver_irq_handler,
363 	.ioctls = radeon_ioctls,
364 	.dma_ioctl = radeon_cp_buffers,
365 	.fops = &radeon_driver_old_fops,
366 	.name = DRIVER_NAME,
367 	.desc = DRIVER_DESC,
368 	.date = DRIVER_DATE,
369 	.major = DRIVER_MAJOR,
370 	.minor = DRIVER_MINOR,
371 	.patchlevel = DRIVER_PATCHLEVEL,
372 };
373 
374 #endif
375 
376 static struct drm_driver kms_driver;
377 
378 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
379 {
380 	struct apertures_struct *ap;
381 	bool primary = false;
382 
383 	ap = alloc_apertures(1);
384 	if (!ap)
385 		return -ENOMEM;
386 
387 	ap->ranges[0].base = pci_resource_start(pdev, 0);
388 	ap->ranges[0].size = pci_resource_len(pdev, 0);
389 
390 #ifdef CONFIG_X86
391 	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
392 #endif
393 	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
394 	kfree(ap);
395 
396 	return 0;
397 }
398 
399 static int radeon_pci_probe(struct pci_dev *pdev,
400 			    const struct pci_device_id *ent)
401 {
402 	int ret;
403 
404 	/* Get rid of things like offb */
405 	ret = radeon_kick_out_firmware_fb(pdev);
406 	if (ret)
407 		return ret;
408 
409 	return drm_get_pci_dev(pdev, ent, &kms_driver);
410 }
411 
412 static void
413 radeon_pci_remove(struct pci_dev *pdev)
414 {
415 	struct drm_device *dev = pci_get_drvdata(pdev);
416 
417 	drm_put_dev(dev);
418 }
419 
420 static int radeon_pmops_suspend(struct device *dev)
421 {
422 	struct pci_dev *pdev = to_pci_dev(dev);
423 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
424 	return radeon_suspend_kms(drm_dev, true, true);
425 }
426 
427 static int radeon_pmops_resume(struct device *dev)
428 {
429 	struct pci_dev *pdev = to_pci_dev(dev);
430 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
431 	return radeon_resume_kms(drm_dev, true, true);
432 }
433 
434 static int radeon_pmops_freeze(struct device *dev)
435 {
436 	struct pci_dev *pdev = to_pci_dev(dev);
437 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
438 	return radeon_suspend_kms(drm_dev, false, true);
439 }
440 
441 static int radeon_pmops_thaw(struct device *dev)
442 {
443 	struct pci_dev *pdev = to_pci_dev(dev);
444 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
445 	return radeon_resume_kms(drm_dev, false, true);
446 }
447 
448 static int radeon_pmops_runtime_suspend(struct device *dev)
449 {
450 	struct pci_dev *pdev = to_pci_dev(dev);
451 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
452 	int ret;
453 
454 	if (!radeon_is_px(drm_dev)) {
455 		pm_runtime_forbid(dev);
456 		return -EBUSY;
457 	}
458 
459 	drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
460 	drm_kms_helper_poll_disable(drm_dev);
461 	vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
462 
463 	ret = radeon_suspend_kms(drm_dev, false, false);
464 	pci_save_state(pdev);
465 	pci_disable_device(pdev);
466 	pci_ignore_hotplug(pdev);
467 	pci_set_power_state(pdev, PCI_D3cold);
468 	drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
469 
470 	return 0;
471 }
472 
473 static int radeon_pmops_runtime_resume(struct device *dev)
474 {
475 	struct pci_dev *pdev = to_pci_dev(dev);
476 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
477 	int ret;
478 
479 	if (!radeon_is_px(drm_dev))
480 		return -EINVAL;
481 
482 	drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
483 
484 	pci_set_power_state(pdev, PCI_D0);
485 	pci_restore_state(pdev);
486 	ret = pci_enable_device(pdev);
487 	if (ret)
488 		return ret;
489 	pci_set_master(pdev);
490 
491 	ret = radeon_resume_kms(drm_dev, false, false);
492 	drm_kms_helper_poll_enable(drm_dev);
493 	vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
494 	drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
495 	return 0;
496 }
497 
498 static int radeon_pmops_runtime_idle(struct device *dev)
499 {
500 	struct pci_dev *pdev = to_pci_dev(dev);
501 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
502 	struct drm_crtc *crtc;
503 
504 	if (!radeon_is_px(drm_dev)) {
505 		pm_runtime_forbid(dev);
506 		return -EBUSY;
507 	}
508 
509 	list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
510 		if (crtc->enabled) {
511 			DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
512 			return -EBUSY;
513 		}
514 	}
515 
516 	pm_runtime_mark_last_busy(dev);
517 	pm_runtime_autosuspend(dev);
518 	/* we don't want the main rpm_idle to call suspend - we want to autosuspend */
519 	return 1;
520 }
521 
522 long radeon_drm_ioctl(struct file *filp,
523 		      unsigned int cmd, unsigned long arg)
524 {
525 	struct drm_file *file_priv = filp->private_data;
526 	struct drm_device *dev;
527 	long ret;
528 	dev = file_priv->minor->dev;
529 	ret = pm_runtime_get_sync(dev->dev);
530 	if (ret < 0)
531 		return ret;
532 
533 	ret = drm_ioctl(filp, cmd, arg);
534 
535 	pm_runtime_mark_last_busy(dev->dev);
536 	pm_runtime_put_autosuspend(dev->dev);
537 	return ret;
538 }
539 
540 static const struct dev_pm_ops radeon_pm_ops = {
541 	.suspend = radeon_pmops_suspend,
542 	.resume = radeon_pmops_resume,
543 	.freeze = radeon_pmops_freeze,
544 	.thaw = radeon_pmops_thaw,
545 	.poweroff = radeon_pmops_freeze,
546 	.restore = radeon_pmops_resume,
547 	.runtime_suspend = radeon_pmops_runtime_suspend,
548 	.runtime_resume = radeon_pmops_runtime_resume,
549 	.runtime_idle = radeon_pmops_runtime_idle,
550 };
551 
552 static const struct file_operations radeon_driver_kms_fops = {
553 	.owner = THIS_MODULE,
554 	.open = drm_open,
555 	.release = drm_release,
556 	.unlocked_ioctl = radeon_drm_ioctl,
557 	.mmap = radeon_mmap,
558 	.poll = drm_poll,
559 	.read = drm_read,
560 #ifdef CONFIG_COMPAT
561 	.compat_ioctl = radeon_kms_compat_ioctl,
562 #endif
563 };
564 
565 static struct drm_driver kms_driver = {
566 	.driver_features =
567 	    DRIVER_USE_AGP |
568 	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
569 	    DRIVER_PRIME | DRIVER_RENDER,
570 	.load = radeon_driver_load_kms,
571 	.open = radeon_driver_open_kms,
572 	.preclose = radeon_driver_preclose_kms,
573 	.postclose = radeon_driver_postclose_kms,
574 	.lastclose = radeon_driver_lastclose_kms,
575 	.set_busid = drm_pci_set_busid,
576 	.unload = radeon_driver_unload_kms,
577 	.get_vblank_counter = radeon_get_vblank_counter_kms,
578 	.enable_vblank = radeon_enable_vblank_kms,
579 	.disable_vblank = radeon_disable_vblank_kms,
580 	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
581 	.get_scanout_position = radeon_get_crtc_scanoutpos,
582 #if defined(CONFIG_DEBUG_FS)
583 	.debugfs_init = radeon_debugfs_init,
584 	.debugfs_cleanup = radeon_debugfs_cleanup,
585 #endif
586 	.irq_preinstall = radeon_driver_irq_preinstall_kms,
587 	.irq_postinstall = radeon_driver_irq_postinstall_kms,
588 	.irq_uninstall = radeon_driver_irq_uninstall_kms,
589 	.irq_handler = radeon_driver_irq_handler_kms,
590 	.ioctls = radeon_ioctls_kms,
591 	.gem_free_object = radeon_gem_object_free,
592 	.gem_open_object = radeon_gem_object_open,
593 	.gem_close_object = radeon_gem_object_close,
594 	.dumb_create = radeon_mode_dumb_create,
595 	.dumb_map_offset = radeon_mode_dumb_mmap,
596 	.dumb_destroy = drm_gem_dumb_destroy,
597 	.fops = &radeon_driver_kms_fops,
598 
599 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
600 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
601 	.gem_prime_export = radeon_gem_prime_export,
602 	.gem_prime_import = drm_gem_prime_import,
603 	.gem_prime_pin = radeon_gem_prime_pin,
604 	.gem_prime_unpin = radeon_gem_prime_unpin,
605 	.gem_prime_res_obj = radeon_gem_prime_res_obj,
606 	.gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
607 	.gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
608 	.gem_prime_vmap = radeon_gem_prime_vmap,
609 	.gem_prime_vunmap = radeon_gem_prime_vunmap,
610 
611 	.name = DRIVER_NAME,
612 	.desc = DRIVER_DESC,
613 	.date = DRIVER_DATE,
614 	.major = KMS_DRIVER_MAJOR,
615 	.minor = KMS_DRIVER_MINOR,
616 	.patchlevel = KMS_DRIVER_PATCHLEVEL,
617 };
618 
619 static struct drm_driver *driver;
620 static struct pci_driver *pdriver;
621 
622 #ifdef CONFIG_DRM_RADEON_UMS
623 static struct pci_driver radeon_pci_driver = {
624 	.name = DRIVER_NAME,
625 	.id_table = pciidlist,
626 };
627 #endif
628 
629 static struct pci_driver radeon_kms_pci_driver = {
630 	.name = DRIVER_NAME,
631 	.id_table = pciidlist,
632 	.probe = radeon_pci_probe,
633 	.remove = radeon_pci_remove,
634 	.driver.pm = &radeon_pm_ops,
635 };
636 
637 static int __init radeon_init(void)
638 {
639 #ifdef CONFIG_VGA_CONSOLE
640 	if (vgacon_text_force() && radeon_modeset == -1) {
641 		DRM_INFO("VGACON disable radeon kernel modesetting.\n");
642 		radeon_modeset = 0;
643 	}
644 #endif
645 	/* set to modesetting by default if not nomodeset */
646 	if (radeon_modeset == -1)
647 		radeon_modeset = 1;
648 
649 	if (radeon_modeset == 1) {
650 		DRM_INFO("radeon kernel modesetting enabled.\n");
651 		driver = &kms_driver;
652 		pdriver = &radeon_kms_pci_driver;
653 		driver->driver_features |= DRIVER_MODESET;
654 		driver->num_ioctls = radeon_max_kms_ioctl;
655 		radeon_register_atpx_handler();
656 
657 	} else {
658 #ifdef CONFIG_DRM_RADEON_UMS
659 		DRM_INFO("radeon userspace modesetting enabled.\n");
660 		driver = &driver_old;
661 		pdriver = &radeon_pci_driver;
662 		driver->driver_features &= ~DRIVER_MODESET;
663 		driver->num_ioctls = radeon_max_ioctl;
664 #else
665 		DRM_ERROR("No UMS support in radeon module!\n");
666 		return -EINVAL;
667 #endif
668 	}
669 
670 	radeon_kfd_init();
671 
672 	/* let modprobe override vga console setting */
673 	return drm_pci_init(driver, pdriver);
674 }
675 
676 static void __exit radeon_exit(void)
677 {
678 	radeon_kfd_fini();
679 	drm_pci_exit(driver, pdriver);
680 	radeon_unregister_atpx_handler();
681 }
682 
683 module_init(radeon_init);
684 module_exit(radeon_exit);
685 
686 MODULE_AUTHOR(DRIVER_AUTHOR);
687 MODULE_DESCRIPTION(DRIVER_DESC);
688 MODULE_LICENSE("GPL and additional rights");
689