1 /** 2 * \file radeon_drv.c 3 * ATI Radeon driver 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8 /* 9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 10 * All Rights Reserved. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a 13 * copy of this software and associated documentation files (the "Software"), 14 * to deal in the Software without restriction, including without limitation 15 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 16 * and/or sell copies of the Software, and to permit persons to whom the 17 * Software is furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice (including the next 20 * paragraph) shall be included in all copies or substantial portions of the 21 * Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * OTHER DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include <drm/drmP.h> 33 #include <drm/radeon_drm.h> 34 #include "radeon_drv.h" 35 36 #include <drm/drm_pciids.h> 37 #include <linux/console.h> 38 #include <linux/module.h> 39 #include <linux/pm_runtime.h> 40 #include <linux/vga_switcheroo.h> 41 #include "drm_crtc_helper.h" 42 /* 43 * KMS wrapper. 44 * - 2.0.0 - initial interface 45 * - 2.1.0 - add square tiling interface 46 * - 2.2.0 - add r6xx/r7xx const buffer support 47 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 48 * - 2.4.0 - add crtc id query 49 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 50 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 51 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 52 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 53 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 54 * 2.10.0 - fusion 2D tiling 55 * 2.11.0 - backend map, initial compute support for the CS checker 56 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 57 * 2.13.0 - virtual memory support, streamout 58 * 2.14.0 - add evergreen tiling informations 59 * 2.15.0 - add max_pipes query 60 * 2.16.0 - fix evergreen 2D tiled surface calculation 61 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx 62 * 2.18.0 - r600-eg: allow "invalid" DB formats 63 * 2.19.0 - r600-eg: MSAA textures 64 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query 65 * 2.21.0 - r600-r700: FMASK and CMASK 66 * 2.22.0 - r600 only: RESOLVE_BOX allowed 67 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 68 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures 69 * 2.25.0 - eg+: new info request for num SE and num SH 70 * 2.26.0 - r600-eg: fix htile size computation 71 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 72 * 2.28.0 - r600-eg: Add MEM_WRITE packet support 73 * 2.29.0 - R500 FP16 color clear registers 74 * 2.30.0 - fix for FMASK texturing 75 * 2.31.0 - Add fastfb support for rs690 76 * 2.32.0 - new info request for rings working 77 * 2.33.0 - Add SI tiling mode array query 78 * 2.34.0 - Add CIK tiling mode array query 79 * 2.35.0 - Add CIK macrotile mode array query 80 * 2.36.0 - Fix CIK DCE tiling setup 81 */ 82 #define KMS_DRIVER_MAJOR 2 83 #define KMS_DRIVER_MINOR 36 84 #define KMS_DRIVER_PATCHLEVEL 0 85 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 86 int radeon_driver_unload_kms(struct drm_device *dev); 87 void radeon_driver_lastclose_kms(struct drm_device *dev); 88 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); 89 void radeon_driver_postclose_kms(struct drm_device *dev, 90 struct drm_file *file_priv); 91 void radeon_driver_preclose_kms(struct drm_device *dev, 92 struct drm_file *file_priv); 93 int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon); 94 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); 95 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc); 96 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc); 97 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc); 98 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc, 99 int *max_error, 100 struct timeval *vblank_time, 101 unsigned flags); 102 void radeon_driver_irq_preinstall_kms(struct drm_device *dev); 103 int radeon_driver_irq_postinstall_kms(struct drm_device *dev); 104 void radeon_driver_irq_uninstall_kms(struct drm_device *dev); 105 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg); 106 void radeon_gem_object_free(struct drm_gem_object *obj); 107 int radeon_gem_object_open(struct drm_gem_object *obj, 108 struct drm_file *file_priv); 109 void radeon_gem_object_close(struct drm_gem_object *obj, 110 struct drm_file *file_priv); 111 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, 112 unsigned int flags, 113 int *vpos, int *hpos, ktime_t *stime, 114 ktime_t *etime); 115 extern const struct drm_ioctl_desc radeon_ioctls_kms[]; 116 extern int radeon_max_kms_ioctl; 117 int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 118 int radeon_mode_dumb_mmap(struct drm_file *filp, 119 struct drm_device *dev, 120 uint32_t handle, uint64_t *offset_p); 121 int radeon_mode_dumb_create(struct drm_file *file_priv, 122 struct drm_device *dev, 123 struct drm_mode_create_dumb *args); 124 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); 125 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, 126 size_t size, 127 struct sg_table *sg); 128 int radeon_gem_prime_pin(struct drm_gem_object *obj); 129 void radeon_gem_prime_unpin(struct drm_gem_object *obj); 130 void *radeon_gem_prime_vmap(struct drm_gem_object *obj); 131 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 132 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, 133 unsigned long arg); 134 135 #if defined(CONFIG_DEBUG_FS) 136 int radeon_debugfs_init(struct drm_minor *minor); 137 void radeon_debugfs_cleanup(struct drm_minor *minor); 138 #endif 139 140 /* atpx handler */ 141 #if defined(CONFIG_VGA_SWITCHEROO) 142 void radeon_register_atpx_handler(void); 143 void radeon_unregister_atpx_handler(void); 144 bool radeon_is_px(void); 145 #else 146 static inline void radeon_register_atpx_handler(void) {} 147 static inline void radeon_unregister_atpx_handler(void) {} 148 static inline bool radeon_is_px(void) { return false; } 149 #endif 150 151 int radeon_no_wb; 152 int radeon_modeset = -1; 153 int radeon_dynclks = -1; 154 int radeon_r4xx_atom = 0; 155 int radeon_agpmode = 0; 156 int radeon_vram_limit = 0; 157 int radeon_gart_size = -1; /* auto */ 158 int radeon_benchmarking = 0; 159 int radeon_testing = 0; 160 int radeon_connector_table = 0; 161 int radeon_tv = 1; 162 int radeon_audio = -1; 163 int radeon_disp_priority = 0; 164 int radeon_hw_i2c = 0; 165 int radeon_pcie_gen2 = -1; 166 int radeon_msi = -1; 167 int radeon_lockup_timeout = 10000; 168 int radeon_fastfb = 0; 169 int radeon_dpm = -1; 170 int radeon_aspm = -1; 171 int radeon_runtime_pm = -1; 172 int radeon_hard_reset = 0; 173 174 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 175 module_param_named(no_wb, radeon_no_wb, int, 0444); 176 177 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 178 module_param_named(modeset, radeon_modeset, int, 0400); 179 180 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 181 module_param_named(dynclks, radeon_dynclks, int, 0444); 182 183 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 184 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 185 186 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing"); 187 module_param_named(vramlimit, radeon_vram_limit, int, 0600); 188 189 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 190 module_param_named(agpmode, radeon_agpmode, int, 0444); 191 192 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); 193 module_param_named(gartsize, radeon_gart_size, int, 0600); 194 195 MODULE_PARM_DESC(benchmark, "Run benchmark"); 196 module_param_named(benchmark, radeon_benchmarking, int, 0444); 197 198 MODULE_PARM_DESC(test, "Run tests"); 199 module_param_named(test, radeon_testing, int, 0444); 200 201 MODULE_PARM_DESC(connector_table, "Force connector table"); 202 module_param_named(connector_table, radeon_connector_table, int, 0444); 203 204 MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 205 module_param_named(tv, radeon_tv, int, 0444); 206 207 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)"); 208 module_param_named(audio, radeon_audio, int, 0444); 209 210 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 211 module_param_named(disp_priority, radeon_disp_priority, int, 0444); 212 213 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 214 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 215 216 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 217 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 218 219 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 220 module_param_named(msi, radeon_msi, int, 0444); 221 222 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)"); 223 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); 224 225 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)"); 226 module_param_named(fastfb, radeon_fastfb, int, 0444); 227 228 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)"); 229 module_param_named(dpm, radeon_dpm, int, 0444); 230 231 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)"); 232 module_param_named(aspm, radeon_aspm, int, 0444); 233 234 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)"); 235 module_param_named(runpm, radeon_runtime_pm, int, 0444); 236 237 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))"); 238 module_param_named(hard_reset, radeon_hard_reset, int, 0444); 239 240 static struct pci_device_id pciidlist[] = { 241 radeon_PCI_IDS 242 }; 243 244 MODULE_DEVICE_TABLE(pci, pciidlist); 245 246 #ifdef CONFIG_DRM_RADEON_UMS 247 248 static int radeon_suspend(struct drm_device *dev, pm_message_t state) 249 { 250 drm_radeon_private_t *dev_priv = dev->dev_private; 251 252 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 253 return 0; 254 255 /* Disable *all* interrupts */ 256 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 257 RADEON_WRITE(R500_DxMODE_INT_MASK, 0); 258 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 259 return 0; 260 } 261 262 static int radeon_resume(struct drm_device *dev) 263 { 264 drm_radeon_private_t *dev_priv = dev->dev_private; 265 266 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 267 return 0; 268 269 /* Restore interrupt registers */ 270 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 271 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); 272 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); 273 return 0; 274 } 275 276 277 static const struct file_operations radeon_driver_old_fops = { 278 .owner = THIS_MODULE, 279 .open = drm_open, 280 .release = drm_release, 281 .unlocked_ioctl = drm_ioctl, 282 .mmap = drm_mmap, 283 .poll = drm_poll, 284 .read = drm_read, 285 #ifdef CONFIG_COMPAT 286 .compat_ioctl = radeon_compat_ioctl, 287 #endif 288 .llseek = noop_llseek, 289 }; 290 291 static struct drm_driver driver_old = { 292 .driver_features = 293 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | 294 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED, 295 .dev_priv_size = sizeof(drm_radeon_buf_priv_t), 296 .load = radeon_driver_load, 297 .firstopen = radeon_driver_firstopen, 298 .open = radeon_driver_open, 299 .preclose = radeon_driver_preclose, 300 .postclose = radeon_driver_postclose, 301 .lastclose = radeon_driver_lastclose, 302 .unload = radeon_driver_unload, 303 .suspend = radeon_suspend, 304 .resume = radeon_resume, 305 .get_vblank_counter = radeon_get_vblank_counter, 306 .enable_vblank = radeon_enable_vblank, 307 .disable_vblank = radeon_disable_vblank, 308 .master_create = radeon_master_create, 309 .master_destroy = radeon_master_destroy, 310 .irq_preinstall = radeon_driver_irq_preinstall, 311 .irq_postinstall = radeon_driver_irq_postinstall, 312 .irq_uninstall = radeon_driver_irq_uninstall, 313 .irq_handler = radeon_driver_irq_handler, 314 .ioctls = radeon_ioctls, 315 .dma_ioctl = radeon_cp_buffers, 316 .fops = &radeon_driver_old_fops, 317 .name = DRIVER_NAME, 318 .desc = DRIVER_DESC, 319 .date = DRIVER_DATE, 320 .major = DRIVER_MAJOR, 321 .minor = DRIVER_MINOR, 322 .patchlevel = DRIVER_PATCHLEVEL, 323 }; 324 325 #endif 326 327 static struct drm_driver kms_driver; 328 329 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) 330 { 331 struct apertures_struct *ap; 332 bool primary = false; 333 334 ap = alloc_apertures(1); 335 if (!ap) 336 return -ENOMEM; 337 338 ap->ranges[0].base = pci_resource_start(pdev, 0); 339 ap->ranges[0].size = pci_resource_len(pdev, 0); 340 341 #ifdef CONFIG_X86 342 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 343 #endif 344 remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 345 kfree(ap); 346 347 return 0; 348 } 349 350 static int radeon_pci_probe(struct pci_dev *pdev, 351 const struct pci_device_id *ent) 352 { 353 int ret; 354 355 /* Get rid of things like offb */ 356 ret = radeon_kick_out_firmware_fb(pdev); 357 if (ret) 358 return ret; 359 360 return drm_get_pci_dev(pdev, ent, &kms_driver); 361 } 362 363 static void 364 radeon_pci_remove(struct pci_dev *pdev) 365 { 366 struct drm_device *dev = pci_get_drvdata(pdev); 367 368 drm_put_dev(dev); 369 } 370 371 static int radeon_pmops_suspend(struct device *dev) 372 { 373 struct pci_dev *pdev = to_pci_dev(dev); 374 struct drm_device *drm_dev = pci_get_drvdata(pdev); 375 return radeon_suspend_kms(drm_dev, true, true); 376 } 377 378 static int radeon_pmops_resume(struct device *dev) 379 { 380 struct pci_dev *pdev = to_pci_dev(dev); 381 struct drm_device *drm_dev = pci_get_drvdata(pdev); 382 return radeon_resume_kms(drm_dev, true, true); 383 } 384 385 static int radeon_pmops_freeze(struct device *dev) 386 { 387 struct pci_dev *pdev = to_pci_dev(dev); 388 struct drm_device *drm_dev = pci_get_drvdata(pdev); 389 return radeon_suspend_kms(drm_dev, false, true); 390 } 391 392 static int radeon_pmops_thaw(struct device *dev) 393 { 394 struct pci_dev *pdev = to_pci_dev(dev); 395 struct drm_device *drm_dev = pci_get_drvdata(pdev); 396 return radeon_resume_kms(drm_dev, false, true); 397 } 398 399 static int radeon_pmops_runtime_suspend(struct device *dev) 400 { 401 struct pci_dev *pdev = to_pci_dev(dev); 402 struct drm_device *drm_dev = pci_get_drvdata(pdev); 403 int ret; 404 405 if (radeon_runtime_pm == 0) 406 return -EINVAL; 407 408 if (radeon_runtime_pm == -1 && !radeon_is_px()) 409 return -EINVAL; 410 411 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 412 drm_kms_helper_poll_disable(drm_dev); 413 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); 414 415 ret = radeon_suspend_kms(drm_dev, false, false); 416 pci_save_state(pdev); 417 pci_disable_device(pdev); 418 pci_set_power_state(pdev, PCI_D3cold); 419 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 420 421 return 0; 422 } 423 424 static int radeon_pmops_runtime_resume(struct device *dev) 425 { 426 struct pci_dev *pdev = to_pci_dev(dev); 427 struct drm_device *drm_dev = pci_get_drvdata(pdev); 428 int ret; 429 430 if (radeon_runtime_pm == 0) 431 return -EINVAL; 432 433 if (radeon_runtime_pm == -1 && !radeon_is_px()) 434 return -EINVAL; 435 436 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 437 438 pci_set_power_state(pdev, PCI_D0); 439 pci_restore_state(pdev); 440 ret = pci_enable_device(pdev); 441 if (ret) 442 return ret; 443 pci_set_master(pdev); 444 445 ret = radeon_resume_kms(drm_dev, false, false); 446 drm_kms_helper_poll_enable(drm_dev); 447 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); 448 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 449 return 0; 450 } 451 452 static int radeon_pmops_runtime_idle(struct device *dev) 453 { 454 struct pci_dev *pdev = to_pci_dev(dev); 455 struct drm_device *drm_dev = pci_get_drvdata(pdev); 456 struct drm_crtc *crtc; 457 458 if (radeon_runtime_pm == 0) 459 return -EBUSY; 460 461 /* are we PX enabled? */ 462 if (radeon_runtime_pm == -1 && !radeon_is_px()) { 463 DRM_DEBUG_DRIVER("failing to power off - not px\n"); 464 return -EBUSY; 465 } 466 467 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { 468 if (crtc->enabled) { 469 DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); 470 return -EBUSY; 471 } 472 } 473 474 pm_runtime_mark_last_busy(dev); 475 pm_runtime_autosuspend(dev); 476 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 477 return 1; 478 } 479 480 long radeon_drm_ioctl(struct file *filp, 481 unsigned int cmd, unsigned long arg) 482 { 483 struct drm_file *file_priv = filp->private_data; 484 struct drm_device *dev; 485 long ret; 486 dev = file_priv->minor->dev; 487 ret = pm_runtime_get_sync(dev->dev); 488 if (ret < 0) 489 return ret; 490 491 ret = drm_ioctl(filp, cmd, arg); 492 493 pm_runtime_mark_last_busy(dev->dev); 494 pm_runtime_put_autosuspend(dev->dev); 495 return ret; 496 } 497 498 static const struct dev_pm_ops radeon_pm_ops = { 499 .suspend = radeon_pmops_suspend, 500 .resume = radeon_pmops_resume, 501 .freeze = radeon_pmops_freeze, 502 .thaw = radeon_pmops_thaw, 503 .poweroff = radeon_pmops_freeze, 504 .restore = radeon_pmops_resume, 505 .runtime_suspend = radeon_pmops_runtime_suspend, 506 .runtime_resume = radeon_pmops_runtime_resume, 507 .runtime_idle = radeon_pmops_runtime_idle, 508 }; 509 510 static const struct file_operations radeon_driver_kms_fops = { 511 .owner = THIS_MODULE, 512 .open = drm_open, 513 .release = drm_release, 514 .unlocked_ioctl = radeon_drm_ioctl, 515 .mmap = radeon_mmap, 516 .poll = drm_poll, 517 .read = drm_read, 518 #ifdef CONFIG_COMPAT 519 .compat_ioctl = radeon_kms_compat_ioctl, 520 #endif 521 }; 522 523 static struct drm_driver kms_driver = { 524 .driver_features = 525 DRIVER_USE_AGP | 526 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | 527 DRIVER_PRIME | DRIVER_RENDER, 528 .dev_priv_size = 0, 529 .load = radeon_driver_load_kms, 530 .open = radeon_driver_open_kms, 531 .preclose = radeon_driver_preclose_kms, 532 .postclose = radeon_driver_postclose_kms, 533 .lastclose = radeon_driver_lastclose_kms, 534 .unload = radeon_driver_unload_kms, 535 .get_vblank_counter = radeon_get_vblank_counter_kms, 536 .enable_vblank = radeon_enable_vblank_kms, 537 .disable_vblank = radeon_disable_vblank_kms, 538 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms, 539 .get_scanout_position = radeon_get_crtc_scanoutpos, 540 #if defined(CONFIG_DEBUG_FS) 541 .debugfs_init = radeon_debugfs_init, 542 .debugfs_cleanup = radeon_debugfs_cleanup, 543 #endif 544 .irq_preinstall = radeon_driver_irq_preinstall_kms, 545 .irq_postinstall = radeon_driver_irq_postinstall_kms, 546 .irq_uninstall = radeon_driver_irq_uninstall_kms, 547 .irq_handler = radeon_driver_irq_handler_kms, 548 .ioctls = radeon_ioctls_kms, 549 .gem_free_object = radeon_gem_object_free, 550 .gem_open_object = radeon_gem_object_open, 551 .gem_close_object = radeon_gem_object_close, 552 .dumb_create = radeon_mode_dumb_create, 553 .dumb_map_offset = radeon_mode_dumb_mmap, 554 .dumb_destroy = drm_gem_dumb_destroy, 555 .fops = &radeon_driver_kms_fops, 556 557 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 558 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 559 .gem_prime_export = drm_gem_prime_export, 560 .gem_prime_import = drm_gem_prime_import, 561 .gem_prime_pin = radeon_gem_prime_pin, 562 .gem_prime_unpin = radeon_gem_prime_unpin, 563 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, 564 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, 565 .gem_prime_vmap = radeon_gem_prime_vmap, 566 .gem_prime_vunmap = radeon_gem_prime_vunmap, 567 568 .name = DRIVER_NAME, 569 .desc = DRIVER_DESC, 570 .date = DRIVER_DATE, 571 .major = KMS_DRIVER_MAJOR, 572 .minor = KMS_DRIVER_MINOR, 573 .patchlevel = KMS_DRIVER_PATCHLEVEL, 574 }; 575 576 static struct drm_driver *driver; 577 static struct pci_driver *pdriver; 578 579 #ifdef CONFIG_DRM_RADEON_UMS 580 static struct pci_driver radeon_pci_driver = { 581 .name = DRIVER_NAME, 582 .id_table = pciidlist, 583 }; 584 #endif 585 586 static struct pci_driver radeon_kms_pci_driver = { 587 .name = DRIVER_NAME, 588 .id_table = pciidlist, 589 .probe = radeon_pci_probe, 590 .remove = radeon_pci_remove, 591 .driver.pm = &radeon_pm_ops, 592 }; 593 594 static int __init radeon_init(void) 595 { 596 #ifdef CONFIG_VGA_CONSOLE 597 if (vgacon_text_force() && radeon_modeset == -1) { 598 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 599 radeon_modeset = 0; 600 } 601 #endif 602 /* set to modesetting by default if not nomodeset */ 603 if (radeon_modeset == -1) 604 radeon_modeset = 1; 605 606 if (radeon_modeset == 1) { 607 DRM_INFO("radeon kernel modesetting enabled.\n"); 608 driver = &kms_driver; 609 pdriver = &radeon_kms_pci_driver; 610 driver->driver_features |= DRIVER_MODESET; 611 driver->num_ioctls = radeon_max_kms_ioctl; 612 radeon_register_atpx_handler(); 613 614 } else { 615 #ifdef CONFIG_DRM_RADEON_UMS 616 DRM_INFO("radeon userspace modesetting enabled.\n"); 617 driver = &driver_old; 618 pdriver = &radeon_pci_driver; 619 driver->driver_features &= ~DRIVER_MODESET; 620 driver->num_ioctls = radeon_max_ioctl; 621 #else 622 DRM_ERROR("No UMS support in radeon module!\n"); 623 return -EINVAL; 624 #endif 625 } 626 627 /* let modprobe override vga console setting */ 628 return drm_pci_init(driver, pdriver); 629 } 630 631 static void __exit radeon_exit(void) 632 { 633 drm_pci_exit(driver, pdriver); 634 radeon_unregister_atpx_handler(); 635 } 636 637 module_init(radeon_init); 638 module_exit(radeon_exit); 639 640 MODULE_AUTHOR(DRIVER_AUTHOR); 641 MODULE_DESCRIPTION(DRIVER_DESC); 642 MODULE_LICENSE("GPL and additional rights"); 643