1 /** 2 * \file radeon_drv.c 3 * ATI Radeon driver 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8 /* 9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 10 * All Rights Reserved. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a 13 * copy of this software and associated documentation files (the "Software"), 14 * to deal in the Software without restriction, including without limitation 15 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 16 * and/or sell copies of the Software, and to permit persons to whom the 17 * Software is furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice (including the next 20 * paragraph) shall be included in all copies or substantial portions of the 21 * Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * OTHER DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include "drmP.h" 33 #include "drm.h" 34 #include "radeon_drm.h" 35 #include "radeon_drv.h" 36 37 #include "drm_pciids.h" 38 #include <linux/console.h> 39 #include <linux/module.h> 40 41 42 /* 43 * KMS wrapper. 44 * - 2.0.0 - initial interface 45 * - 2.1.0 - add square tiling interface 46 * - 2.2.0 - add r6xx/r7xx const buffer support 47 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 48 * - 2.4.0 - add crtc id query 49 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 50 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 51 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 52 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 53 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 54 * 2.10.0 - fusion 2D tiling 55 * 2.11.0 - backend map, initial compute support for the CS checker 56 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 57 * 2.13.0 - virtual memory support, streamout 58 * 2.14.0 - add evergreen tiling informations 59 * 2.15.0 - add max_pipes query 60 */ 61 #define KMS_DRIVER_MAJOR 2 62 #define KMS_DRIVER_MINOR 15 63 #define KMS_DRIVER_PATCHLEVEL 0 64 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 65 int radeon_driver_unload_kms(struct drm_device *dev); 66 int radeon_driver_firstopen_kms(struct drm_device *dev); 67 void radeon_driver_lastclose_kms(struct drm_device *dev); 68 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); 69 void radeon_driver_postclose_kms(struct drm_device *dev, 70 struct drm_file *file_priv); 71 void radeon_driver_preclose_kms(struct drm_device *dev, 72 struct drm_file *file_priv); 73 int radeon_suspend_kms(struct drm_device *dev, pm_message_t state); 74 int radeon_resume_kms(struct drm_device *dev); 75 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc); 76 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc); 77 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc); 78 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc, 79 int *max_error, 80 struct timeval *vblank_time, 81 unsigned flags); 82 void radeon_driver_irq_preinstall_kms(struct drm_device *dev); 83 int radeon_driver_irq_postinstall_kms(struct drm_device *dev); 84 void radeon_driver_irq_uninstall_kms(struct drm_device *dev); 85 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS); 86 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data, 87 struct drm_file *file_priv); 88 int radeon_gem_object_init(struct drm_gem_object *obj); 89 void radeon_gem_object_free(struct drm_gem_object *obj); 90 int radeon_gem_object_open(struct drm_gem_object *obj, 91 struct drm_file *file_priv); 92 void radeon_gem_object_close(struct drm_gem_object *obj, 93 struct drm_file *file_priv); 94 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, 95 int *vpos, int *hpos); 96 extern struct drm_ioctl_desc radeon_ioctls_kms[]; 97 extern int radeon_max_kms_ioctl; 98 int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 99 int radeon_mode_dumb_mmap(struct drm_file *filp, 100 struct drm_device *dev, 101 uint32_t handle, uint64_t *offset_p); 102 int radeon_mode_dumb_create(struct drm_file *file_priv, 103 struct drm_device *dev, 104 struct drm_mode_create_dumb *args); 105 int radeon_mode_dumb_destroy(struct drm_file *file_priv, 106 struct drm_device *dev, 107 uint32_t handle); 108 109 #if defined(CONFIG_DEBUG_FS) 110 int radeon_debugfs_init(struct drm_minor *minor); 111 void radeon_debugfs_cleanup(struct drm_minor *minor); 112 #endif 113 114 115 int radeon_no_wb; 116 int radeon_modeset = -1; 117 int radeon_dynclks = -1; 118 int radeon_r4xx_atom = 0; 119 int radeon_agpmode = 0; 120 int radeon_vram_limit = 0; 121 int radeon_gart_size = 512; /* default gart size */ 122 int radeon_benchmarking = 0; 123 int radeon_testing = 0; 124 int radeon_connector_table = 0; 125 int radeon_tv = 1; 126 int radeon_audio = 0; 127 int radeon_disp_priority = 0; 128 int radeon_hw_i2c = 0; 129 int radeon_pcie_gen2 = 0; 130 int radeon_msi = -1; 131 132 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 133 module_param_named(no_wb, radeon_no_wb, int, 0444); 134 135 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 136 module_param_named(modeset, radeon_modeset, int, 0400); 137 138 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 139 module_param_named(dynclks, radeon_dynclks, int, 0444); 140 141 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 142 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 143 144 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing"); 145 module_param_named(vramlimit, radeon_vram_limit, int, 0600); 146 147 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 148 module_param_named(agpmode, radeon_agpmode, int, 0444); 149 150 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)"); 151 module_param_named(gartsize, radeon_gart_size, int, 0600); 152 153 MODULE_PARM_DESC(benchmark, "Run benchmark"); 154 module_param_named(benchmark, radeon_benchmarking, int, 0444); 155 156 MODULE_PARM_DESC(test, "Run tests"); 157 module_param_named(test, radeon_testing, int, 0444); 158 159 MODULE_PARM_DESC(connector_table, "Force connector table"); 160 module_param_named(connector_table, radeon_connector_table, int, 0444); 161 162 MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 163 module_param_named(tv, radeon_tv, int, 0444); 164 165 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)"); 166 module_param_named(audio, radeon_audio, int, 0444); 167 168 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 169 module_param_named(disp_priority, radeon_disp_priority, int, 0444); 170 171 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 172 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 173 174 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (1 = enable)"); 175 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 176 177 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 178 module_param_named(msi, radeon_msi, int, 0444); 179 180 static int radeon_suspend(struct drm_device *dev, pm_message_t state) 181 { 182 drm_radeon_private_t *dev_priv = dev->dev_private; 183 184 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 185 return 0; 186 187 /* Disable *all* interrupts */ 188 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 189 RADEON_WRITE(R500_DxMODE_INT_MASK, 0); 190 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 191 return 0; 192 } 193 194 static int radeon_resume(struct drm_device *dev) 195 { 196 drm_radeon_private_t *dev_priv = dev->dev_private; 197 198 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 199 return 0; 200 201 /* Restore interrupt registers */ 202 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 203 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); 204 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); 205 return 0; 206 } 207 208 static struct pci_device_id pciidlist[] = { 209 radeon_PCI_IDS 210 }; 211 212 #if defined(CONFIG_DRM_RADEON_KMS) 213 MODULE_DEVICE_TABLE(pci, pciidlist); 214 #endif 215 216 static const struct file_operations radeon_driver_old_fops = { 217 .owner = THIS_MODULE, 218 .open = drm_open, 219 .release = drm_release, 220 .unlocked_ioctl = drm_ioctl, 221 .mmap = drm_mmap, 222 .poll = drm_poll, 223 .fasync = drm_fasync, 224 .read = drm_read, 225 #ifdef CONFIG_COMPAT 226 .compat_ioctl = radeon_compat_ioctl, 227 #endif 228 .llseek = noop_llseek, 229 }; 230 231 static struct drm_driver driver_old = { 232 .driver_features = 233 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG | 234 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED, 235 .dev_priv_size = sizeof(drm_radeon_buf_priv_t), 236 .load = radeon_driver_load, 237 .firstopen = radeon_driver_firstopen, 238 .open = radeon_driver_open, 239 .preclose = radeon_driver_preclose, 240 .postclose = radeon_driver_postclose, 241 .lastclose = radeon_driver_lastclose, 242 .unload = radeon_driver_unload, 243 .suspend = radeon_suspend, 244 .resume = radeon_resume, 245 .get_vblank_counter = radeon_get_vblank_counter, 246 .enable_vblank = radeon_enable_vblank, 247 .disable_vblank = radeon_disable_vblank, 248 .master_create = radeon_master_create, 249 .master_destroy = radeon_master_destroy, 250 .irq_preinstall = radeon_driver_irq_preinstall, 251 .irq_postinstall = radeon_driver_irq_postinstall, 252 .irq_uninstall = radeon_driver_irq_uninstall, 253 .irq_handler = radeon_driver_irq_handler, 254 .reclaim_buffers = drm_core_reclaim_buffers, 255 .ioctls = radeon_ioctls, 256 .dma_ioctl = radeon_cp_buffers, 257 .fops = &radeon_driver_old_fops, 258 .name = DRIVER_NAME, 259 .desc = DRIVER_DESC, 260 .date = DRIVER_DATE, 261 .major = DRIVER_MAJOR, 262 .minor = DRIVER_MINOR, 263 .patchlevel = DRIVER_PATCHLEVEL, 264 }; 265 266 static struct drm_driver kms_driver; 267 268 static void radeon_kick_out_firmware_fb(struct pci_dev *pdev) 269 { 270 struct apertures_struct *ap; 271 bool primary = false; 272 273 ap = alloc_apertures(1); 274 ap->ranges[0].base = pci_resource_start(pdev, 0); 275 ap->ranges[0].size = pci_resource_len(pdev, 0); 276 277 #ifdef CONFIG_X86 278 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 279 #endif 280 remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 281 kfree(ap); 282 } 283 284 static int __devinit 285 radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 286 { 287 /* Get rid of things like offb */ 288 radeon_kick_out_firmware_fb(pdev); 289 290 return drm_get_pci_dev(pdev, ent, &kms_driver); 291 } 292 293 static void 294 radeon_pci_remove(struct pci_dev *pdev) 295 { 296 struct drm_device *dev = pci_get_drvdata(pdev); 297 298 drm_put_dev(dev); 299 } 300 301 static int 302 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state) 303 { 304 struct drm_device *dev = pci_get_drvdata(pdev); 305 return radeon_suspend_kms(dev, state); 306 } 307 308 static int 309 radeon_pci_resume(struct pci_dev *pdev) 310 { 311 struct drm_device *dev = pci_get_drvdata(pdev); 312 return radeon_resume_kms(dev); 313 } 314 315 static const struct file_operations radeon_driver_kms_fops = { 316 .owner = THIS_MODULE, 317 .open = drm_open, 318 .release = drm_release, 319 .unlocked_ioctl = drm_ioctl, 320 .mmap = radeon_mmap, 321 .poll = drm_poll, 322 .fasync = drm_fasync, 323 .read = drm_read, 324 #ifdef CONFIG_COMPAT 325 .compat_ioctl = radeon_kms_compat_ioctl, 326 #endif 327 }; 328 329 static struct drm_driver kms_driver = { 330 .driver_features = 331 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG | 332 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM, 333 .dev_priv_size = 0, 334 .load = radeon_driver_load_kms, 335 .firstopen = radeon_driver_firstopen_kms, 336 .open = radeon_driver_open_kms, 337 .preclose = radeon_driver_preclose_kms, 338 .postclose = radeon_driver_postclose_kms, 339 .lastclose = radeon_driver_lastclose_kms, 340 .unload = radeon_driver_unload_kms, 341 .suspend = radeon_suspend_kms, 342 .resume = radeon_resume_kms, 343 .get_vblank_counter = radeon_get_vblank_counter_kms, 344 .enable_vblank = radeon_enable_vblank_kms, 345 .disable_vblank = radeon_disable_vblank_kms, 346 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms, 347 .get_scanout_position = radeon_get_crtc_scanoutpos, 348 #if defined(CONFIG_DEBUG_FS) 349 .debugfs_init = radeon_debugfs_init, 350 .debugfs_cleanup = radeon_debugfs_cleanup, 351 #endif 352 .irq_preinstall = radeon_driver_irq_preinstall_kms, 353 .irq_postinstall = radeon_driver_irq_postinstall_kms, 354 .irq_uninstall = radeon_driver_irq_uninstall_kms, 355 .irq_handler = radeon_driver_irq_handler_kms, 356 .reclaim_buffers = drm_core_reclaim_buffers, 357 .ioctls = radeon_ioctls_kms, 358 .gem_init_object = radeon_gem_object_init, 359 .gem_free_object = radeon_gem_object_free, 360 .gem_open_object = radeon_gem_object_open, 361 .gem_close_object = radeon_gem_object_close, 362 .dma_ioctl = radeon_dma_ioctl_kms, 363 .dumb_create = radeon_mode_dumb_create, 364 .dumb_map_offset = radeon_mode_dumb_mmap, 365 .dumb_destroy = radeon_mode_dumb_destroy, 366 .fops = &radeon_driver_kms_fops, 367 .name = DRIVER_NAME, 368 .desc = DRIVER_DESC, 369 .date = DRIVER_DATE, 370 .major = KMS_DRIVER_MAJOR, 371 .minor = KMS_DRIVER_MINOR, 372 .patchlevel = KMS_DRIVER_PATCHLEVEL, 373 }; 374 375 static struct drm_driver *driver; 376 static struct pci_driver *pdriver; 377 378 static struct pci_driver radeon_pci_driver = { 379 .name = DRIVER_NAME, 380 .id_table = pciidlist, 381 }; 382 383 static struct pci_driver radeon_kms_pci_driver = { 384 .name = DRIVER_NAME, 385 .id_table = pciidlist, 386 .probe = radeon_pci_probe, 387 .remove = radeon_pci_remove, 388 .suspend = radeon_pci_suspend, 389 .resume = radeon_pci_resume, 390 }; 391 392 static int __init radeon_init(void) 393 { 394 driver = &driver_old; 395 pdriver = &radeon_pci_driver; 396 driver->num_ioctls = radeon_max_ioctl; 397 #ifdef CONFIG_VGA_CONSOLE 398 if (vgacon_text_force() && radeon_modeset == -1) { 399 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 400 driver = &driver_old; 401 pdriver = &radeon_pci_driver; 402 driver->driver_features &= ~DRIVER_MODESET; 403 radeon_modeset = 0; 404 } 405 #endif 406 /* if enabled by default */ 407 if (radeon_modeset == -1) { 408 #ifdef CONFIG_DRM_RADEON_KMS 409 DRM_INFO("radeon defaulting to kernel modesetting.\n"); 410 radeon_modeset = 1; 411 #else 412 DRM_INFO("radeon defaulting to userspace modesetting.\n"); 413 radeon_modeset = 0; 414 #endif 415 } 416 if (radeon_modeset == 1) { 417 DRM_INFO("radeon kernel modesetting enabled.\n"); 418 driver = &kms_driver; 419 pdriver = &radeon_kms_pci_driver; 420 driver->driver_features |= DRIVER_MODESET; 421 driver->num_ioctls = radeon_max_kms_ioctl; 422 radeon_register_atpx_handler(); 423 } 424 /* if the vga console setting is enabled still 425 * let modprobe override it */ 426 return drm_pci_init(driver, pdriver); 427 } 428 429 static void __exit radeon_exit(void) 430 { 431 drm_pci_exit(driver, pdriver); 432 radeon_unregister_atpx_handler(); 433 } 434 435 module_init(radeon_init); 436 module_exit(radeon_exit); 437 438 MODULE_AUTHOR(DRIVER_AUTHOR); 439 MODULE_DESCRIPTION(DRIVER_DESC); 440 MODULE_LICENSE("GPL and additional rights"); 441