1 /** 2 * \file radeon_drv.c 3 * ATI Radeon driver 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8 /* 9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 10 * All Rights Reserved. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a 13 * copy of this software and associated documentation files (the "Software"), 14 * to deal in the Software without restriction, including without limitation 15 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 16 * and/or sell copies of the Software, and to permit persons to whom the 17 * Software is furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice (including the next 20 * paragraph) shall be included in all copies or substantial portions of the 21 * Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * OTHER DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include <drm/drmP.h> 33 #include <drm/radeon_drm.h> 34 #include "radeon_drv.h" 35 36 #include <drm/drm_pciids.h> 37 #include <linux/console.h> 38 #include <linux/module.h> 39 #include <linux/pm_runtime.h> 40 #include <linux/vga_switcheroo.h> 41 #include "drm_crtc_helper.h" 42 /* 43 * KMS wrapper. 44 * - 2.0.0 - initial interface 45 * - 2.1.0 - add square tiling interface 46 * - 2.2.0 - add r6xx/r7xx const buffer support 47 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 48 * - 2.4.0 - add crtc id query 49 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 50 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 51 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 52 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 53 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 54 * 2.10.0 - fusion 2D tiling 55 * 2.11.0 - backend map, initial compute support for the CS checker 56 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 57 * 2.13.0 - virtual memory support, streamout 58 * 2.14.0 - add evergreen tiling informations 59 * 2.15.0 - add max_pipes query 60 * 2.16.0 - fix evergreen 2D tiled surface calculation 61 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx 62 * 2.18.0 - r600-eg: allow "invalid" DB formats 63 * 2.19.0 - r600-eg: MSAA textures 64 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query 65 * 2.21.0 - r600-r700: FMASK and CMASK 66 * 2.22.0 - r600 only: RESOLVE_BOX allowed 67 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 68 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures 69 * 2.25.0 - eg+: new info request for num SE and num SH 70 * 2.26.0 - r600-eg: fix htile size computation 71 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 72 * 2.28.0 - r600-eg: Add MEM_WRITE packet support 73 * 2.29.0 - R500 FP16 color clear registers 74 * 2.30.0 - fix for FMASK texturing 75 * 2.31.0 - Add fastfb support for rs690 76 * 2.32.0 - new info request for rings working 77 * 2.33.0 - Add SI tiling mode array query 78 * 2.34.0 - Add CIK tiling mode array query 79 * 2.35.0 - Add CIK macrotile mode array query 80 * 2.36.0 - Fix CIK DCE tiling setup 81 */ 82 #define KMS_DRIVER_MAJOR 2 83 #define KMS_DRIVER_MINOR 36 84 #define KMS_DRIVER_PATCHLEVEL 0 85 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 86 int radeon_driver_unload_kms(struct drm_device *dev); 87 void radeon_driver_lastclose_kms(struct drm_device *dev); 88 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); 89 void radeon_driver_postclose_kms(struct drm_device *dev, 90 struct drm_file *file_priv); 91 void radeon_driver_preclose_kms(struct drm_device *dev, 92 struct drm_file *file_priv); 93 int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon); 94 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); 95 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc); 96 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc); 97 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc); 98 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc, 99 int *max_error, 100 struct timeval *vblank_time, 101 unsigned flags); 102 void radeon_driver_irq_preinstall_kms(struct drm_device *dev); 103 int radeon_driver_irq_postinstall_kms(struct drm_device *dev); 104 void radeon_driver_irq_uninstall_kms(struct drm_device *dev); 105 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS); 106 void radeon_gem_object_free(struct drm_gem_object *obj); 107 int radeon_gem_object_open(struct drm_gem_object *obj, 108 struct drm_file *file_priv); 109 void radeon_gem_object_close(struct drm_gem_object *obj, 110 struct drm_file *file_priv); 111 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, 112 int *vpos, int *hpos, ktime_t *stime, 113 ktime_t *etime); 114 extern const struct drm_ioctl_desc radeon_ioctls_kms[]; 115 extern int radeon_max_kms_ioctl; 116 int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 117 int radeon_mode_dumb_mmap(struct drm_file *filp, 118 struct drm_device *dev, 119 uint32_t handle, uint64_t *offset_p); 120 int radeon_mode_dumb_create(struct drm_file *file_priv, 121 struct drm_device *dev, 122 struct drm_mode_create_dumb *args); 123 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); 124 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, 125 size_t size, 126 struct sg_table *sg); 127 int radeon_gem_prime_pin(struct drm_gem_object *obj); 128 void radeon_gem_prime_unpin(struct drm_gem_object *obj); 129 void *radeon_gem_prime_vmap(struct drm_gem_object *obj); 130 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 131 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, 132 unsigned long arg); 133 134 #if defined(CONFIG_DEBUG_FS) 135 int radeon_debugfs_init(struct drm_minor *minor); 136 void radeon_debugfs_cleanup(struct drm_minor *minor); 137 #endif 138 139 /* atpx handler */ 140 #if defined(CONFIG_VGA_SWITCHEROO) 141 void radeon_register_atpx_handler(void); 142 void radeon_unregister_atpx_handler(void); 143 bool radeon_is_px(void); 144 #else 145 static inline void radeon_register_atpx_handler(void) {} 146 static inline void radeon_unregister_atpx_handler(void) {} 147 static inline bool radeon_is_px(void) { return false; } 148 #endif 149 150 int radeon_no_wb; 151 int radeon_modeset = -1; 152 int radeon_dynclks = -1; 153 int radeon_r4xx_atom = 0; 154 int radeon_agpmode = 0; 155 int radeon_vram_limit = 0; 156 int radeon_gart_size = -1; /* auto */ 157 int radeon_benchmarking = 0; 158 int radeon_testing = 0; 159 int radeon_connector_table = 0; 160 int radeon_tv = 1; 161 int radeon_audio = -1; 162 int radeon_disp_priority = 0; 163 int radeon_hw_i2c = 0; 164 int radeon_pcie_gen2 = -1; 165 int radeon_msi = -1; 166 int radeon_lockup_timeout = 10000; 167 int radeon_fastfb = 0; 168 int radeon_dpm = -1; 169 int radeon_aspm = -1; 170 int radeon_runtime_pm = -1; 171 172 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 173 module_param_named(no_wb, radeon_no_wb, int, 0444); 174 175 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 176 module_param_named(modeset, radeon_modeset, int, 0400); 177 178 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 179 module_param_named(dynclks, radeon_dynclks, int, 0444); 180 181 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 182 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 183 184 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing"); 185 module_param_named(vramlimit, radeon_vram_limit, int, 0600); 186 187 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 188 module_param_named(agpmode, radeon_agpmode, int, 0444); 189 190 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); 191 module_param_named(gartsize, radeon_gart_size, int, 0600); 192 193 MODULE_PARM_DESC(benchmark, "Run benchmark"); 194 module_param_named(benchmark, radeon_benchmarking, int, 0444); 195 196 MODULE_PARM_DESC(test, "Run tests"); 197 module_param_named(test, radeon_testing, int, 0444); 198 199 MODULE_PARM_DESC(connector_table, "Force connector table"); 200 module_param_named(connector_table, radeon_connector_table, int, 0444); 201 202 MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 203 module_param_named(tv, radeon_tv, int, 0444); 204 205 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)"); 206 module_param_named(audio, radeon_audio, int, 0444); 207 208 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 209 module_param_named(disp_priority, radeon_disp_priority, int, 0444); 210 211 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 212 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 213 214 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 215 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 216 217 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 218 module_param_named(msi, radeon_msi, int, 0444); 219 220 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)"); 221 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); 222 223 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)"); 224 module_param_named(fastfb, radeon_fastfb, int, 0444); 225 226 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)"); 227 module_param_named(dpm, radeon_dpm, int, 0444); 228 229 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)"); 230 module_param_named(aspm, radeon_aspm, int, 0444); 231 232 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)"); 233 module_param_named(runpm, radeon_runtime_pm, int, 0444); 234 235 static struct pci_device_id pciidlist[] = { 236 radeon_PCI_IDS 237 }; 238 239 MODULE_DEVICE_TABLE(pci, pciidlist); 240 241 #ifdef CONFIG_DRM_RADEON_UMS 242 243 static int radeon_suspend(struct drm_device *dev, pm_message_t state) 244 { 245 drm_radeon_private_t *dev_priv = dev->dev_private; 246 247 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 248 return 0; 249 250 /* Disable *all* interrupts */ 251 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 252 RADEON_WRITE(R500_DxMODE_INT_MASK, 0); 253 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 254 return 0; 255 } 256 257 static int radeon_resume(struct drm_device *dev) 258 { 259 drm_radeon_private_t *dev_priv = dev->dev_private; 260 261 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 262 return 0; 263 264 /* Restore interrupt registers */ 265 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 266 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); 267 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); 268 return 0; 269 } 270 271 272 static const struct file_operations radeon_driver_old_fops = { 273 .owner = THIS_MODULE, 274 .open = drm_open, 275 .release = drm_release, 276 .unlocked_ioctl = drm_ioctl, 277 .mmap = drm_mmap, 278 .poll = drm_poll, 279 .read = drm_read, 280 #ifdef CONFIG_COMPAT 281 .compat_ioctl = radeon_compat_ioctl, 282 #endif 283 .llseek = noop_llseek, 284 }; 285 286 static struct drm_driver driver_old = { 287 .driver_features = 288 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | 289 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED, 290 .dev_priv_size = sizeof(drm_radeon_buf_priv_t), 291 .load = radeon_driver_load, 292 .firstopen = radeon_driver_firstopen, 293 .open = radeon_driver_open, 294 .preclose = radeon_driver_preclose, 295 .postclose = radeon_driver_postclose, 296 .lastclose = radeon_driver_lastclose, 297 .unload = radeon_driver_unload, 298 .suspend = radeon_suspend, 299 .resume = radeon_resume, 300 .get_vblank_counter = radeon_get_vblank_counter, 301 .enable_vblank = radeon_enable_vblank, 302 .disable_vblank = radeon_disable_vblank, 303 .master_create = radeon_master_create, 304 .master_destroy = radeon_master_destroy, 305 .irq_preinstall = radeon_driver_irq_preinstall, 306 .irq_postinstall = radeon_driver_irq_postinstall, 307 .irq_uninstall = radeon_driver_irq_uninstall, 308 .irq_handler = radeon_driver_irq_handler, 309 .ioctls = radeon_ioctls, 310 .dma_ioctl = radeon_cp_buffers, 311 .fops = &radeon_driver_old_fops, 312 .name = DRIVER_NAME, 313 .desc = DRIVER_DESC, 314 .date = DRIVER_DATE, 315 .major = DRIVER_MAJOR, 316 .minor = DRIVER_MINOR, 317 .patchlevel = DRIVER_PATCHLEVEL, 318 }; 319 320 #endif 321 322 static struct drm_driver kms_driver; 323 324 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) 325 { 326 struct apertures_struct *ap; 327 bool primary = false; 328 329 ap = alloc_apertures(1); 330 if (!ap) 331 return -ENOMEM; 332 333 ap->ranges[0].base = pci_resource_start(pdev, 0); 334 ap->ranges[0].size = pci_resource_len(pdev, 0); 335 336 #ifdef CONFIG_X86 337 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 338 #endif 339 remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 340 kfree(ap); 341 342 return 0; 343 } 344 345 static int radeon_pci_probe(struct pci_dev *pdev, 346 const struct pci_device_id *ent) 347 { 348 int ret; 349 350 /* Get rid of things like offb */ 351 ret = radeon_kick_out_firmware_fb(pdev); 352 if (ret) 353 return ret; 354 355 return drm_get_pci_dev(pdev, ent, &kms_driver); 356 } 357 358 static void 359 radeon_pci_remove(struct pci_dev *pdev) 360 { 361 struct drm_device *dev = pci_get_drvdata(pdev); 362 363 drm_put_dev(dev); 364 } 365 366 static int radeon_pmops_suspend(struct device *dev) 367 { 368 struct pci_dev *pdev = to_pci_dev(dev); 369 struct drm_device *drm_dev = pci_get_drvdata(pdev); 370 return radeon_suspend_kms(drm_dev, true, true); 371 } 372 373 static int radeon_pmops_resume(struct device *dev) 374 { 375 struct pci_dev *pdev = to_pci_dev(dev); 376 struct drm_device *drm_dev = pci_get_drvdata(pdev); 377 return radeon_resume_kms(drm_dev, true, true); 378 } 379 380 static int radeon_pmops_freeze(struct device *dev) 381 { 382 struct pci_dev *pdev = to_pci_dev(dev); 383 struct drm_device *drm_dev = pci_get_drvdata(pdev); 384 return radeon_suspend_kms(drm_dev, false, true); 385 } 386 387 static int radeon_pmops_thaw(struct device *dev) 388 { 389 struct pci_dev *pdev = to_pci_dev(dev); 390 struct drm_device *drm_dev = pci_get_drvdata(pdev); 391 return radeon_resume_kms(drm_dev, false, true); 392 } 393 394 static int radeon_pmops_runtime_suspend(struct device *dev) 395 { 396 struct pci_dev *pdev = to_pci_dev(dev); 397 struct drm_device *drm_dev = pci_get_drvdata(pdev); 398 int ret; 399 400 if (radeon_runtime_pm == 0) 401 return -EINVAL; 402 403 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 404 drm_kms_helper_poll_disable(drm_dev); 405 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); 406 407 ret = radeon_suspend_kms(drm_dev, false, false); 408 pci_save_state(pdev); 409 pci_disable_device(pdev); 410 pci_set_power_state(pdev, PCI_D3cold); 411 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 412 413 return 0; 414 } 415 416 static int radeon_pmops_runtime_resume(struct device *dev) 417 { 418 struct pci_dev *pdev = to_pci_dev(dev); 419 struct drm_device *drm_dev = pci_get_drvdata(pdev); 420 int ret; 421 422 if (radeon_runtime_pm == 0) 423 return -EINVAL; 424 425 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 426 427 pci_set_power_state(pdev, PCI_D0); 428 pci_restore_state(pdev); 429 ret = pci_enable_device(pdev); 430 if (ret) 431 return ret; 432 pci_set_master(pdev); 433 434 ret = radeon_resume_kms(drm_dev, false, false); 435 drm_kms_helper_poll_enable(drm_dev); 436 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); 437 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 438 return 0; 439 } 440 441 static int radeon_pmops_runtime_idle(struct device *dev) 442 { 443 struct pci_dev *pdev = to_pci_dev(dev); 444 struct drm_device *drm_dev = pci_get_drvdata(pdev); 445 struct drm_crtc *crtc; 446 447 if (radeon_runtime_pm == 0) 448 return -EBUSY; 449 450 /* are we PX enabled? */ 451 if (radeon_runtime_pm == -1 && !radeon_is_px()) { 452 DRM_DEBUG_DRIVER("failing to power off - not px\n"); 453 return -EBUSY; 454 } 455 456 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { 457 if (crtc->enabled) { 458 DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); 459 return -EBUSY; 460 } 461 } 462 463 pm_runtime_mark_last_busy(dev); 464 pm_runtime_autosuspend(dev); 465 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 466 return 1; 467 } 468 469 long radeon_drm_ioctl(struct file *filp, 470 unsigned int cmd, unsigned long arg) 471 { 472 struct drm_file *file_priv = filp->private_data; 473 struct drm_device *dev; 474 long ret; 475 dev = file_priv->minor->dev; 476 ret = pm_runtime_get_sync(dev->dev); 477 if (ret < 0) 478 return ret; 479 480 ret = drm_ioctl(filp, cmd, arg); 481 482 pm_runtime_mark_last_busy(dev->dev); 483 pm_runtime_put_autosuspend(dev->dev); 484 return ret; 485 } 486 487 static const struct dev_pm_ops radeon_pm_ops = { 488 .suspend = radeon_pmops_suspend, 489 .resume = radeon_pmops_resume, 490 .freeze = radeon_pmops_freeze, 491 .thaw = radeon_pmops_thaw, 492 .poweroff = radeon_pmops_freeze, 493 .restore = radeon_pmops_resume, 494 .runtime_suspend = radeon_pmops_runtime_suspend, 495 .runtime_resume = radeon_pmops_runtime_resume, 496 .runtime_idle = radeon_pmops_runtime_idle, 497 }; 498 499 static const struct file_operations radeon_driver_kms_fops = { 500 .owner = THIS_MODULE, 501 .open = drm_open, 502 .release = drm_release, 503 .unlocked_ioctl = radeon_drm_ioctl, 504 .mmap = radeon_mmap, 505 .poll = drm_poll, 506 .read = drm_read, 507 #ifdef CONFIG_COMPAT 508 .compat_ioctl = radeon_kms_compat_ioctl, 509 #endif 510 }; 511 512 static struct drm_driver kms_driver = { 513 .driver_features = 514 DRIVER_USE_AGP | 515 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | 516 DRIVER_PRIME | DRIVER_RENDER, 517 .dev_priv_size = 0, 518 .load = radeon_driver_load_kms, 519 .open = radeon_driver_open_kms, 520 .preclose = radeon_driver_preclose_kms, 521 .postclose = radeon_driver_postclose_kms, 522 .lastclose = radeon_driver_lastclose_kms, 523 .unload = radeon_driver_unload_kms, 524 .get_vblank_counter = radeon_get_vblank_counter_kms, 525 .enable_vblank = radeon_enable_vblank_kms, 526 .disable_vblank = radeon_disable_vblank_kms, 527 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms, 528 .get_scanout_position = radeon_get_crtc_scanoutpos, 529 #if defined(CONFIG_DEBUG_FS) 530 .debugfs_init = radeon_debugfs_init, 531 .debugfs_cleanup = radeon_debugfs_cleanup, 532 #endif 533 .irq_preinstall = radeon_driver_irq_preinstall_kms, 534 .irq_postinstall = radeon_driver_irq_postinstall_kms, 535 .irq_uninstall = radeon_driver_irq_uninstall_kms, 536 .irq_handler = radeon_driver_irq_handler_kms, 537 .ioctls = radeon_ioctls_kms, 538 .gem_free_object = radeon_gem_object_free, 539 .gem_open_object = radeon_gem_object_open, 540 .gem_close_object = radeon_gem_object_close, 541 .dumb_create = radeon_mode_dumb_create, 542 .dumb_map_offset = radeon_mode_dumb_mmap, 543 .dumb_destroy = drm_gem_dumb_destroy, 544 .fops = &radeon_driver_kms_fops, 545 546 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 547 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 548 .gem_prime_export = drm_gem_prime_export, 549 .gem_prime_import = drm_gem_prime_import, 550 .gem_prime_pin = radeon_gem_prime_pin, 551 .gem_prime_unpin = radeon_gem_prime_unpin, 552 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, 553 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, 554 .gem_prime_vmap = radeon_gem_prime_vmap, 555 .gem_prime_vunmap = radeon_gem_prime_vunmap, 556 557 .name = DRIVER_NAME, 558 .desc = DRIVER_DESC, 559 .date = DRIVER_DATE, 560 .major = KMS_DRIVER_MAJOR, 561 .minor = KMS_DRIVER_MINOR, 562 .patchlevel = KMS_DRIVER_PATCHLEVEL, 563 }; 564 565 static struct drm_driver *driver; 566 static struct pci_driver *pdriver; 567 568 #ifdef CONFIG_DRM_RADEON_UMS 569 static struct pci_driver radeon_pci_driver = { 570 .name = DRIVER_NAME, 571 .id_table = pciidlist, 572 }; 573 #endif 574 575 static struct pci_driver radeon_kms_pci_driver = { 576 .name = DRIVER_NAME, 577 .id_table = pciidlist, 578 .probe = radeon_pci_probe, 579 .remove = radeon_pci_remove, 580 .driver.pm = &radeon_pm_ops, 581 }; 582 583 static int __init radeon_init(void) 584 { 585 #ifdef CONFIG_VGA_CONSOLE 586 if (vgacon_text_force() && radeon_modeset == -1) { 587 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 588 radeon_modeset = 0; 589 } 590 #endif 591 /* set to modesetting by default if not nomodeset */ 592 if (radeon_modeset == -1) 593 radeon_modeset = 1; 594 595 if (radeon_modeset == 1) { 596 DRM_INFO("radeon kernel modesetting enabled.\n"); 597 driver = &kms_driver; 598 pdriver = &radeon_kms_pci_driver; 599 driver->driver_features |= DRIVER_MODESET; 600 driver->num_ioctls = radeon_max_kms_ioctl; 601 radeon_register_atpx_handler(); 602 603 } else { 604 #ifdef CONFIG_DRM_RADEON_UMS 605 DRM_INFO("radeon userspace modesetting enabled.\n"); 606 driver = &driver_old; 607 pdriver = &radeon_pci_driver; 608 driver->driver_features &= ~DRIVER_MODESET; 609 driver->num_ioctls = radeon_max_ioctl; 610 #else 611 DRM_ERROR("No UMS support in radeon module!\n"); 612 return -EINVAL; 613 #endif 614 } 615 616 /* let modprobe override vga console setting */ 617 return drm_pci_init(driver, pdriver); 618 } 619 620 static void __exit radeon_exit(void) 621 { 622 drm_pci_exit(driver, pdriver); 623 radeon_unregister_atpx_handler(); 624 } 625 626 module_init(radeon_init); 627 module_exit(radeon_exit); 628 629 MODULE_AUTHOR(DRIVER_AUTHOR); 630 MODULE_DESCRIPTION(DRIVER_DESC); 631 MODULE_LICENSE("GPL and additional rights"); 632