1 /** 2 * \file radeon_drv.c 3 * ATI Radeon driver 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8 /* 9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 10 * All Rights Reserved. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a 13 * copy of this software and associated documentation files (the "Software"), 14 * to deal in the Software without restriction, including without limitation 15 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 16 * and/or sell copies of the Software, and to permit persons to whom the 17 * Software is furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice (including the next 20 * paragraph) shall be included in all copies or substantial portions of the 21 * Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * OTHER DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include <drm/drmP.h> 33 #include <drm/radeon_drm.h> 34 #include "radeon_drv.h" 35 36 #include <drm/drm_pciids.h> 37 #include <linux/console.h> 38 #include <linux/module.h> 39 #include <linux/pm_runtime.h> 40 #include <linux/vga_switcheroo.h> 41 #include "drm_crtc_helper.h" 42 /* 43 * KMS wrapper. 44 * - 2.0.0 - initial interface 45 * - 2.1.0 - add square tiling interface 46 * - 2.2.0 - add r6xx/r7xx const buffer support 47 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 48 * - 2.4.0 - add crtc id query 49 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 50 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 51 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 52 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 53 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 54 * 2.10.0 - fusion 2D tiling 55 * 2.11.0 - backend map, initial compute support for the CS checker 56 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 57 * 2.13.0 - virtual memory support, streamout 58 * 2.14.0 - add evergreen tiling informations 59 * 2.15.0 - add max_pipes query 60 * 2.16.0 - fix evergreen 2D tiled surface calculation 61 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx 62 * 2.18.0 - r600-eg: allow "invalid" DB formats 63 * 2.19.0 - r600-eg: MSAA textures 64 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query 65 * 2.21.0 - r600-r700: FMASK and CMASK 66 * 2.22.0 - r600 only: RESOLVE_BOX allowed 67 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 68 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures 69 * 2.25.0 - eg+: new info request for num SE and num SH 70 * 2.26.0 - r600-eg: fix htile size computation 71 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 72 * 2.28.0 - r600-eg: Add MEM_WRITE packet support 73 * 2.29.0 - R500 FP16 color clear registers 74 * 2.30.0 - fix for FMASK texturing 75 * 2.31.0 - Add fastfb support for rs690 76 * 2.32.0 - new info request for rings working 77 * 2.33.0 - Add SI tiling mode array query 78 * 2.34.0 - Add CIK tiling mode array query 79 * 2.35.0 - Add CIK macrotile mode array query 80 * 2.36.0 - Fix CIK DCE tiling setup 81 * 2.37.0 - allow GS ring setup on r6xx/r7xx 82 * 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN), 83 * CIK: 1D and linear tiling modes contain valid PIPE_CONFIG 84 */ 85 #define KMS_DRIVER_MAJOR 2 86 #define KMS_DRIVER_MINOR 38 87 #define KMS_DRIVER_PATCHLEVEL 0 88 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 89 int radeon_driver_unload_kms(struct drm_device *dev); 90 void radeon_driver_lastclose_kms(struct drm_device *dev); 91 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); 92 void radeon_driver_postclose_kms(struct drm_device *dev, 93 struct drm_file *file_priv); 94 void radeon_driver_preclose_kms(struct drm_device *dev, 95 struct drm_file *file_priv); 96 int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon); 97 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); 98 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc); 99 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc); 100 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc); 101 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc, 102 int *max_error, 103 struct timeval *vblank_time, 104 unsigned flags); 105 void radeon_driver_irq_preinstall_kms(struct drm_device *dev); 106 int radeon_driver_irq_postinstall_kms(struct drm_device *dev); 107 void radeon_driver_irq_uninstall_kms(struct drm_device *dev); 108 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg); 109 void radeon_gem_object_free(struct drm_gem_object *obj); 110 int radeon_gem_object_open(struct drm_gem_object *obj, 111 struct drm_file *file_priv); 112 void radeon_gem_object_close(struct drm_gem_object *obj, 113 struct drm_file *file_priv); 114 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, 115 unsigned int flags, 116 int *vpos, int *hpos, ktime_t *stime, 117 ktime_t *etime); 118 extern const struct drm_ioctl_desc radeon_ioctls_kms[]; 119 extern int radeon_max_kms_ioctl; 120 int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 121 int radeon_mode_dumb_mmap(struct drm_file *filp, 122 struct drm_device *dev, 123 uint32_t handle, uint64_t *offset_p); 124 int radeon_mode_dumb_create(struct drm_file *file_priv, 125 struct drm_device *dev, 126 struct drm_mode_create_dumb *args); 127 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); 128 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, 129 size_t size, 130 struct sg_table *sg); 131 int radeon_gem_prime_pin(struct drm_gem_object *obj); 132 void radeon_gem_prime_unpin(struct drm_gem_object *obj); 133 void *radeon_gem_prime_vmap(struct drm_gem_object *obj); 134 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 135 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, 136 unsigned long arg); 137 138 #if defined(CONFIG_DEBUG_FS) 139 int radeon_debugfs_init(struct drm_minor *minor); 140 void radeon_debugfs_cleanup(struct drm_minor *minor); 141 #endif 142 143 /* atpx handler */ 144 #if defined(CONFIG_VGA_SWITCHEROO) 145 void radeon_register_atpx_handler(void); 146 void radeon_unregister_atpx_handler(void); 147 bool radeon_is_px(void); 148 #else 149 static inline void radeon_register_atpx_handler(void) {} 150 static inline void radeon_unregister_atpx_handler(void) {} 151 static inline bool radeon_is_px(void) { return false; } 152 #endif 153 154 int radeon_no_wb; 155 int radeon_modeset = -1; 156 int radeon_dynclks = -1; 157 int radeon_r4xx_atom = 0; 158 int radeon_agpmode = 0; 159 int radeon_vram_limit = 0; 160 int radeon_gart_size = -1; /* auto */ 161 int radeon_benchmarking = 0; 162 int radeon_testing = 0; 163 int radeon_connector_table = 0; 164 int radeon_tv = 1; 165 int radeon_audio = -1; 166 int radeon_disp_priority = 0; 167 int radeon_hw_i2c = 0; 168 int radeon_pcie_gen2 = -1; 169 int radeon_msi = -1; 170 int radeon_lockup_timeout = 10000; 171 int radeon_fastfb = 0; 172 int radeon_dpm = -1; 173 int radeon_aspm = -1; 174 int radeon_runtime_pm = -1; 175 int radeon_hard_reset = 0; 176 177 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 178 module_param_named(no_wb, radeon_no_wb, int, 0444); 179 180 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 181 module_param_named(modeset, radeon_modeset, int, 0400); 182 183 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 184 module_param_named(dynclks, radeon_dynclks, int, 0444); 185 186 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 187 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 188 189 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing"); 190 module_param_named(vramlimit, radeon_vram_limit, int, 0600); 191 192 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 193 module_param_named(agpmode, radeon_agpmode, int, 0444); 194 195 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); 196 module_param_named(gartsize, radeon_gart_size, int, 0600); 197 198 MODULE_PARM_DESC(benchmark, "Run benchmark"); 199 module_param_named(benchmark, radeon_benchmarking, int, 0444); 200 201 MODULE_PARM_DESC(test, "Run tests"); 202 module_param_named(test, radeon_testing, int, 0444); 203 204 MODULE_PARM_DESC(connector_table, "Force connector table"); 205 module_param_named(connector_table, radeon_connector_table, int, 0444); 206 207 MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 208 module_param_named(tv, radeon_tv, int, 0444); 209 210 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)"); 211 module_param_named(audio, radeon_audio, int, 0444); 212 213 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 214 module_param_named(disp_priority, radeon_disp_priority, int, 0444); 215 216 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 217 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 218 219 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 220 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 221 222 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 223 module_param_named(msi, radeon_msi, int, 0444); 224 225 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)"); 226 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); 227 228 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)"); 229 module_param_named(fastfb, radeon_fastfb, int, 0444); 230 231 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)"); 232 module_param_named(dpm, radeon_dpm, int, 0444); 233 234 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)"); 235 module_param_named(aspm, radeon_aspm, int, 0444); 236 237 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)"); 238 module_param_named(runpm, radeon_runtime_pm, int, 0444); 239 240 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))"); 241 module_param_named(hard_reset, radeon_hard_reset, int, 0444); 242 243 static struct pci_device_id pciidlist[] = { 244 radeon_PCI_IDS 245 }; 246 247 MODULE_DEVICE_TABLE(pci, pciidlist); 248 249 #ifdef CONFIG_DRM_RADEON_UMS 250 251 static int radeon_suspend(struct drm_device *dev, pm_message_t state) 252 { 253 drm_radeon_private_t *dev_priv = dev->dev_private; 254 255 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 256 return 0; 257 258 /* Disable *all* interrupts */ 259 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 260 RADEON_WRITE(R500_DxMODE_INT_MASK, 0); 261 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 262 return 0; 263 } 264 265 static int radeon_resume(struct drm_device *dev) 266 { 267 drm_radeon_private_t *dev_priv = dev->dev_private; 268 269 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 270 return 0; 271 272 /* Restore interrupt registers */ 273 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 274 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); 275 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); 276 return 0; 277 } 278 279 280 static const struct file_operations radeon_driver_old_fops = { 281 .owner = THIS_MODULE, 282 .open = drm_open, 283 .release = drm_release, 284 .unlocked_ioctl = drm_ioctl, 285 .mmap = drm_mmap, 286 .poll = drm_poll, 287 .read = drm_read, 288 #ifdef CONFIG_COMPAT 289 .compat_ioctl = radeon_compat_ioctl, 290 #endif 291 .llseek = noop_llseek, 292 }; 293 294 static struct drm_driver driver_old = { 295 .driver_features = 296 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | 297 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED, 298 .dev_priv_size = sizeof(drm_radeon_buf_priv_t), 299 .load = radeon_driver_load, 300 .firstopen = radeon_driver_firstopen, 301 .open = radeon_driver_open, 302 .preclose = radeon_driver_preclose, 303 .postclose = radeon_driver_postclose, 304 .lastclose = radeon_driver_lastclose, 305 .unload = radeon_driver_unload, 306 .suspend = radeon_suspend, 307 .resume = radeon_resume, 308 .get_vblank_counter = radeon_get_vblank_counter, 309 .enable_vblank = radeon_enable_vblank, 310 .disable_vblank = radeon_disable_vblank, 311 .master_create = radeon_master_create, 312 .master_destroy = radeon_master_destroy, 313 .irq_preinstall = radeon_driver_irq_preinstall, 314 .irq_postinstall = radeon_driver_irq_postinstall, 315 .irq_uninstall = radeon_driver_irq_uninstall, 316 .irq_handler = radeon_driver_irq_handler, 317 .ioctls = radeon_ioctls, 318 .dma_ioctl = radeon_cp_buffers, 319 .fops = &radeon_driver_old_fops, 320 .name = DRIVER_NAME, 321 .desc = DRIVER_DESC, 322 .date = DRIVER_DATE, 323 .major = DRIVER_MAJOR, 324 .minor = DRIVER_MINOR, 325 .patchlevel = DRIVER_PATCHLEVEL, 326 }; 327 328 #endif 329 330 static struct drm_driver kms_driver; 331 332 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) 333 { 334 struct apertures_struct *ap; 335 bool primary = false; 336 337 ap = alloc_apertures(1); 338 if (!ap) 339 return -ENOMEM; 340 341 ap->ranges[0].base = pci_resource_start(pdev, 0); 342 ap->ranges[0].size = pci_resource_len(pdev, 0); 343 344 #ifdef CONFIG_X86 345 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 346 #endif 347 remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 348 kfree(ap); 349 350 return 0; 351 } 352 353 static int radeon_pci_probe(struct pci_dev *pdev, 354 const struct pci_device_id *ent) 355 { 356 int ret; 357 358 /* Get rid of things like offb */ 359 ret = radeon_kick_out_firmware_fb(pdev); 360 if (ret) 361 return ret; 362 363 return drm_get_pci_dev(pdev, ent, &kms_driver); 364 } 365 366 static void 367 radeon_pci_remove(struct pci_dev *pdev) 368 { 369 struct drm_device *dev = pci_get_drvdata(pdev); 370 371 drm_put_dev(dev); 372 } 373 374 static int radeon_pmops_suspend(struct device *dev) 375 { 376 struct pci_dev *pdev = to_pci_dev(dev); 377 struct drm_device *drm_dev = pci_get_drvdata(pdev); 378 return radeon_suspend_kms(drm_dev, true, true); 379 } 380 381 static int radeon_pmops_resume(struct device *dev) 382 { 383 struct pci_dev *pdev = to_pci_dev(dev); 384 struct drm_device *drm_dev = pci_get_drvdata(pdev); 385 return radeon_resume_kms(drm_dev, true, true); 386 } 387 388 static int radeon_pmops_freeze(struct device *dev) 389 { 390 struct pci_dev *pdev = to_pci_dev(dev); 391 struct drm_device *drm_dev = pci_get_drvdata(pdev); 392 return radeon_suspend_kms(drm_dev, false, true); 393 } 394 395 static int radeon_pmops_thaw(struct device *dev) 396 { 397 struct pci_dev *pdev = to_pci_dev(dev); 398 struct drm_device *drm_dev = pci_get_drvdata(pdev); 399 return radeon_resume_kms(drm_dev, false, true); 400 } 401 402 static int radeon_pmops_runtime_suspend(struct device *dev) 403 { 404 struct pci_dev *pdev = to_pci_dev(dev); 405 struct drm_device *drm_dev = pci_get_drvdata(pdev); 406 int ret; 407 408 if (radeon_runtime_pm == 0) { 409 pm_runtime_forbid(dev); 410 return -EBUSY; 411 } 412 413 if (radeon_runtime_pm == -1 && !radeon_is_px()) { 414 pm_runtime_forbid(dev); 415 return -EBUSY; 416 } 417 418 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 419 drm_kms_helper_poll_disable(drm_dev); 420 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); 421 422 ret = radeon_suspend_kms(drm_dev, false, false); 423 pci_save_state(pdev); 424 pci_disable_device(pdev); 425 pci_set_power_state(pdev, PCI_D3cold); 426 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 427 428 return 0; 429 } 430 431 static int radeon_pmops_runtime_resume(struct device *dev) 432 { 433 struct pci_dev *pdev = to_pci_dev(dev); 434 struct drm_device *drm_dev = pci_get_drvdata(pdev); 435 int ret; 436 437 if (radeon_runtime_pm == 0) 438 return -EINVAL; 439 440 if (radeon_runtime_pm == -1 && !radeon_is_px()) 441 return -EINVAL; 442 443 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 444 445 pci_set_power_state(pdev, PCI_D0); 446 pci_restore_state(pdev); 447 ret = pci_enable_device(pdev); 448 if (ret) 449 return ret; 450 pci_set_master(pdev); 451 452 ret = radeon_resume_kms(drm_dev, false, false); 453 drm_kms_helper_poll_enable(drm_dev); 454 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); 455 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 456 return 0; 457 } 458 459 static int radeon_pmops_runtime_idle(struct device *dev) 460 { 461 struct pci_dev *pdev = to_pci_dev(dev); 462 struct drm_device *drm_dev = pci_get_drvdata(pdev); 463 struct drm_crtc *crtc; 464 465 if (radeon_runtime_pm == 0) { 466 pm_runtime_forbid(dev); 467 return -EBUSY; 468 } 469 470 /* are we PX enabled? */ 471 if (radeon_runtime_pm == -1 && !radeon_is_px()) { 472 DRM_DEBUG_DRIVER("failing to power off - not px\n"); 473 pm_runtime_forbid(dev); 474 return -EBUSY; 475 } 476 477 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { 478 if (crtc->enabled) { 479 DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); 480 return -EBUSY; 481 } 482 } 483 484 pm_runtime_mark_last_busy(dev); 485 pm_runtime_autosuspend(dev); 486 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 487 return 1; 488 } 489 490 long radeon_drm_ioctl(struct file *filp, 491 unsigned int cmd, unsigned long arg) 492 { 493 struct drm_file *file_priv = filp->private_data; 494 struct drm_device *dev; 495 long ret; 496 dev = file_priv->minor->dev; 497 ret = pm_runtime_get_sync(dev->dev); 498 if (ret < 0) 499 return ret; 500 501 ret = drm_ioctl(filp, cmd, arg); 502 503 pm_runtime_mark_last_busy(dev->dev); 504 pm_runtime_put_autosuspend(dev->dev); 505 return ret; 506 } 507 508 static const struct dev_pm_ops radeon_pm_ops = { 509 .suspend = radeon_pmops_suspend, 510 .resume = radeon_pmops_resume, 511 .freeze = radeon_pmops_freeze, 512 .thaw = radeon_pmops_thaw, 513 .poweroff = radeon_pmops_freeze, 514 .restore = radeon_pmops_resume, 515 .runtime_suspend = radeon_pmops_runtime_suspend, 516 .runtime_resume = radeon_pmops_runtime_resume, 517 .runtime_idle = radeon_pmops_runtime_idle, 518 }; 519 520 static const struct file_operations radeon_driver_kms_fops = { 521 .owner = THIS_MODULE, 522 .open = drm_open, 523 .release = drm_release, 524 .unlocked_ioctl = radeon_drm_ioctl, 525 .mmap = radeon_mmap, 526 .poll = drm_poll, 527 .read = drm_read, 528 #ifdef CONFIG_COMPAT 529 .compat_ioctl = radeon_kms_compat_ioctl, 530 #endif 531 }; 532 533 static struct drm_driver kms_driver = { 534 .driver_features = 535 DRIVER_USE_AGP | 536 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | 537 DRIVER_PRIME | DRIVER_RENDER, 538 .dev_priv_size = 0, 539 .load = radeon_driver_load_kms, 540 .open = radeon_driver_open_kms, 541 .preclose = radeon_driver_preclose_kms, 542 .postclose = radeon_driver_postclose_kms, 543 .lastclose = radeon_driver_lastclose_kms, 544 .unload = radeon_driver_unload_kms, 545 .get_vblank_counter = radeon_get_vblank_counter_kms, 546 .enable_vblank = radeon_enable_vblank_kms, 547 .disable_vblank = radeon_disable_vblank_kms, 548 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms, 549 .get_scanout_position = radeon_get_crtc_scanoutpos, 550 #if defined(CONFIG_DEBUG_FS) 551 .debugfs_init = radeon_debugfs_init, 552 .debugfs_cleanup = radeon_debugfs_cleanup, 553 #endif 554 .irq_preinstall = radeon_driver_irq_preinstall_kms, 555 .irq_postinstall = radeon_driver_irq_postinstall_kms, 556 .irq_uninstall = radeon_driver_irq_uninstall_kms, 557 .irq_handler = radeon_driver_irq_handler_kms, 558 .ioctls = radeon_ioctls_kms, 559 .gem_free_object = radeon_gem_object_free, 560 .gem_open_object = radeon_gem_object_open, 561 .gem_close_object = radeon_gem_object_close, 562 .dumb_create = radeon_mode_dumb_create, 563 .dumb_map_offset = radeon_mode_dumb_mmap, 564 .dumb_destroy = drm_gem_dumb_destroy, 565 .fops = &radeon_driver_kms_fops, 566 567 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 568 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 569 .gem_prime_export = drm_gem_prime_export, 570 .gem_prime_import = drm_gem_prime_import, 571 .gem_prime_pin = radeon_gem_prime_pin, 572 .gem_prime_unpin = radeon_gem_prime_unpin, 573 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, 574 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, 575 .gem_prime_vmap = radeon_gem_prime_vmap, 576 .gem_prime_vunmap = radeon_gem_prime_vunmap, 577 578 .name = DRIVER_NAME, 579 .desc = DRIVER_DESC, 580 .date = DRIVER_DATE, 581 .major = KMS_DRIVER_MAJOR, 582 .minor = KMS_DRIVER_MINOR, 583 .patchlevel = KMS_DRIVER_PATCHLEVEL, 584 }; 585 586 static struct drm_driver *driver; 587 static struct pci_driver *pdriver; 588 589 #ifdef CONFIG_DRM_RADEON_UMS 590 static struct pci_driver radeon_pci_driver = { 591 .name = DRIVER_NAME, 592 .id_table = pciidlist, 593 }; 594 #endif 595 596 static struct pci_driver radeon_kms_pci_driver = { 597 .name = DRIVER_NAME, 598 .id_table = pciidlist, 599 .probe = radeon_pci_probe, 600 .remove = radeon_pci_remove, 601 .driver.pm = &radeon_pm_ops, 602 }; 603 604 static int __init radeon_init(void) 605 { 606 #ifdef CONFIG_VGA_CONSOLE 607 if (vgacon_text_force() && radeon_modeset == -1) { 608 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 609 radeon_modeset = 0; 610 } 611 #endif 612 /* set to modesetting by default if not nomodeset */ 613 if (radeon_modeset == -1) 614 radeon_modeset = 1; 615 616 if (radeon_modeset == 1) { 617 DRM_INFO("radeon kernel modesetting enabled.\n"); 618 driver = &kms_driver; 619 pdriver = &radeon_kms_pci_driver; 620 driver->driver_features |= DRIVER_MODESET; 621 driver->num_ioctls = radeon_max_kms_ioctl; 622 radeon_register_atpx_handler(); 623 624 } else { 625 #ifdef CONFIG_DRM_RADEON_UMS 626 DRM_INFO("radeon userspace modesetting enabled.\n"); 627 driver = &driver_old; 628 pdriver = &radeon_pci_driver; 629 driver->driver_features &= ~DRIVER_MODESET; 630 driver->num_ioctls = radeon_max_ioctl; 631 #else 632 DRM_ERROR("No UMS support in radeon module!\n"); 633 return -EINVAL; 634 #endif 635 } 636 637 /* let modprobe override vga console setting */ 638 return drm_pci_init(driver, pdriver); 639 } 640 641 static void __exit radeon_exit(void) 642 { 643 drm_pci_exit(driver, pdriver); 644 radeon_unregister_atpx_handler(); 645 } 646 647 module_init(radeon_init); 648 module_exit(radeon_exit); 649 650 MODULE_AUTHOR(DRIVER_AUTHOR); 651 MODULE_DESCRIPTION(DRIVER_DESC); 652 MODULE_LICENSE("GPL and additional rights"); 653