1 /* 2 * Copyright 2009 Jerome Glisse. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Jerome Glisse 23 */ 24 #include <drm/drmP.h> 25 #include <drm/radeon_drm.h> 26 #include "radeon_reg.h" 27 #include "radeon.h" 28 29 #define RADEON_BENCHMARK_COPY_BLIT 1 30 #define RADEON_BENCHMARK_COPY_DMA 0 31 32 #define RADEON_BENCHMARK_ITERATIONS 1024 33 #define RADEON_BENCHMARK_COMMON_MODES_N 17 34 35 static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size, 36 uint64_t saddr, uint64_t daddr, 37 int flag, int n) 38 { 39 unsigned long start_jiffies; 40 unsigned long end_jiffies; 41 struct radeon_fence *fence = NULL; 42 int i, r; 43 44 start_jiffies = jiffies; 45 for (i = 0; i < n; i++) { 46 r = radeon_fence_create(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX); 47 if (r) 48 return r; 49 50 switch (flag) { 51 case RADEON_BENCHMARK_COPY_DMA: 52 r = radeon_copy_dma(rdev, saddr, daddr, 53 size / RADEON_GPU_PAGE_SIZE, 54 fence); 55 break; 56 case RADEON_BENCHMARK_COPY_BLIT: 57 r = radeon_copy_blit(rdev, saddr, daddr, 58 size / RADEON_GPU_PAGE_SIZE, 59 fence); 60 break; 61 default: 62 DRM_ERROR("Unknown copy method\n"); 63 r = -EINVAL; 64 } 65 if (r) 66 goto exit_do_move; 67 r = radeon_fence_wait(fence, false); 68 if (r) 69 goto exit_do_move; 70 radeon_fence_unref(&fence); 71 } 72 end_jiffies = jiffies; 73 r = jiffies_to_msecs(end_jiffies - start_jiffies); 74 75 exit_do_move: 76 if (fence) 77 radeon_fence_unref(&fence); 78 return r; 79 } 80 81 82 static void radeon_benchmark_log_results(int n, unsigned size, 83 unsigned int time, 84 unsigned sdomain, unsigned ddomain, 85 char *kind) 86 { 87 unsigned int throughput = (n * (size >> 10)) / time; 88 DRM_INFO("radeon: %s %u bo moves of %u kB from" 89 " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n", 90 kind, n, size >> 10, sdomain, ddomain, time, 91 throughput * 8, throughput); 92 } 93 94 static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, 95 unsigned sdomain, unsigned ddomain) 96 { 97 struct radeon_bo *dobj = NULL; 98 struct radeon_bo *sobj = NULL; 99 uint64_t saddr, daddr; 100 int r, n; 101 int time; 102 103 n = RADEON_BENCHMARK_ITERATIONS; 104 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, &sobj); 105 if (r) { 106 goto out_cleanup; 107 } 108 r = radeon_bo_reserve(sobj, false); 109 if (unlikely(r != 0)) 110 goto out_cleanup; 111 r = radeon_bo_pin(sobj, sdomain, &saddr); 112 radeon_bo_unreserve(sobj); 113 if (r) { 114 goto out_cleanup; 115 } 116 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, &dobj); 117 if (r) { 118 goto out_cleanup; 119 } 120 r = radeon_bo_reserve(dobj, false); 121 if (unlikely(r != 0)) 122 goto out_cleanup; 123 r = radeon_bo_pin(dobj, ddomain, &daddr); 124 radeon_bo_unreserve(dobj); 125 if (r) { 126 goto out_cleanup; 127 } 128 129 /* r100 doesn't have dma engine so skip the test */ 130 /* also, VRAM-to-VRAM test doesn't make much sense for DMA */ 131 /* skip it as well if domains are the same */ 132 if ((rdev->asic->copy_dma) && (sdomain != ddomain)) { 133 time = radeon_benchmark_do_move(rdev, size, saddr, daddr, 134 RADEON_BENCHMARK_COPY_DMA, n); 135 if (time < 0) 136 goto out_cleanup; 137 if (time > 0) 138 radeon_benchmark_log_results(n, size, time, 139 sdomain, ddomain, "dma"); 140 } 141 142 time = radeon_benchmark_do_move(rdev, size, saddr, daddr, 143 RADEON_BENCHMARK_COPY_BLIT, n); 144 if (time < 0) 145 goto out_cleanup; 146 if (time > 0) 147 radeon_benchmark_log_results(n, size, time, 148 sdomain, ddomain, "blit"); 149 150 out_cleanup: 151 if (sobj) { 152 r = radeon_bo_reserve(sobj, false); 153 if (likely(r == 0)) { 154 radeon_bo_unpin(sobj); 155 radeon_bo_unreserve(sobj); 156 } 157 radeon_bo_unref(&sobj); 158 } 159 if (dobj) { 160 r = radeon_bo_reserve(dobj, false); 161 if (likely(r == 0)) { 162 radeon_bo_unpin(dobj); 163 radeon_bo_unreserve(dobj); 164 } 165 radeon_bo_unref(&dobj); 166 } 167 168 if (r) { 169 DRM_ERROR("Error while benchmarking BO move.\n"); 170 } 171 } 172 173 void radeon_benchmark(struct radeon_device *rdev, int test_number) 174 { 175 int i; 176 int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = { 177 640 * 480 * 4, 178 720 * 480 * 4, 179 800 * 600 * 4, 180 848 * 480 * 4, 181 1024 * 768 * 4, 182 1152 * 768 * 4, 183 1280 * 720 * 4, 184 1280 * 800 * 4, 185 1280 * 854 * 4, 186 1280 * 960 * 4, 187 1280 * 1024 * 4, 188 1440 * 900 * 4, 189 1400 * 1050 * 4, 190 1680 * 1050 * 4, 191 1600 * 1200 * 4, 192 1920 * 1080 * 4, 193 1920 * 1200 * 4 194 }; 195 196 switch (test_number) { 197 case 1: 198 /* simple test, VRAM to GTT and GTT to VRAM */ 199 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT, 200 RADEON_GEM_DOMAIN_VRAM); 201 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, 202 RADEON_GEM_DOMAIN_GTT); 203 break; 204 case 2: 205 /* simple test, VRAM to VRAM */ 206 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, 207 RADEON_GEM_DOMAIN_VRAM); 208 break; 209 case 3: 210 /* GTT to VRAM, buffer size sweep, powers of 2 */ 211 for (i = 1; i <= 65536; i <<= 1) 212 radeon_benchmark_move(rdev, i*1024, 213 RADEON_GEM_DOMAIN_GTT, 214 RADEON_GEM_DOMAIN_VRAM); 215 break; 216 case 4: 217 /* VRAM to GTT, buffer size sweep, powers of 2 */ 218 for (i = 1; i <= 65536; i <<= 1) 219 radeon_benchmark_move(rdev, i*1024, 220 RADEON_GEM_DOMAIN_VRAM, 221 RADEON_GEM_DOMAIN_GTT); 222 break; 223 case 5: 224 /* VRAM to VRAM, buffer size sweep, powers of 2 */ 225 for (i = 1; i <= 65536; i <<= 1) 226 radeon_benchmark_move(rdev, i*1024, 227 RADEON_GEM_DOMAIN_VRAM, 228 RADEON_GEM_DOMAIN_VRAM); 229 break; 230 case 6: 231 /* GTT to VRAM, buffer size sweep, common modes */ 232 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) 233 radeon_benchmark_move(rdev, common_modes[i], 234 RADEON_GEM_DOMAIN_GTT, 235 RADEON_GEM_DOMAIN_VRAM); 236 break; 237 case 7: 238 /* VRAM to GTT, buffer size sweep, common modes */ 239 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) 240 radeon_benchmark_move(rdev, common_modes[i], 241 RADEON_GEM_DOMAIN_VRAM, 242 RADEON_GEM_DOMAIN_GTT); 243 break; 244 case 8: 245 /* VRAM to VRAM, buffer size sweep, common modes */ 246 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) 247 radeon_benchmark_move(rdev, common_modes[i], 248 RADEON_GEM_DOMAIN_VRAM, 249 RADEON_GEM_DOMAIN_VRAM); 250 break; 251 252 default: 253 DRM_ERROR("Unknown benchmark\n"); 254 } 255 } 256