1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Slava Grigorev <slava.grigorev@amd.com> 23 */ 24 25 #include <linux/gcd.h> 26 #include <drm/drmP.h> 27 #include <drm/drm_crtc.h> 28 #include "radeon.h" 29 #include "atom.h" 30 #include "radeon_audio.h" 31 32 void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 33 u8 enable_mask); 34 void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 35 u8 enable_mask); 36 void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 37 u8 enable_mask); 38 u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg); 39 void dce6_endpoint_wreg(struct radeon_device *rdev, 40 u32 offset, u32 reg, u32 v); 41 void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder, 42 struct cea_sad *sads, int sad_count); 43 void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder, 44 struct cea_sad *sads, int sad_count); 45 void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, 46 struct cea_sad *sads, int sad_count); 47 void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 48 u8 *sadb, int sad_count); 49 void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 50 u8 *sadb, int sad_count); 51 void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 52 u8 *sadb, int sad_count); 53 void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 54 u8 *sadb, int sad_count); 55 void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 56 u8 *sadb, int sad_count); 57 void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 58 u8 *sadb, int sad_count); 59 void dce4_afmt_write_latency_fields(struct drm_encoder *encoder, 60 struct drm_connector *connector, struct drm_display_mode *mode); 61 void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, 62 struct drm_connector *connector, struct drm_display_mode *mode); 63 struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev); 64 struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev); 65 void dce6_afmt_select_pin(struct drm_encoder *encoder); 66 void r600_hdmi_audio_set_dto(struct radeon_device *rdev, 67 struct radeon_crtc *crtc, unsigned int clock); 68 void dce3_2_audio_set_dto(struct radeon_device *rdev, 69 struct radeon_crtc *crtc, unsigned int clock); 70 void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, 71 struct radeon_crtc *crtc, unsigned int clock); 72 void dce4_dp_audio_set_dto(struct radeon_device *rdev, 73 struct radeon_crtc *crtc, unsigned int clock); 74 void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, 75 struct radeon_crtc *crtc, unsigned int clock); 76 void dce6_dp_audio_set_dto(struct radeon_device *rdev, 77 struct radeon_crtc *crtc, unsigned int clock); 78 void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, 79 unsigned char *buffer, size_t size); 80 void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, 81 unsigned char *buffer, size_t size); 82 void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset, 83 const struct radeon_hdmi_acr *acr); 84 void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset, 85 const struct radeon_hdmi_acr *acr); 86 void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset, 87 const struct radeon_hdmi_acr *acr); 88 void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset); 89 void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset); 90 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, 91 u32 offset, int bpc); 92 void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset); 93 void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset); 94 void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset); 95 void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 96 void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 97 void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 98 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 99 struct drm_display_mode *mode); 100 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 101 struct drm_display_mode *mode); 102 void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); 103 void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); 104 void evergreen_dp_enable(struct drm_encoder *encoder, bool enable); 105 106 static const u32 pin_offsets[7] = 107 { 108 (0x5e00 - 0x5e00), 109 (0x5e18 - 0x5e00), 110 (0x5e30 - 0x5e00), 111 (0x5e48 - 0x5e00), 112 (0x5e60 - 0x5e00), 113 (0x5e78 - 0x5e00), 114 (0x5e90 - 0x5e00), 115 }; 116 117 static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 118 { 119 return RREG32(reg); 120 } 121 122 static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset, 123 u32 reg, u32 v) 124 { 125 WREG32(reg, v); 126 } 127 128 static struct radeon_audio_basic_funcs r600_funcs = { 129 .endpoint_rreg = radeon_audio_rreg, 130 .endpoint_wreg = radeon_audio_wreg, 131 .enable = r600_audio_enable, 132 }; 133 134 static struct radeon_audio_basic_funcs dce32_funcs = { 135 .endpoint_rreg = radeon_audio_rreg, 136 .endpoint_wreg = radeon_audio_wreg, 137 .enable = r600_audio_enable, 138 }; 139 140 static struct radeon_audio_basic_funcs dce4_funcs = { 141 .endpoint_rreg = radeon_audio_rreg, 142 .endpoint_wreg = radeon_audio_wreg, 143 .enable = dce4_audio_enable, 144 }; 145 146 static struct radeon_audio_basic_funcs dce6_funcs = { 147 .endpoint_rreg = dce6_endpoint_rreg, 148 .endpoint_wreg = dce6_endpoint_wreg, 149 .enable = dce6_audio_enable, 150 }; 151 152 static struct radeon_audio_funcs r600_hdmi_funcs = { 153 .get_pin = r600_audio_get_pin, 154 .set_dto = r600_hdmi_audio_set_dto, 155 .update_acr = r600_hdmi_update_acr, 156 .set_vbi_packet = r600_set_vbi_packet, 157 .set_avi_packet = r600_set_avi_packet, 158 .set_audio_packet = r600_set_audio_packet, 159 .set_mute = r600_set_mute, 160 .mode_set = radeon_audio_hdmi_mode_set, 161 .dpms = r600_hdmi_enable, 162 }; 163 164 static struct radeon_audio_funcs dce32_hdmi_funcs = { 165 .get_pin = r600_audio_get_pin, 166 .write_sad_regs = dce3_2_afmt_write_sad_regs, 167 .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation, 168 .set_dto = dce3_2_audio_set_dto, 169 .update_acr = dce3_2_hdmi_update_acr, 170 .set_vbi_packet = r600_set_vbi_packet, 171 .set_avi_packet = r600_set_avi_packet, 172 .set_audio_packet = dce3_2_set_audio_packet, 173 .set_mute = dce3_2_set_mute, 174 .mode_set = radeon_audio_hdmi_mode_set, 175 .dpms = r600_hdmi_enable, 176 }; 177 178 static struct radeon_audio_funcs dce32_dp_funcs = { 179 .get_pin = r600_audio_get_pin, 180 .write_sad_regs = dce3_2_afmt_write_sad_regs, 181 .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation, 182 .set_dto = dce3_2_audio_set_dto, 183 .set_avi_packet = r600_set_avi_packet, 184 .set_audio_packet = dce3_2_set_audio_packet, 185 }; 186 187 static struct radeon_audio_funcs dce4_hdmi_funcs = { 188 .get_pin = r600_audio_get_pin, 189 .write_sad_regs = evergreen_hdmi_write_sad_regs, 190 .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation, 191 .write_latency_fields = dce4_afmt_write_latency_fields, 192 .set_dto = dce4_hdmi_audio_set_dto, 193 .update_acr = evergreen_hdmi_update_acr, 194 .set_vbi_packet = dce4_set_vbi_packet, 195 .set_color_depth = dce4_hdmi_set_color_depth, 196 .set_avi_packet = evergreen_set_avi_packet, 197 .set_audio_packet = dce4_set_audio_packet, 198 .set_mute = dce4_set_mute, 199 .mode_set = radeon_audio_hdmi_mode_set, 200 .dpms = evergreen_hdmi_enable, 201 }; 202 203 static struct radeon_audio_funcs dce4_dp_funcs = { 204 .get_pin = r600_audio_get_pin, 205 .write_sad_regs = evergreen_hdmi_write_sad_regs, 206 .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation, 207 .write_latency_fields = dce4_afmt_write_latency_fields, 208 .set_dto = dce4_dp_audio_set_dto, 209 .set_avi_packet = evergreen_set_avi_packet, 210 .set_audio_packet = dce4_set_audio_packet, 211 .mode_set = radeon_audio_dp_mode_set, 212 .dpms = evergreen_dp_enable, 213 }; 214 215 static struct radeon_audio_funcs dce6_hdmi_funcs = { 216 .select_pin = dce6_afmt_select_pin, 217 .get_pin = dce6_audio_get_pin, 218 .write_sad_regs = dce6_afmt_write_sad_regs, 219 .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation, 220 .write_latency_fields = dce6_afmt_write_latency_fields, 221 .set_dto = dce6_hdmi_audio_set_dto, 222 .update_acr = evergreen_hdmi_update_acr, 223 .set_vbi_packet = dce4_set_vbi_packet, 224 .set_color_depth = dce4_hdmi_set_color_depth, 225 .set_avi_packet = evergreen_set_avi_packet, 226 .set_audio_packet = dce4_set_audio_packet, 227 .set_mute = dce4_set_mute, 228 .mode_set = radeon_audio_hdmi_mode_set, 229 .dpms = evergreen_hdmi_enable, 230 }; 231 232 static struct radeon_audio_funcs dce6_dp_funcs = { 233 .select_pin = dce6_afmt_select_pin, 234 .get_pin = dce6_audio_get_pin, 235 .write_sad_regs = dce6_afmt_write_sad_regs, 236 .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation, 237 .write_latency_fields = dce6_afmt_write_latency_fields, 238 .set_dto = dce6_dp_audio_set_dto, 239 .set_avi_packet = evergreen_set_avi_packet, 240 .set_audio_packet = dce4_set_audio_packet, 241 .mode_set = radeon_audio_dp_mode_set, 242 .dpms = evergreen_dp_enable, 243 }; 244 245 static void radeon_audio_interface_init(struct radeon_device *rdev) 246 { 247 if (ASIC_IS_DCE6(rdev)) { 248 rdev->audio.funcs = &dce6_funcs; 249 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs; 250 rdev->audio.dp_funcs = &dce6_dp_funcs; 251 } else if (ASIC_IS_DCE4(rdev)) { 252 rdev->audio.funcs = &dce4_funcs; 253 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs; 254 rdev->audio.dp_funcs = &dce4_dp_funcs; 255 } else if (ASIC_IS_DCE32(rdev)) { 256 rdev->audio.funcs = &dce32_funcs; 257 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs; 258 rdev->audio.dp_funcs = &dce32_dp_funcs; 259 } else { 260 rdev->audio.funcs = &r600_funcs; 261 rdev->audio.hdmi_funcs = &r600_hdmi_funcs; 262 rdev->audio.dp_funcs = 0; 263 } 264 } 265 266 static int radeon_audio_chipset_supported(struct radeon_device *rdev) 267 { 268 return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev); 269 } 270 271 int radeon_audio_init(struct radeon_device *rdev) 272 { 273 int i; 274 275 if (!radeon_audio || !radeon_audio_chipset_supported(rdev)) 276 return 0; 277 278 rdev->audio.enabled = true; 279 280 if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */ 281 rdev->audio.num_pins = 3; 282 else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */ 283 rdev->audio.num_pins = 7; 284 else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */ 285 rdev->audio.num_pins = 7; 286 else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */ 287 rdev->audio.num_pins = 2; 288 else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */ 289 rdev->audio.num_pins = 6; 290 else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */ 291 rdev->audio.num_pins = 6; 292 else 293 rdev->audio.num_pins = 1; 294 295 for (i = 0; i < rdev->audio.num_pins; i++) { 296 rdev->audio.pin[i].channels = -1; 297 rdev->audio.pin[i].rate = -1; 298 rdev->audio.pin[i].bits_per_sample = -1; 299 rdev->audio.pin[i].status_bits = 0; 300 rdev->audio.pin[i].category_code = 0; 301 rdev->audio.pin[i].connected = false; 302 rdev->audio.pin[i].offset = pin_offsets[i]; 303 rdev->audio.pin[i].id = i; 304 } 305 306 radeon_audio_interface_init(rdev); 307 308 /* disable audio. it will be set up later */ 309 for (i = 0; i < rdev->audio.num_pins; i++) 310 radeon_audio_enable(rdev, &rdev->audio.pin[i], false); 311 312 return 0; 313 } 314 315 u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 316 { 317 if (rdev->audio.funcs->endpoint_rreg) 318 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg); 319 320 return 0; 321 } 322 323 void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset, 324 u32 reg, u32 v) 325 { 326 if (rdev->audio.funcs->endpoint_wreg) 327 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v); 328 } 329 330 static void radeon_audio_write_sad_regs(struct drm_encoder *encoder) 331 { 332 struct radeon_encoder *radeon_encoder; 333 struct drm_connector *connector; 334 struct radeon_connector *radeon_connector = NULL; 335 struct cea_sad *sads; 336 int sad_count; 337 338 list_for_each_entry(connector, 339 &encoder->dev->mode_config.connector_list, head) { 340 if (connector->encoder == encoder) { 341 radeon_connector = to_radeon_connector(connector); 342 break; 343 } 344 } 345 346 if (!radeon_connector) { 347 DRM_ERROR("Couldn't find encoder's connector\n"); 348 return; 349 } 350 351 sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads); 352 if (sad_count <= 0) { 353 DRM_ERROR("Couldn't read SADs: %d\n", sad_count); 354 return; 355 } 356 BUG_ON(!sads); 357 358 radeon_encoder = to_radeon_encoder(encoder); 359 360 if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs) 361 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count); 362 363 kfree(sads); 364 } 365 366 static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder) 367 { 368 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 369 struct drm_connector *connector; 370 struct radeon_connector *radeon_connector = NULL; 371 u8 *sadb = NULL; 372 int sad_count; 373 374 list_for_each_entry(connector, 375 &encoder->dev->mode_config.connector_list, head) { 376 if (connector->encoder == encoder) { 377 radeon_connector = to_radeon_connector(connector); 378 break; 379 } 380 } 381 382 if (!radeon_connector) { 383 DRM_ERROR("Couldn't find encoder's connector\n"); 384 return; 385 } 386 387 sad_count = drm_edid_to_speaker_allocation( 388 radeon_connector_edid(connector), &sadb); 389 if (sad_count < 0) { 390 DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n", 391 sad_count); 392 sad_count = 0; 393 } 394 395 if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation) 396 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count); 397 398 kfree(sadb); 399 } 400 401 static void radeon_audio_write_latency_fields(struct drm_encoder *encoder, 402 struct drm_display_mode *mode) 403 { 404 struct radeon_encoder *radeon_encoder; 405 struct drm_connector *connector; 406 struct radeon_connector *radeon_connector = 0; 407 408 list_for_each_entry(connector, 409 &encoder->dev->mode_config.connector_list, head) { 410 if (connector->encoder == encoder) { 411 radeon_connector = to_radeon_connector(connector); 412 break; 413 } 414 } 415 416 if (!radeon_connector) { 417 DRM_ERROR("Couldn't find encoder's connector\n"); 418 return; 419 } 420 421 radeon_encoder = to_radeon_encoder(encoder); 422 423 if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields) 424 radeon_encoder->audio->write_latency_fields(encoder, connector, mode); 425 } 426 427 struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder) 428 { 429 struct radeon_device *rdev = encoder->dev->dev_private; 430 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 431 432 if (radeon_encoder->audio && radeon_encoder->audio->get_pin) 433 return radeon_encoder->audio->get_pin(rdev); 434 435 return NULL; 436 } 437 438 static void radeon_audio_select_pin(struct drm_encoder *encoder) 439 { 440 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 441 442 if (radeon_encoder->audio && radeon_encoder->audio->select_pin) 443 radeon_encoder->audio->select_pin(encoder); 444 } 445 446 void radeon_audio_enable(struct radeon_device *rdev, 447 struct r600_audio_pin *pin, u8 enable_mask) 448 { 449 if (rdev->audio.funcs->enable) 450 rdev->audio.funcs->enable(rdev, pin, enable_mask); 451 } 452 453 void radeon_audio_detect(struct drm_connector *connector, 454 enum drm_connector_status status) 455 { 456 struct radeon_device *rdev; 457 struct radeon_encoder *radeon_encoder; 458 struct radeon_encoder_atom_dig *dig; 459 460 if (!connector || !connector->encoder) 461 return; 462 463 if (!radeon_encoder_is_digital(connector->encoder)) 464 return; 465 466 rdev = connector->encoder->dev->dev_private; 467 468 if (!radeon_audio_chipset_supported(rdev)) 469 return; 470 471 radeon_encoder = to_radeon_encoder(connector->encoder); 472 dig = radeon_encoder->enc_priv; 473 474 if (!dig->afmt) 475 return; 476 477 if (status == connector_status_connected) { 478 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 479 480 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort && 481 radeon_dp_getsinktype(radeon_connector) == 482 CONNECTOR_OBJECT_ID_DISPLAYPORT) 483 radeon_encoder->audio = rdev->audio.dp_funcs; 484 else 485 radeon_encoder->audio = rdev->audio.hdmi_funcs; 486 487 dig->afmt->pin = radeon_audio_get_pin(connector->encoder); 488 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 489 radeon_audio_enable(rdev, dig->afmt->pin, 0xf); 490 } else { 491 radeon_audio_enable(rdev, dig->afmt->pin, 0); 492 dig->afmt->pin = NULL; 493 } 494 } else { 495 radeon_audio_enable(rdev, dig->afmt->pin, 0); 496 dig->afmt->pin = NULL; 497 } 498 } 499 500 void radeon_audio_fini(struct radeon_device *rdev) 501 { 502 int i; 503 504 if (!rdev->audio.enabled) 505 return; 506 507 for (i = 0; i < rdev->audio.num_pins; i++) 508 radeon_audio_enable(rdev, &rdev->audio.pin[i], false); 509 510 rdev->audio.enabled = false; 511 } 512 513 static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock) 514 { 515 struct radeon_device *rdev = encoder->dev->dev_private; 516 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 517 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc); 518 519 if (radeon_encoder->audio && radeon_encoder->audio->set_dto) 520 radeon_encoder->audio->set_dto(rdev, crtc, clock); 521 } 522 523 static int radeon_audio_set_avi_packet(struct drm_encoder *encoder, 524 struct drm_display_mode *mode) 525 { 526 struct radeon_device *rdev = encoder->dev->dev_private; 527 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 528 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 529 struct drm_connector *connector; 530 struct radeon_connector *radeon_connector = NULL; 531 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE]; 532 struct hdmi_avi_infoframe frame; 533 int err; 534 535 list_for_each_entry(connector, 536 &encoder->dev->mode_config.connector_list, head) { 537 if (connector->encoder == encoder) { 538 radeon_connector = to_radeon_connector(connector); 539 break; 540 } 541 } 542 543 if (!radeon_connector) { 544 DRM_ERROR("Couldn't find encoder's connector\n"); 545 return -ENOENT; 546 } 547 548 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode); 549 if (err < 0) { 550 DRM_ERROR("failed to setup AVI infoframe: %d\n", err); 551 return err; 552 } 553 554 if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) { 555 if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB) 556 frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED; 557 else 558 frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL; 559 } else { 560 frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; 561 } 562 563 err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer)); 564 if (err < 0) { 565 DRM_ERROR("failed to pack AVI infoframe: %d\n", err); 566 return err; 567 } 568 569 if (dig && dig->afmt && 570 radeon_encoder->audio && radeon_encoder->audio->set_avi_packet) 571 radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset, 572 buffer, sizeof(buffer)); 573 574 return 0; 575 } 576 577 /* 578 * calculate CTS and N values if they are not found in the table 579 */ 580 static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq) 581 { 582 int n, cts; 583 unsigned long div, mul; 584 585 /* Safe, but overly large values */ 586 n = 128 * freq; 587 cts = clock * 1000; 588 589 /* Smallest valid fraction */ 590 div = gcd(n, cts); 591 592 n /= div; 593 cts /= div; 594 595 /* 596 * The optimal N is 128*freq/1000. Calculate the closest larger 597 * value that doesn't truncate any bits. 598 */ 599 mul = ((128*freq/1000) + (n-1))/n; 600 601 n *= mul; 602 cts *= mul; 603 604 /* Check that we are in spec (not always possible) */ 605 if (n < (128*freq/1500)) 606 printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n"); 607 if (n > (128*freq/300)) 608 printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n"); 609 610 *N = n; 611 *CTS = cts; 612 613 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n", 614 *N, *CTS, freq); 615 } 616 617 static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock) 618 { 619 static struct radeon_hdmi_acr res; 620 u8 i; 621 622 static const struct radeon_hdmi_acr hdmi_predefined_acr[] = { 623 /* 32kHz 44.1kHz 48kHz */ 624 /* Clock N CTS N CTS N CTS */ 625 { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */ 626 { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */ 627 { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */ 628 { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */ 629 { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */ 630 { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */ 631 { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */ 632 { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */ 633 { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */ 634 { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */ 635 }; 636 637 /* Precalculated values for common clocks */ 638 for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++) 639 if (hdmi_predefined_acr[i].clock == clock) 640 return &hdmi_predefined_acr[i]; 641 642 /* And odd clocks get manually calculated */ 643 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); 644 radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100); 645 radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000); 646 647 return &res; 648 } 649 650 /* 651 * update the N and CTS parameters for a given pixel clock rate 652 */ 653 static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock) 654 { 655 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock); 656 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 657 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 658 659 if (!dig || !dig->afmt) 660 return; 661 662 if (radeon_encoder->audio && radeon_encoder->audio->update_acr) 663 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr); 664 } 665 666 static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder) 667 { 668 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 669 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 670 671 if (!dig || !dig->afmt) 672 return; 673 674 if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet) 675 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset); 676 } 677 678 static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder) 679 { 680 int bpc = 8; 681 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 682 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 683 684 if (!dig || !dig->afmt) 685 return; 686 687 if (encoder->crtc) { 688 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); 689 bpc = radeon_crtc->bpc; 690 } 691 692 if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth) 693 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc); 694 } 695 696 static void radeon_audio_set_audio_packet(struct drm_encoder *encoder) 697 { 698 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 699 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 700 701 if (!dig || !dig->afmt) 702 return; 703 704 if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet) 705 radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset); 706 } 707 708 static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute) 709 { 710 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 711 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 712 713 if (!dig || !dig->afmt) 714 return; 715 716 if (radeon_encoder->audio && radeon_encoder->audio->set_mute) 717 radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute); 718 } 719 720 /* 721 * update the info frames with the data from the current display mode 722 */ 723 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 724 struct drm_display_mode *mode) 725 { 726 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 727 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 728 729 if (!dig || !dig->afmt) 730 return; 731 732 radeon_audio_set_mute(encoder, true); 733 734 radeon_audio_write_speaker_allocation(encoder); 735 radeon_audio_write_sad_regs(encoder); 736 radeon_audio_write_latency_fields(encoder, mode); 737 radeon_audio_set_dto(encoder, mode->clock); 738 radeon_audio_set_vbi_packet(encoder); 739 radeon_hdmi_set_color_depth(encoder); 740 radeon_audio_update_acr(encoder, mode->clock); 741 radeon_audio_set_audio_packet(encoder); 742 radeon_audio_select_pin(encoder); 743 744 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 745 return; 746 747 radeon_audio_set_mute(encoder, false); 748 } 749 750 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 751 struct drm_display_mode *mode) 752 { 753 struct drm_device *dev = encoder->dev; 754 struct radeon_device *rdev = dev->dev_private; 755 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 756 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 757 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 758 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 759 struct radeon_connector_atom_dig *dig_connector = 760 radeon_connector->con_priv; 761 762 if (!dig || !dig->afmt) 763 return; 764 765 radeon_audio_write_speaker_allocation(encoder); 766 radeon_audio_write_sad_regs(encoder); 767 radeon_audio_write_latency_fields(encoder, mode); 768 if (rdev->clock.dp_extclk || ASIC_IS_DCE5(rdev)) 769 radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10); 770 else 771 radeon_audio_set_dto(encoder, dig_connector->dp_clock); 772 radeon_audio_set_audio_packet(encoder); 773 radeon_audio_select_pin(encoder); 774 775 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 776 return; 777 } 778 779 void radeon_audio_mode_set(struct drm_encoder *encoder, 780 struct drm_display_mode *mode) 781 { 782 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 783 784 if (radeon_encoder->audio && radeon_encoder->audio->mode_set) 785 radeon_encoder->audio->mode_set(encoder, mode); 786 } 787 788 void radeon_audio_dpms(struct drm_encoder *encoder, int mode) 789 { 790 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 791 792 if (radeon_encoder->audio && radeon_encoder->audio->dpms) 793 radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON); 794 } 795