1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Slava Grigorev <slava.grigorev@amd.com> 23 */ 24 25 #include <linux/gcd.h> 26 27 #include <drm/drm_crtc.h> 28 #include "dce6_afmt.h" 29 #include "evergreen_hdmi.h" 30 #include "radeon.h" 31 #include "atom.h" 32 #include "r600.h" 33 #include "radeon_audio.h" 34 35 void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 36 u8 enable_mask); 37 struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev); 38 struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev); 39 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 40 struct drm_display_mode *mode); 41 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 42 struct drm_display_mode *mode); 43 44 static const u32 pin_offsets[7] = 45 { 46 (0x5e00 - 0x5e00), 47 (0x5e18 - 0x5e00), 48 (0x5e30 - 0x5e00), 49 (0x5e48 - 0x5e00), 50 (0x5e60 - 0x5e00), 51 (0x5e78 - 0x5e00), 52 (0x5e90 - 0x5e00), 53 }; 54 55 static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 56 { 57 return RREG32(reg); 58 } 59 60 static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset, 61 u32 reg, u32 v) 62 { 63 WREG32(reg, v); 64 } 65 66 static struct radeon_audio_basic_funcs r600_funcs = { 67 .endpoint_rreg = radeon_audio_rreg, 68 .endpoint_wreg = radeon_audio_wreg, 69 .enable = r600_audio_enable, 70 }; 71 72 static struct radeon_audio_basic_funcs dce32_funcs = { 73 .endpoint_rreg = radeon_audio_rreg, 74 .endpoint_wreg = radeon_audio_wreg, 75 .enable = r600_audio_enable, 76 }; 77 78 static struct radeon_audio_basic_funcs dce4_funcs = { 79 .endpoint_rreg = radeon_audio_rreg, 80 .endpoint_wreg = radeon_audio_wreg, 81 .enable = dce4_audio_enable, 82 }; 83 84 static struct radeon_audio_basic_funcs dce6_funcs = { 85 .endpoint_rreg = dce6_endpoint_rreg, 86 .endpoint_wreg = dce6_endpoint_wreg, 87 .enable = dce6_audio_enable, 88 }; 89 90 static struct radeon_audio_funcs r600_hdmi_funcs = { 91 .get_pin = r600_audio_get_pin, 92 .set_dto = r600_hdmi_audio_set_dto, 93 .update_acr = r600_hdmi_update_acr, 94 .set_vbi_packet = r600_set_vbi_packet, 95 .set_avi_packet = r600_set_avi_packet, 96 .set_audio_packet = r600_set_audio_packet, 97 .set_mute = r600_set_mute, 98 .mode_set = radeon_audio_hdmi_mode_set, 99 .dpms = r600_hdmi_enable, 100 }; 101 102 static struct radeon_audio_funcs dce32_hdmi_funcs = { 103 .get_pin = r600_audio_get_pin, 104 .write_sad_regs = dce3_2_afmt_write_sad_regs, 105 .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation, 106 .set_dto = dce3_2_audio_set_dto, 107 .update_acr = dce3_2_hdmi_update_acr, 108 .set_vbi_packet = r600_set_vbi_packet, 109 .set_avi_packet = r600_set_avi_packet, 110 .set_audio_packet = dce3_2_set_audio_packet, 111 .set_mute = dce3_2_set_mute, 112 .mode_set = radeon_audio_hdmi_mode_set, 113 .dpms = r600_hdmi_enable, 114 }; 115 116 static struct radeon_audio_funcs dce32_dp_funcs = { 117 .get_pin = r600_audio_get_pin, 118 .write_sad_regs = dce3_2_afmt_write_sad_regs, 119 .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation, 120 .set_dto = dce3_2_audio_set_dto, 121 .set_avi_packet = r600_set_avi_packet, 122 .set_audio_packet = dce3_2_set_audio_packet, 123 }; 124 125 static struct radeon_audio_funcs dce4_hdmi_funcs = { 126 .get_pin = r600_audio_get_pin, 127 .write_sad_regs = evergreen_hdmi_write_sad_regs, 128 .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation, 129 .write_latency_fields = dce4_afmt_write_latency_fields, 130 .set_dto = dce4_hdmi_audio_set_dto, 131 .update_acr = evergreen_hdmi_update_acr, 132 .set_vbi_packet = dce4_set_vbi_packet, 133 .set_color_depth = dce4_hdmi_set_color_depth, 134 .set_avi_packet = evergreen_set_avi_packet, 135 .set_audio_packet = dce4_set_audio_packet, 136 .set_mute = dce4_set_mute, 137 .mode_set = radeon_audio_hdmi_mode_set, 138 .dpms = evergreen_hdmi_enable, 139 }; 140 141 static struct radeon_audio_funcs dce4_dp_funcs = { 142 .get_pin = r600_audio_get_pin, 143 .write_sad_regs = evergreen_hdmi_write_sad_regs, 144 .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation, 145 .write_latency_fields = dce4_afmt_write_latency_fields, 146 .set_dto = dce4_dp_audio_set_dto, 147 .set_avi_packet = evergreen_set_avi_packet, 148 .set_audio_packet = dce4_set_audio_packet, 149 .mode_set = radeon_audio_dp_mode_set, 150 .dpms = evergreen_dp_enable, 151 }; 152 153 static struct radeon_audio_funcs dce6_hdmi_funcs = { 154 .select_pin = dce6_afmt_select_pin, 155 .get_pin = dce6_audio_get_pin, 156 .write_sad_regs = dce6_afmt_write_sad_regs, 157 .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation, 158 .write_latency_fields = dce6_afmt_write_latency_fields, 159 .set_dto = dce6_hdmi_audio_set_dto, 160 .update_acr = evergreen_hdmi_update_acr, 161 .set_vbi_packet = dce4_set_vbi_packet, 162 .set_color_depth = dce4_hdmi_set_color_depth, 163 .set_avi_packet = evergreen_set_avi_packet, 164 .set_audio_packet = dce4_set_audio_packet, 165 .set_mute = dce4_set_mute, 166 .mode_set = radeon_audio_hdmi_mode_set, 167 .dpms = evergreen_hdmi_enable, 168 }; 169 170 static struct radeon_audio_funcs dce6_dp_funcs = { 171 .select_pin = dce6_afmt_select_pin, 172 .get_pin = dce6_audio_get_pin, 173 .write_sad_regs = dce6_afmt_write_sad_regs, 174 .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation, 175 .write_latency_fields = dce6_afmt_write_latency_fields, 176 .set_dto = dce6_dp_audio_set_dto, 177 .set_avi_packet = evergreen_set_avi_packet, 178 .set_audio_packet = dce4_set_audio_packet, 179 .mode_set = radeon_audio_dp_mode_set, 180 .dpms = evergreen_dp_enable, 181 }; 182 183 static void radeon_audio_enable(struct radeon_device *rdev, 184 struct r600_audio_pin *pin, u8 enable_mask) 185 { 186 struct drm_encoder *encoder; 187 struct radeon_encoder *radeon_encoder; 188 struct radeon_encoder_atom_dig *dig; 189 int pin_count = 0; 190 191 if (!pin) 192 return; 193 194 if (rdev->mode_info.mode_config_initialized) { 195 list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { 196 if (radeon_encoder_is_digital(encoder)) { 197 radeon_encoder = to_radeon_encoder(encoder); 198 dig = radeon_encoder->enc_priv; 199 if (dig->pin == pin) 200 pin_count++; 201 } 202 } 203 204 if ((pin_count > 1) && (enable_mask == 0)) 205 return; 206 } 207 208 if (rdev->audio.funcs->enable) 209 rdev->audio.funcs->enable(rdev, pin, enable_mask); 210 } 211 212 static void radeon_audio_interface_init(struct radeon_device *rdev) 213 { 214 if (ASIC_IS_DCE6(rdev)) { 215 rdev->audio.funcs = &dce6_funcs; 216 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs; 217 rdev->audio.dp_funcs = &dce6_dp_funcs; 218 } else if (ASIC_IS_DCE4(rdev)) { 219 rdev->audio.funcs = &dce4_funcs; 220 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs; 221 rdev->audio.dp_funcs = &dce4_dp_funcs; 222 } else if (ASIC_IS_DCE32(rdev)) { 223 rdev->audio.funcs = &dce32_funcs; 224 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs; 225 rdev->audio.dp_funcs = &dce32_dp_funcs; 226 } else { 227 rdev->audio.funcs = &r600_funcs; 228 rdev->audio.hdmi_funcs = &r600_hdmi_funcs; 229 rdev->audio.dp_funcs = NULL; 230 } 231 } 232 233 static int radeon_audio_chipset_supported(struct radeon_device *rdev) 234 { 235 return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev); 236 } 237 238 int radeon_audio_init(struct radeon_device *rdev) 239 { 240 int i; 241 242 if (!radeon_audio || !radeon_audio_chipset_supported(rdev)) 243 return 0; 244 245 rdev->audio.enabled = true; 246 247 if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */ 248 rdev->audio.num_pins = 3; 249 else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */ 250 rdev->audio.num_pins = 7; 251 else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */ 252 rdev->audio.num_pins = 7; 253 else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */ 254 rdev->audio.num_pins = 2; 255 else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */ 256 rdev->audio.num_pins = 6; 257 else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */ 258 rdev->audio.num_pins = 6; 259 else 260 rdev->audio.num_pins = 1; 261 262 for (i = 0; i < rdev->audio.num_pins; i++) { 263 rdev->audio.pin[i].channels = -1; 264 rdev->audio.pin[i].rate = -1; 265 rdev->audio.pin[i].bits_per_sample = -1; 266 rdev->audio.pin[i].status_bits = 0; 267 rdev->audio.pin[i].category_code = 0; 268 rdev->audio.pin[i].connected = false; 269 rdev->audio.pin[i].offset = pin_offsets[i]; 270 rdev->audio.pin[i].id = i; 271 } 272 273 radeon_audio_interface_init(rdev); 274 275 /* disable audio. it will be set up later */ 276 for (i = 0; i < rdev->audio.num_pins; i++) 277 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); 278 279 return 0; 280 } 281 282 u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 283 { 284 if (rdev->audio.funcs->endpoint_rreg) 285 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg); 286 287 return 0; 288 } 289 290 void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset, 291 u32 reg, u32 v) 292 { 293 if (rdev->audio.funcs->endpoint_wreg) 294 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v); 295 } 296 297 static void radeon_audio_write_sad_regs(struct drm_encoder *encoder) 298 { 299 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 300 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 301 struct cea_sad *sads; 302 int sad_count; 303 304 if (!connector) 305 return; 306 307 sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads); 308 if (sad_count < 0) 309 DRM_ERROR("Couldn't read SADs: %d\n", sad_count); 310 if (sad_count <= 0) 311 return; 312 BUG_ON(!sads); 313 314 if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs) 315 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count); 316 317 kfree(sads); 318 } 319 320 static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder) 321 { 322 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 323 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 324 u8 *sadb = NULL; 325 int sad_count; 326 327 if (!connector) 328 return; 329 330 sad_count = drm_edid_to_speaker_allocation(radeon_connector_edid(connector), 331 &sadb); 332 if (sad_count < 0) { 333 DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n", 334 sad_count); 335 sad_count = 0; 336 } 337 338 if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation) 339 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count); 340 341 kfree(sadb); 342 } 343 344 static void radeon_audio_write_latency_fields(struct drm_encoder *encoder, 345 struct drm_display_mode *mode) 346 { 347 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 348 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 349 350 if (!connector) 351 return; 352 353 if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields) 354 radeon_encoder->audio->write_latency_fields(encoder, connector, mode); 355 } 356 357 struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder) 358 { 359 struct radeon_device *rdev = encoder->dev->dev_private; 360 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 361 362 if (radeon_encoder->audio && radeon_encoder->audio->get_pin) 363 return radeon_encoder->audio->get_pin(rdev); 364 365 return NULL; 366 } 367 368 static void radeon_audio_select_pin(struct drm_encoder *encoder) 369 { 370 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 371 372 if (radeon_encoder->audio && radeon_encoder->audio->select_pin) 373 radeon_encoder->audio->select_pin(encoder); 374 } 375 376 void radeon_audio_detect(struct drm_connector *connector, 377 struct drm_encoder *encoder, 378 enum drm_connector_status status) 379 { 380 struct drm_device *dev = connector->dev; 381 struct radeon_device *rdev = dev->dev_private; 382 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 383 struct radeon_encoder_atom_dig *dig; 384 385 if (!radeon_audio_chipset_supported(rdev)) 386 return; 387 388 if (!radeon_encoder_is_digital(encoder)) 389 return; 390 391 dig = radeon_encoder->enc_priv; 392 393 if (status == connector_status_connected) { 394 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { 395 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 396 397 if (radeon_dp_getsinktype(radeon_connector) == 398 CONNECTOR_OBJECT_ID_DISPLAYPORT) 399 radeon_encoder->audio = rdev->audio.dp_funcs; 400 else 401 radeon_encoder->audio = rdev->audio.hdmi_funcs; 402 } else { 403 radeon_encoder->audio = rdev->audio.hdmi_funcs; 404 } 405 406 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 407 if (!dig->pin) 408 dig->pin = radeon_audio_get_pin(encoder); 409 radeon_audio_enable(rdev, dig->pin, 0xf); 410 } else { 411 radeon_audio_enable(rdev, dig->pin, 0); 412 dig->pin = NULL; 413 } 414 } else { 415 radeon_audio_enable(rdev, dig->pin, 0); 416 dig->pin = NULL; 417 } 418 } 419 420 void radeon_audio_fini(struct radeon_device *rdev) 421 { 422 int i; 423 424 if (!rdev->audio.enabled) 425 return; 426 427 for (i = 0; i < rdev->audio.num_pins; i++) 428 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); 429 430 rdev->audio.enabled = false; 431 } 432 433 static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock) 434 { 435 struct radeon_device *rdev = encoder->dev->dev_private; 436 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 437 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc); 438 439 if (radeon_encoder->audio && radeon_encoder->audio->set_dto) 440 radeon_encoder->audio->set_dto(rdev, crtc, clock); 441 } 442 443 static int radeon_audio_set_avi_packet(struct drm_encoder *encoder, 444 struct drm_display_mode *mode) 445 { 446 struct radeon_device *rdev = encoder->dev->dev_private; 447 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 448 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 449 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 450 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE]; 451 struct hdmi_avi_infoframe frame; 452 int err; 453 454 if (!connector) 455 return -EINVAL; 456 457 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, connector, mode); 458 if (err < 0) { 459 DRM_ERROR("failed to setup AVI infoframe: %d\n", err); 460 return err; 461 } 462 463 if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) { 464 drm_hdmi_avi_infoframe_quant_range(&frame, connector, mode, 465 radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB ? 466 HDMI_QUANTIZATION_RANGE_LIMITED : 467 HDMI_QUANTIZATION_RANGE_FULL); 468 } 469 470 err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer)); 471 if (err < 0) { 472 DRM_ERROR("failed to pack AVI infoframe: %d\n", err); 473 return err; 474 } 475 476 if (dig && dig->afmt && radeon_encoder->audio && 477 radeon_encoder->audio->set_avi_packet) 478 radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset, 479 buffer, sizeof(buffer)); 480 481 return 0; 482 } 483 484 /* 485 * calculate CTS and N values if they are not found in the table 486 */ 487 static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq) 488 { 489 int n, cts; 490 unsigned long div, mul; 491 492 /* Safe, but overly large values */ 493 n = 128 * freq; 494 cts = clock * 1000; 495 496 /* Smallest valid fraction */ 497 div = gcd(n, cts); 498 499 n /= div; 500 cts /= div; 501 502 /* 503 * The optimal N is 128*freq/1000. Calculate the closest larger 504 * value that doesn't truncate any bits. 505 */ 506 mul = ((128*freq/1000) + (n-1))/n; 507 508 n *= mul; 509 cts *= mul; 510 511 /* Check that we are in spec (not always possible) */ 512 if (n < (128*freq/1500)) 513 pr_warn("Calculated ACR N value is too small. You may experience audio problems.\n"); 514 if (n > (128*freq/300)) 515 pr_warn("Calculated ACR N value is too large. You may experience audio problems.\n"); 516 517 *N = n; 518 *CTS = cts; 519 520 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n", 521 *N, *CTS, freq); 522 } 523 524 static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock) 525 { 526 static struct radeon_hdmi_acr res; 527 u8 i; 528 529 static const struct radeon_hdmi_acr hdmi_predefined_acr[] = { 530 /* 32kHz 44.1kHz 48kHz */ 531 /* Clock N CTS N CTS N CTS */ 532 { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */ 533 { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */ 534 { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */ 535 { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */ 536 { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */ 537 { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */ 538 { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */ 539 { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */ 540 { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */ 541 { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */ 542 }; 543 544 /* Precalculated values for common clocks */ 545 for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++) 546 if (hdmi_predefined_acr[i].clock == clock) 547 return &hdmi_predefined_acr[i]; 548 549 /* And odd clocks get manually calculated */ 550 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); 551 radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100); 552 radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000); 553 554 return &res; 555 } 556 557 /* 558 * update the N and CTS parameters for a given pixel clock rate 559 */ 560 static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock) 561 { 562 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock); 563 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 564 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 565 566 if (!dig || !dig->afmt) 567 return; 568 569 if (radeon_encoder->audio && radeon_encoder->audio->update_acr) 570 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr); 571 } 572 573 static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder) 574 { 575 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 576 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 577 578 if (!dig || !dig->afmt) 579 return; 580 581 if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet) 582 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset); 583 } 584 585 static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder) 586 { 587 int bpc = 8; 588 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 589 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 590 591 if (!dig || !dig->afmt) 592 return; 593 594 if (encoder->crtc) { 595 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); 596 bpc = radeon_crtc->bpc; 597 } 598 599 if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth) 600 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc); 601 } 602 603 static void radeon_audio_set_audio_packet(struct drm_encoder *encoder) 604 { 605 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 606 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 607 608 if (!dig || !dig->afmt) 609 return; 610 611 if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet) 612 radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset); 613 } 614 615 static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute) 616 { 617 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 618 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 619 620 if (!dig || !dig->afmt) 621 return; 622 623 if (radeon_encoder->audio && radeon_encoder->audio->set_mute) 624 radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute); 625 } 626 627 /* 628 * update the info frames with the data from the current display mode 629 */ 630 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 631 struct drm_display_mode *mode) 632 { 633 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 634 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 635 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 636 637 if (!dig || !dig->afmt) 638 return; 639 640 if (!connector) 641 return; 642 643 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 644 radeon_audio_set_mute(encoder, true); 645 646 radeon_audio_write_speaker_allocation(encoder); 647 radeon_audio_write_sad_regs(encoder); 648 radeon_audio_write_latency_fields(encoder, mode); 649 radeon_audio_set_dto(encoder, mode->clock); 650 radeon_audio_set_vbi_packet(encoder); 651 radeon_hdmi_set_color_depth(encoder); 652 radeon_audio_update_acr(encoder, mode->clock); 653 radeon_audio_set_audio_packet(encoder); 654 radeon_audio_select_pin(encoder); 655 656 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 657 return; 658 659 radeon_audio_set_mute(encoder, false); 660 } else { 661 radeon_hdmi_set_color_depth(encoder); 662 663 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 664 return; 665 } 666 } 667 668 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 669 struct drm_display_mode *mode) 670 { 671 struct drm_device *dev = encoder->dev; 672 struct radeon_device *rdev = dev->dev_private; 673 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 674 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 675 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 676 677 if (!dig || !dig->afmt) 678 return; 679 680 if (!connector) 681 return; 682 683 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 684 radeon_audio_write_speaker_allocation(encoder); 685 radeon_audio_write_sad_regs(encoder); 686 radeon_audio_write_latency_fields(encoder, mode); 687 radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10); 688 radeon_audio_set_audio_packet(encoder); 689 radeon_audio_select_pin(encoder); 690 691 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 692 return; 693 } 694 } 695 696 void radeon_audio_mode_set(struct drm_encoder *encoder, 697 struct drm_display_mode *mode) 698 { 699 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 700 701 if (radeon_encoder->audio && radeon_encoder->audio->mode_set) 702 radeon_encoder->audio->mode_set(encoder, mode); 703 } 704 705 void radeon_audio_dpms(struct drm_encoder *encoder, int mode) 706 { 707 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 708 709 if (radeon_encoder->audio && radeon_encoder->audio->dpms) 710 radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON); 711 } 712 713 unsigned int radeon_audio_decode_dfs_div(unsigned int div) 714 { 715 if (div >= 8 && div < 64) 716 return (div - 8) * 25 + 200; 717 else if (div >= 64 && div < 96) 718 return (div - 64) * 50 + 1600; 719 else if (div >= 96 && div < 128) 720 return (div - 96) * 100 + 3200; 721 else 722 return 0; 723 } 724