1 /* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Dave Airlie 25 * Alex Deucher 26 * Jerome Glisse 27 */ 28 #ifndef __R300D_H__ 29 #define __R300D_H__ 30 31 #define CP_PACKET0 0x00000000 32 #define PACKET0_BASE_INDEX_SHIFT 0 33 #define PACKET0_BASE_INDEX_MASK (0x1ffff << 0) 34 #define PACKET0_COUNT_SHIFT 16 35 #define PACKET0_COUNT_MASK (0x3fff << 16) 36 #define CP_PACKET1 0x40000000 37 #define CP_PACKET2 0x80000000 38 #define PACKET2_PAD_SHIFT 0 39 #define PACKET2_PAD_MASK (0x3fffffff << 0) 40 #define CP_PACKET3 0xC0000000 41 #define PACKET3_IT_OPCODE_SHIFT 8 42 #define PACKET3_IT_OPCODE_MASK (0xff << 8) 43 #define PACKET3_COUNT_SHIFT 16 44 #define PACKET3_COUNT_MASK (0x3fff << 16) 45 /* PACKET3 op code */ 46 #define PACKET3_NOP 0x10 47 #define PACKET3_3D_DRAW_VBUF 0x28 48 #define PACKET3_3D_DRAW_IMMD 0x29 49 #define PACKET3_3D_DRAW_INDX 0x2A 50 #define PACKET3_3D_LOAD_VBPNTR 0x2F 51 #define PACKET3_3D_CLEAR_ZMASK 0x32 52 #define PACKET3_INDX_BUFFER 0x33 53 #define PACKET3_3D_DRAW_VBUF_2 0x34 54 #define PACKET3_3D_DRAW_IMMD_2 0x35 55 #define PACKET3_3D_DRAW_INDX_2 0x36 56 #define PACKET3_3D_CLEAR_HIZ 0x37 57 #define PACKET3_3D_CLEAR_CMASK 0x38 58 #define PACKET3_BITBLT_MULTI 0x9B 59 60 #define PACKET0(reg, n) (CP_PACKET0 | \ 61 REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) | \ 62 REG_SET(PACKET0_COUNT, (n))) 63 #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) 64 #define PACKET3(op, n) (CP_PACKET3 | \ 65 REG_SET(PACKET3_IT_OPCODE, (op)) | \ 66 REG_SET(PACKET3_COUNT, (n))) 67 68 #define PACKET_TYPE0 0 69 #define PACKET_TYPE1 1 70 #define PACKET_TYPE2 2 71 #define PACKET_TYPE3 3 72 73 #define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3) 74 #define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF) 75 #define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2) 76 #define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1) 77 #define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF) 78 79 /* Registers */ 80 #define R_000148_MC_FB_LOCATION 0x000148 81 #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) 82 #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) 83 #define C_000148_MC_FB_START 0xFFFF0000 84 #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) 85 #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) 86 #define C_000148_MC_FB_TOP 0x0000FFFF 87 #define R_00014C_MC_AGP_LOCATION 0x00014C 88 #define S_00014C_MC_AGP_START(x) (((x) & 0xFFFF) << 0) 89 #define G_00014C_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) 90 #define C_00014C_MC_AGP_START 0xFFFF0000 91 #define S_00014C_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) 92 #define G_00014C_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) 93 #define C_00014C_MC_AGP_TOP 0x0000FFFF 94 #define R_00015C_AGP_BASE_2 0x00015C 95 #define S_00015C_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) 96 #define G_00015C_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) 97 #define C_00015C_AGP_BASE_ADDR_2 0xFFFFFFF0 98 #define R_000170_AGP_BASE 0x000170 99 #define S_000170_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) 100 #define G_000170_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) 101 #define C_000170_AGP_BASE_ADDR 0x00000000 102 #define R_0007C0_CP_STAT 0x0007C0 103 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) 104 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) 105 #define C_0007C0_MRU_BUSY 0xFFFFFFFE 106 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) 107 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) 108 #define C_0007C0_MWU_BUSY 0xFFFFFFFD 109 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) 110 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) 111 #define C_0007C0_RSIU_BUSY 0xFFFFFFFB 112 #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) 113 #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) 114 #define C_0007C0_RCIU_BUSY 0xFFFFFFF7 115 #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) 116 #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) 117 #define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF 118 #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) 119 #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) 120 #define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF 121 #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) 122 #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) 123 #define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF 124 #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) 125 #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) 126 #define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF 127 #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) 128 #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) 129 #define C_0007C0_CSI_BUSY 0xFFFFDFFF 130 #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) 131 #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) 132 #define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF 133 #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) 134 #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) 135 #define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF 136 #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) 137 #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) 138 #define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF 139 #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) 140 #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) 141 #define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF 142 #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) 143 #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) 144 #define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF 145 #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) 146 #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) 147 #define C_0007C0_CP_BUSY 0x7FFFFFFF 148 #define R_000E40_RBBM_STATUS 0x000E40 149 #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) 150 #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) 151 #define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80 152 #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) 153 #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) 154 #define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF 155 #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) 156 #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) 157 #define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF 158 #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) 159 #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) 160 #define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF 161 #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) 162 #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) 163 #define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF 164 #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) 165 #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) 166 #define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF 167 #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) 168 #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) 169 #define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF 170 #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) 171 #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) 172 #define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF 173 #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) 174 #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) 175 #define C_000E40_ENG_EV_BUSY 0xFFFF7FFF 176 #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) 177 #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) 178 #define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF 179 #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) 180 #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) 181 #define C_000E40_E2_BUSY 0xFFFDFFFF 182 #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) 183 #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) 184 #define C_000E40_RB2D_BUSY 0xFFFBFFFF 185 #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) 186 #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) 187 #define C_000E40_RB3D_BUSY 0xFFF7FFFF 188 #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) 189 #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) 190 #define C_000E40_VAP_BUSY 0xFFEFFFFF 191 #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) 192 #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) 193 #define C_000E40_RE_BUSY 0xFFDFFFFF 194 #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) 195 #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) 196 #define C_000E40_TAM_BUSY 0xFFBFFFFF 197 #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) 198 #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) 199 #define C_000E40_TDM_BUSY 0xFF7FFFFF 200 #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) 201 #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) 202 #define C_000E40_PB_BUSY 0xFEFFFFFF 203 #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) 204 #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) 205 #define C_000E40_TIM_BUSY 0xFDFFFFFF 206 #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) 207 #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) 208 #define C_000E40_GA_BUSY 0xFBFFFFFF 209 #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) 210 #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) 211 #define C_000E40_CBA2D_BUSY 0xF7FFFFFF 212 #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) 213 #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) 214 #define C_000E40_GUI_ACTIVE 0x7FFFFFFF 215 #define R_0000F0_RBBM_SOFT_RESET 0x0000F0 216 #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) 217 #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) 218 #define C_0000F0_SOFT_RESET_CP 0xFFFFFFFE 219 #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) 220 #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) 221 #define C_0000F0_SOFT_RESET_HI 0xFFFFFFFD 222 #define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2) 223 #define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1) 224 #define C_0000F0_SOFT_RESET_VAP 0xFFFFFFFB 225 #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) 226 #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) 227 #define C_0000F0_SOFT_RESET_RE 0xFFFFFFF7 228 #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) 229 #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) 230 #define C_0000F0_SOFT_RESET_PP 0xFFFFFFEF 231 #define S_0000F0_SOFT_RESET_E2(x) (((x) & 0x1) << 5) 232 #define G_0000F0_SOFT_RESET_E2(x) (((x) >> 5) & 0x1) 233 #define C_0000F0_SOFT_RESET_E2 0xFFFFFFDF 234 #define S_0000F0_SOFT_RESET_RB(x) (((x) & 0x1) << 6) 235 #define G_0000F0_SOFT_RESET_RB(x) (((x) >> 6) & 0x1) 236 #define C_0000F0_SOFT_RESET_RB 0xFFFFFFBF 237 #define S_0000F0_SOFT_RESET_HDP(x) (((x) & 0x1) << 7) 238 #define G_0000F0_SOFT_RESET_HDP(x) (((x) >> 7) & 0x1) 239 #define C_0000F0_SOFT_RESET_HDP 0xFFFFFF7F 240 #define S_0000F0_SOFT_RESET_MC(x) (((x) & 0x1) << 8) 241 #define G_0000F0_SOFT_RESET_MC(x) (((x) >> 8) & 0x1) 242 #define C_0000F0_SOFT_RESET_MC 0xFFFFFEFF 243 #define S_0000F0_SOFT_RESET_AIC(x) (((x) & 0x1) << 9) 244 #define G_0000F0_SOFT_RESET_AIC(x) (((x) >> 9) & 0x1) 245 #define C_0000F0_SOFT_RESET_AIC 0xFFFFFDFF 246 #define S_0000F0_SOFT_RESET_VIP(x) (((x) & 0x1) << 10) 247 #define G_0000F0_SOFT_RESET_VIP(x) (((x) >> 10) & 0x1) 248 #define C_0000F0_SOFT_RESET_VIP 0xFFFFFBFF 249 #define S_0000F0_SOFT_RESET_DISP(x) (((x) & 0x1) << 11) 250 #define G_0000F0_SOFT_RESET_DISP(x) (((x) >> 11) & 0x1) 251 #define C_0000F0_SOFT_RESET_DISP 0xFFFFF7FF 252 #define S_0000F0_SOFT_RESET_CG(x) (((x) & 0x1) << 12) 253 #define G_0000F0_SOFT_RESET_CG(x) (((x) >> 12) & 0x1) 254 #define C_0000F0_SOFT_RESET_CG 0xFFFFEFFF 255 #define S_0000F0_SOFT_RESET_GA(x) (((x) & 0x1) << 13) 256 #define G_0000F0_SOFT_RESET_GA(x) (((x) >> 13) & 0x1) 257 #define C_0000F0_SOFT_RESET_GA 0xFFFFDFFF 258 #define S_0000F0_SOFT_RESET_IDCT(x) (((x) & 0x1) << 14) 259 #define G_0000F0_SOFT_RESET_IDCT(x) (((x) >> 14) & 0x1) 260 #define C_0000F0_SOFT_RESET_IDCT 0xFFFFBFFF 261 262 #define R_00000D_SCLK_CNTL 0x00000D 263 #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0) 264 #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7) 265 #define C_00000D_SCLK_SRC_SEL 0xFFFFFFF8 266 #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3) 267 #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1) 268 #define C_00000D_CP_MAX_DYN_STOP_LAT 0xFFFFFFF7 269 #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4) 270 #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1) 271 #define C_00000D_HDP_MAX_DYN_STOP_LAT 0xFFFFFFEF 272 #define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5) 273 #define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1) 274 #define C_00000D_TV_MAX_DYN_STOP_LAT 0xFFFFFFDF 275 #define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6) 276 #define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1) 277 #define C_00000D_E2_MAX_DYN_STOP_LAT 0xFFFFFFBF 278 #define S_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 7) 279 #define G_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) >> 7) & 0x1) 280 #define C_00000D_SE_MAX_DYN_STOP_LAT 0xFFFFFF7F 281 #define S_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 8) 282 #define G_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 8) & 0x1) 283 #define C_00000D_IDCT_MAX_DYN_STOP_LAT 0xFFFFFEFF 284 #define S_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 9) 285 #define G_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) >> 9) & 0x1) 286 #define C_00000D_VIP_MAX_DYN_STOP_LAT 0xFFFFFDFF 287 #define S_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 10) 288 #define G_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) >> 10) & 0x1) 289 #define C_00000D_RE_MAX_DYN_STOP_LAT 0xFFFFFBFF 290 #define S_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 11) 291 #define G_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) >> 11) & 0x1) 292 #define C_00000D_PB_MAX_DYN_STOP_LAT 0xFFFFF7FF 293 #define S_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 12) 294 #define G_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) >> 12) & 0x1) 295 #define C_00000D_TAM_MAX_DYN_STOP_LAT 0xFFFFEFFF 296 #define S_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 13) 297 #define G_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) >> 13) & 0x1) 298 #define C_00000D_TDM_MAX_DYN_STOP_LAT 0xFFFFDFFF 299 #define S_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 14) 300 #define G_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) >> 14) & 0x1) 301 #define C_00000D_RB_MAX_DYN_STOP_LAT 0xFFFFBFFF 302 #define S_00000D_FORCE_DISP2(x) (((x) & 0x1) << 15) 303 #define G_00000D_FORCE_DISP2(x) (((x) >> 15) & 0x1) 304 #define C_00000D_FORCE_DISP2 0xFFFF7FFF 305 #define S_00000D_FORCE_CP(x) (((x) & 0x1) << 16) 306 #define G_00000D_FORCE_CP(x) (((x) >> 16) & 0x1) 307 #define C_00000D_FORCE_CP 0xFFFEFFFF 308 #define S_00000D_FORCE_HDP(x) (((x) & 0x1) << 17) 309 #define G_00000D_FORCE_HDP(x) (((x) >> 17) & 0x1) 310 #define C_00000D_FORCE_HDP 0xFFFDFFFF 311 #define S_00000D_FORCE_DISP1(x) (((x) & 0x1) << 18) 312 #define G_00000D_FORCE_DISP1(x) (((x) >> 18) & 0x1) 313 #define C_00000D_FORCE_DISP1 0xFFFBFFFF 314 #define S_00000D_FORCE_TOP(x) (((x) & 0x1) << 19) 315 #define G_00000D_FORCE_TOP(x) (((x) >> 19) & 0x1) 316 #define C_00000D_FORCE_TOP 0xFFF7FFFF 317 #define S_00000D_FORCE_E2(x) (((x) & 0x1) << 20) 318 #define G_00000D_FORCE_E2(x) (((x) >> 20) & 0x1) 319 #define C_00000D_FORCE_E2 0xFFEFFFFF 320 #define S_00000D_FORCE_SE(x) (((x) & 0x1) << 21) 321 #define G_00000D_FORCE_SE(x) (((x) >> 21) & 0x1) 322 #define C_00000D_FORCE_SE 0xFFDFFFFF 323 #define S_00000D_FORCE_IDCT(x) (((x) & 0x1) << 22) 324 #define G_00000D_FORCE_IDCT(x) (((x) >> 22) & 0x1) 325 #define C_00000D_FORCE_IDCT 0xFFBFFFFF 326 #define S_00000D_FORCE_VIP(x) (((x) & 0x1) << 23) 327 #define G_00000D_FORCE_VIP(x) (((x) >> 23) & 0x1) 328 #define C_00000D_FORCE_VIP 0xFF7FFFFF 329 #define S_00000D_FORCE_RE(x) (((x) & 0x1) << 24) 330 #define G_00000D_FORCE_RE(x) (((x) >> 24) & 0x1) 331 #define C_00000D_FORCE_RE 0xFEFFFFFF 332 #define S_00000D_FORCE_PB(x) (((x) & 0x1) << 25) 333 #define G_00000D_FORCE_PB(x) (((x) >> 25) & 0x1) 334 #define C_00000D_FORCE_PB 0xFDFFFFFF 335 #define S_00000D_FORCE_TAM(x) (((x) & 0x1) << 26) 336 #define G_00000D_FORCE_TAM(x) (((x) >> 26) & 0x1) 337 #define C_00000D_FORCE_TAM 0xFBFFFFFF 338 #define S_00000D_FORCE_TDM(x) (((x) & 0x1) << 27) 339 #define G_00000D_FORCE_TDM(x) (((x) >> 27) & 0x1) 340 #define C_00000D_FORCE_TDM 0xF7FFFFFF 341 #define S_00000D_FORCE_RB(x) (((x) & 0x1) << 28) 342 #define G_00000D_FORCE_RB(x) (((x) >> 28) & 0x1) 343 #define C_00000D_FORCE_RB 0xEFFFFFFF 344 #define S_00000D_FORCE_TV_SCLK(x) (((x) & 0x1) << 29) 345 #define G_00000D_FORCE_TV_SCLK(x) (((x) >> 29) & 0x1) 346 #define C_00000D_FORCE_TV_SCLK 0xDFFFFFFF 347 #define S_00000D_FORCE_SUBPIC(x) (((x) & 0x1) << 30) 348 #define G_00000D_FORCE_SUBPIC(x) (((x) >> 30) & 0x1) 349 #define C_00000D_FORCE_SUBPIC 0xBFFFFFFF 350 #define S_00000D_FORCE_OV0(x) (((x) & 0x1) << 31) 351 #define G_00000D_FORCE_OV0(x) (((x) >> 31) & 0x1) 352 #define C_00000D_FORCE_OV0 0x7FFFFFFF 353 354 #endif 355