1 /*
2  * Copyright 2011 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Alex Deucher
23  *
24  */
25 #include <drm/drmP.h>
26 #include <drm/radeon_drm.h>
27 #include "radeon.h"
28 #include "atom.h"
29 
30 #define TARGET_HW_I2C_CLOCK 50
31 
32 /* these are a limitation of ProcessI2cChannelTransaction not the hw */
33 #define ATOM_MAX_HW_I2C_WRITE 3
34 #define ATOM_MAX_HW_I2C_READ  255
35 
36 static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
37 				 u8 slave_addr, u8 flags,
38 				 u8 *buf, int num)
39 {
40 	struct drm_device *dev = chan->dev;
41 	struct radeon_device *rdev = dev->dev_private;
42 	PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
43 	int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
44 	unsigned char *base;
45 	u16 out = cpu_to_le16(0);
46 	int r = 0;
47 
48 	memset(&args, 0, sizeof(args));
49 
50 	mutex_lock(&chan->mutex);
51 	mutex_lock(&rdev->mode_info.atom_context->scratch_mutex);
52 
53 	base = (unsigned char *)rdev->mode_info.atom_context->scratch;
54 
55 	if (flags & HW_I2C_WRITE) {
56 		if (num > ATOM_MAX_HW_I2C_WRITE) {
57 			DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
58 			r = -EINVAL;
59 			goto done;
60 		}
61 		if (buf == NULL)
62 			args.ucRegIndex = 0;
63 		else
64 			args.ucRegIndex = buf[0];
65 		if (num)
66 			num--;
67 		if (num)
68 			memcpy(&out, &buf[1], num);
69 		args.lpI2CDataOut = cpu_to_le16(out);
70 	} else {
71 		if (num > ATOM_MAX_HW_I2C_READ) {
72 			DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num);
73 			r = -EINVAL;
74 			goto done;
75 		}
76 		args.ucRegIndex = 0;
77 		args.lpI2CDataOut = 0;
78 	}
79 
80 	args.ucFlag = flags;
81 	args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
82 	args.ucTransBytes = num;
83 	args.ucSlaveAddr = slave_addr << 1;
84 	args.ucLineNumber = chan->rec.i2c_id;
85 
86 	atom_execute_table_scratch_unlocked(rdev->mode_info.atom_context, index, (uint32_t *)&args);
87 
88 	/* error */
89 	if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
90 		DRM_DEBUG_KMS("hw_i2c error\n");
91 		r = -EIO;
92 		goto done;
93 	}
94 
95 	if (!(flags & HW_I2C_WRITE))
96 		radeon_atom_copy_swap(buf, base, num, false);
97 
98 done:
99 	mutex_unlock(&rdev->mode_info.atom_context->scratch_mutex);
100 	mutex_unlock(&chan->mutex);
101 
102 	return r;
103 }
104 
105 int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
106 			    struct i2c_msg *msgs, int num)
107 {
108 	struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
109 	struct i2c_msg *p;
110 	int i, remaining, current_count, buffer_offset, max_bytes, ret;
111 	u8 flags;
112 
113 	/* check for bus probe */
114 	p = &msgs[0];
115 	if ((num == 1) && (p->len == 0)) {
116 		ret = radeon_process_i2c_ch(i2c,
117 					    p->addr, HW_I2C_WRITE,
118 					    NULL, 0);
119 		if (ret)
120 			return ret;
121 		else
122 			return num;
123 	}
124 
125 	for (i = 0; i < num; i++) {
126 		p = &msgs[i];
127 		remaining = p->len;
128 		buffer_offset = 0;
129 		/* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
130 		if (p->flags & I2C_M_RD) {
131 			max_bytes = ATOM_MAX_HW_I2C_READ;
132 			flags = HW_I2C_READ;
133 		} else {
134 			max_bytes = ATOM_MAX_HW_I2C_WRITE;
135 			flags = HW_I2C_WRITE;
136 		}
137 		while (remaining) {
138 			if (remaining > max_bytes)
139 				current_count = max_bytes;
140 			else
141 				current_count = remaining;
142 			ret = radeon_process_i2c_ch(i2c,
143 						    p->addr, flags,
144 						    &p->buf[buffer_offset], current_count);
145 			if (ret)
146 				return ret;
147 			remaining -= current_count;
148 			buffer_offset += current_count;
149 		}
150 	}
151 
152 	return num;
153 }
154 
155 u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
156 {
157 	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
158 }
159 
160