1 /*
2  * Copyright 2011 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Alex Deucher
23  *
24  */
25 #include <drm/drmP.h>
26 #include <drm/radeon_drm.h>
27 #include "radeon.h"
28 #include "atom.h"
29 
30 extern void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
31 
32 #define TARGET_HW_I2C_CLOCK 50
33 
34 /* these are a limitation of ProcessI2cChannelTransaction not the hw */
35 #define ATOM_MAX_HW_I2C_WRITE 3
36 #define ATOM_MAX_HW_I2C_READ  255
37 
38 static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
39 				 u8 slave_addr, u8 flags,
40 				 u8 *buf, u8 num)
41 {
42 	struct drm_device *dev = chan->dev;
43 	struct radeon_device *rdev = dev->dev_private;
44 	PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
45 	int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
46 	unsigned char *base;
47 	u16 out;
48 
49 	memset(&args, 0, sizeof(args));
50 
51 	base = (unsigned char *)rdev->mode_info.atom_context->scratch;
52 
53 	if (flags & HW_I2C_WRITE) {
54 		if (num > ATOM_MAX_HW_I2C_WRITE) {
55 			DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
56 			return -EINVAL;
57 		}
58 		args.ucRegIndex = buf[0];
59 		if (num > 1) {
60 			num--;
61 			memcpy(&out, &buf[1], num);
62 		}
63 		args.lpI2CDataOut = cpu_to_le16(out);
64 	} else {
65 		if (num > ATOM_MAX_HW_I2C_READ) {
66 			DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num);
67 			return -EINVAL;
68 		}
69 		args.ucRegIndex = 0;
70 		args.lpI2CDataOut = 0;
71 	}
72 
73 	args.ucFlag = flags;
74 	args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
75 	args.ucTransBytes = num;
76 	args.ucSlaveAddr = slave_addr << 1;
77 	args.ucLineNumber = chan->rec.i2c_id;
78 
79 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
80 
81 	/* error */
82 	if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
83 		DRM_DEBUG_KMS("hw_i2c error\n");
84 		return -EIO;
85 	}
86 
87 	if (!(flags & HW_I2C_WRITE))
88 		radeon_atom_copy_swap(buf, base, num, false);
89 
90 	return 0;
91 }
92 
93 int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
94 			    struct i2c_msg *msgs, int num)
95 {
96 	struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
97 	struct i2c_msg *p;
98 	int i, remaining, current_count, buffer_offset, max_bytes, ret;
99 	u8 buf = 0, flags;
100 
101 	/* check for bus probe */
102 	p = &msgs[0];
103 	if ((num == 1) && (p->len == 0)) {
104 		ret = radeon_process_i2c_ch(i2c,
105 					    p->addr, HW_I2C_WRITE,
106 					    &buf, 1);
107 		if (ret)
108 			return ret;
109 		else
110 			return num;
111 	}
112 
113 	for (i = 0; i < num; i++) {
114 		p = &msgs[i];
115 		remaining = p->len;
116 		buffer_offset = 0;
117 		/* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
118 		if (p->flags & I2C_M_RD) {
119 			max_bytes = ATOM_MAX_HW_I2C_READ;
120 			flags = HW_I2C_READ;
121 		} else {
122 			max_bytes = ATOM_MAX_HW_I2C_WRITE;
123 			flags = HW_I2C_WRITE;
124 		}
125 		while (remaining) {
126 			if (remaining > max_bytes)
127 				current_count = max_bytes;
128 			else
129 				current_count = remaining;
130 			ret = radeon_process_i2c_ch(i2c,
131 						    p->addr, flags,
132 						    &p->buf[buffer_offset], current_count);
133 			if (ret)
134 				return ret;
135 			remaining -= current_count;
136 			buffer_offset += current_count;
137 		}
138 	}
139 
140 	return num;
141 }
142 
143 u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
144 {
145 	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
146 }
147 
148