1 /* 2 * Copyright 2013 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Dave Airlie 23 * Alon Levy 24 */ 25 26 /* QXL cmd/ring handling */ 27 28 #include <drm/drm_util.h> 29 30 #include "qxl_drv.h" 31 #include "qxl_object.h" 32 33 static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap); 34 35 struct ring { 36 struct qxl_ring_header header; 37 uint8_t elements[0]; 38 }; 39 40 struct qxl_ring { 41 struct ring *ring; 42 int element_size; 43 int n_elements; 44 int prod_notify; 45 wait_queue_head_t *push_event; 46 spinlock_t lock; 47 }; 48 49 void qxl_ring_free(struct qxl_ring *ring) 50 { 51 kfree(ring); 52 } 53 54 void qxl_ring_init_hdr(struct qxl_ring *ring) 55 { 56 ring->ring->header.notify_on_prod = ring->n_elements; 57 } 58 59 struct qxl_ring * 60 qxl_ring_create(struct qxl_ring_header *header, 61 int element_size, 62 int n_elements, 63 int prod_notify, 64 bool set_prod_notify, 65 wait_queue_head_t *push_event) 66 { 67 struct qxl_ring *ring; 68 69 ring = kmalloc(sizeof(*ring), GFP_KERNEL); 70 if (!ring) 71 return NULL; 72 73 ring->ring = (struct ring *)header; 74 ring->element_size = element_size; 75 ring->n_elements = n_elements; 76 ring->prod_notify = prod_notify; 77 ring->push_event = push_event; 78 if (set_prod_notify) 79 qxl_ring_init_hdr(ring); 80 spin_lock_init(&ring->lock); 81 return ring; 82 } 83 84 static int qxl_check_header(struct qxl_ring *ring) 85 { 86 int ret; 87 struct qxl_ring_header *header = &(ring->ring->header); 88 unsigned long flags; 89 90 spin_lock_irqsave(&ring->lock, flags); 91 ret = header->prod - header->cons < header->num_items; 92 if (ret == 0) 93 header->notify_on_cons = header->cons + 1; 94 spin_unlock_irqrestore(&ring->lock, flags); 95 return ret; 96 } 97 98 int qxl_check_idle(struct qxl_ring *ring) 99 { 100 int ret; 101 struct qxl_ring_header *header = &(ring->ring->header); 102 unsigned long flags; 103 104 spin_lock_irqsave(&ring->lock, flags); 105 ret = header->prod == header->cons; 106 spin_unlock_irqrestore(&ring->lock, flags); 107 return ret; 108 } 109 110 int qxl_ring_push(struct qxl_ring *ring, 111 const void *new_elt, bool interruptible) 112 { 113 struct qxl_ring_header *header = &(ring->ring->header); 114 uint8_t *elt; 115 int idx, ret; 116 unsigned long flags; 117 118 spin_lock_irqsave(&ring->lock, flags); 119 if (header->prod - header->cons == header->num_items) { 120 header->notify_on_cons = header->cons + 1; 121 mb(); 122 spin_unlock_irqrestore(&ring->lock, flags); 123 if (!drm_can_sleep()) { 124 while (!qxl_check_header(ring)) 125 udelay(1); 126 } else { 127 if (interruptible) { 128 ret = wait_event_interruptible(*ring->push_event, 129 qxl_check_header(ring)); 130 if (ret) 131 return ret; 132 } else { 133 wait_event(*ring->push_event, 134 qxl_check_header(ring)); 135 } 136 137 } 138 spin_lock_irqsave(&ring->lock, flags); 139 } 140 141 idx = header->prod & (ring->n_elements - 1); 142 elt = ring->ring->elements + idx * ring->element_size; 143 144 memcpy((void *)elt, new_elt, ring->element_size); 145 146 header->prod++; 147 148 mb(); 149 150 if (header->prod == header->notify_on_prod) 151 outb(0, ring->prod_notify); 152 153 spin_unlock_irqrestore(&ring->lock, flags); 154 return 0; 155 } 156 157 static bool qxl_ring_pop(struct qxl_ring *ring, 158 void *element) 159 { 160 volatile struct qxl_ring_header *header = &(ring->ring->header); 161 volatile uint8_t *ring_elt; 162 int idx; 163 unsigned long flags; 164 165 spin_lock_irqsave(&ring->lock, flags); 166 if (header->cons == header->prod) { 167 header->notify_on_prod = header->cons + 1; 168 spin_unlock_irqrestore(&ring->lock, flags); 169 return false; 170 } 171 172 idx = header->cons & (ring->n_elements - 1); 173 ring_elt = ring->ring->elements + idx * ring->element_size; 174 175 memcpy(element, (void *)ring_elt, ring->element_size); 176 177 header->cons++; 178 179 spin_unlock_irqrestore(&ring->lock, flags); 180 return true; 181 } 182 183 int 184 qxl_push_command_ring_release(struct qxl_device *qdev, struct qxl_release *release, 185 uint32_t type, bool interruptible) 186 { 187 struct qxl_command cmd; 188 189 cmd.type = type; 190 cmd.data = qxl_bo_physical_address(qdev, release->release_bo, release->release_offset); 191 192 return qxl_ring_push(qdev->command_ring, &cmd, interruptible); 193 } 194 195 int 196 qxl_push_cursor_ring_release(struct qxl_device *qdev, struct qxl_release *release, 197 uint32_t type, bool interruptible) 198 { 199 struct qxl_command cmd; 200 201 cmd.type = type; 202 cmd.data = qxl_bo_physical_address(qdev, release->release_bo, release->release_offset); 203 204 return qxl_ring_push(qdev->cursor_ring, &cmd, interruptible); 205 } 206 207 bool qxl_queue_garbage_collect(struct qxl_device *qdev, bool flush) 208 { 209 if (!qxl_check_idle(qdev->release_ring)) { 210 schedule_work(&qdev->gc_work); 211 if (flush) 212 flush_work(&qdev->gc_work); 213 return true; 214 } 215 return false; 216 } 217 218 int qxl_garbage_collect(struct qxl_device *qdev) 219 { 220 struct qxl_release *release; 221 uint64_t id, next_id; 222 int i = 0; 223 union qxl_release_info *info; 224 225 while (qxl_ring_pop(qdev->release_ring, &id)) { 226 DRM_DEBUG_DRIVER("popped %lld\n", id); 227 while (id) { 228 release = qxl_release_from_id_locked(qdev, id); 229 if (release == NULL) 230 break; 231 232 info = qxl_release_map(qdev, release); 233 next_id = info->next; 234 qxl_release_unmap(qdev, release, info); 235 236 DRM_DEBUG_DRIVER("popped %lld, next %lld\n", id, 237 next_id); 238 239 switch (release->type) { 240 case QXL_RELEASE_DRAWABLE: 241 case QXL_RELEASE_SURFACE_CMD: 242 case QXL_RELEASE_CURSOR_CMD: 243 break; 244 default: 245 DRM_ERROR("unexpected release type\n"); 246 break; 247 } 248 id = next_id; 249 250 qxl_release_free(qdev, release); 251 ++i; 252 } 253 } 254 255 DRM_DEBUG_DRIVER("%d\n", i); 256 257 return i; 258 } 259 260 int qxl_alloc_bo_reserved(struct qxl_device *qdev, 261 struct qxl_release *release, 262 unsigned long size, 263 struct qxl_bo **_bo) 264 { 265 struct qxl_bo *bo; 266 int ret; 267 268 ret = qxl_bo_create(qdev, size, false /* not kernel - device */, 269 false, QXL_GEM_DOMAIN_VRAM, NULL, &bo); 270 if (ret) { 271 DRM_ERROR("failed to allocate VRAM BO\n"); 272 return ret; 273 } 274 ret = qxl_release_list_add(release, bo); 275 if (ret) 276 goto out_unref; 277 278 *_bo = bo; 279 return 0; 280 out_unref: 281 qxl_bo_unref(&bo); 282 return ret; 283 } 284 285 static int wait_for_io_cmd_user(struct qxl_device *qdev, uint8_t val, long port, bool intr) 286 { 287 int irq_num; 288 long addr = qdev->io_base + port; 289 int ret; 290 291 mutex_lock(&qdev->async_io_mutex); 292 irq_num = atomic_read(&qdev->irq_received_io_cmd); 293 if (qdev->last_sent_io_cmd > irq_num) { 294 if (intr) 295 ret = wait_event_interruptible_timeout(qdev->io_cmd_event, 296 atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ); 297 else 298 ret = wait_event_timeout(qdev->io_cmd_event, 299 atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ); 300 /* 0 is timeout, just bail the "hw" has gone away */ 301 if (ret <= 0) 302 goto out; 303 irq_num = atomic_read(&qdev->irq_received_io_cmd); 304 } 305 outb(val, addr); 306 qdev->last_sent_io_cmd = irq_num + 1; 307 if (intr) 308 ret = wait_event_interruptible_timeout(qdev->io_cmd_event, 309 atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ); 310 else 311 ret = wait_event_timeout(qdev->io_cmd_event, 312 atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ); 313 out: 314 if (ret > 0) 315 ret = 0; 316 mutex_unlock(&qdev->async_io_mutex); 317 return ret; 318 } 319 320 static void wait_for_io_cmd(struct qxl_device *qdev, uint8_t val, long port) 321 { 322 int ret; 323 324 restart: 325 ret = wait_for_io_cmd_user(qdev, val, port, false); 326 if (ret == -ERESTARTSYS) 327 goto restart; 328 } 329 330 int qxl_io_update_area(struct qxl_device *qdev, struct qxl_bo *surf, 331 const struct qxl_rect *area) 332 { 333 int surface_id; 334 uint32_t surface_width, surface_height; 335 int ret; 336 337 if (!surf->hw_surf_alloc) 338 DRM_ERROR("got io update area with no hw surface\n"); 339 340 if (surf->is_primary) 341 surface_id = 0; 342 else 343 surface_id = surf->surface_id; 344 surface_width = surf->surf.width; 345 surface_height = surf->surf.height; 346 347 if (area->left < 0 || area->top < 0 || 348 area->right > surface_width || area->bottom > surface_height) 349 return -EINVAL; 350 351 mutex_lock(&qdev->update_area_mutex); 352 qdev->ram_header->update_area = *area; 353 qdev->ram_header->update_surface = surface_id; 354 ret = wait_for_io_cmd_user(qdev, 0, QXL_IO_UPDATE_AREA_ASYNC, true); 355 mutex_unlock(&qdev->update_area_mutex); 356 return ret; 357 } 358 359 void qxl_io_notify_oom(struct qxl_device *qdev) 360 { 361 outb(0, qdev->io_base + QXL_IO_NOTIFY_OOM); 362 } 363 364 void qxl_io_flush_release(struct qxl_device *qdev) 365 { 366 outb(0, qdev->io_base + QXL_IO_FLUSH_RELEASE); 367 } 368 369 void qxl_io_flush_surfaces(struct qxl_device *qdev) 370 { 371 wait_for_io_cmd(qdev, 0, QXL_IO_FLUSH_SURFACES_ASYNC); 372 } 373 374 void qxl_io_destroy_primary(struct qxl_device *qdev) 375 { 376 wait_for_io_cmd(qdev, 0, QXL_IO_DESTROY_PRIMARY_ASYNC); 377 qdev->primary_created = false; 378 } 379 380 void qxl_io_create_primary(struct qxl_device *qdev, 381 unsigned int offset, struct qxl_bo *bo) 382 { 383 struct qxl_surface_create *create; 384 385 DRM_DEBUG_DRIVER("qdev %p, ram_header %p\n", qdev, qdev->ram_header); 386 create = &qdev->ram_header->create_surface; 387 create->format = bo->surf.format; 388 create->width = bo->surf.width; 389 create->height = bo->surf.height; 390 create->stride = bo->surf.stride; 391 if (bo->shadow) { 392 create->mem = qxl_bo_physical_address(qdev, bo->shadow, offset); 393 } else { 394 create->mem = qxl_bo_physical_address(qdev, bo, offset); 395 } 396 397 DRM_DEBUG_DRIVER("mem = %llx, from %p\n", create->mem, bo->kptr); 398 399 create->flags = QXL_SURF_FLAG_KEEP_DATA; 400 create->type = QXL_SURF_TYPE_PRIMARY; 401 402 wait_for_io_cmd(qdev, 0, QXL_IO_CREATE_PRIMARY_ASYNC); 403 qdev->primary_created = true; 404 } 405 406 void qxl_io_memslot_add(struct qxl_device *qdev, uint8_t id) 407 { 408 DRM_DEBUG_DRIVER("qxl_memslot_add %d\n", id); 409 wait_for_io_cmd(qdev, id, QXL_IO_MEMSLOT_ADD_ASYNC); 410 } 411 412 void qxl_io_reset(struct qxl_device *qdev) 413 { 414 outb(0, qdev->io_base + QXL_IO_RESET); 415 } 416 417 void qxl_io_monitors_config(struct qxl_device *qdev) 418 { 419 wait_for_io_cmd(qdev, 0, QXL_IO_MONITORS_CONFIG_ASYNC); 420 } 421 422 int qxl_surface_id_alloc(struct qxl_device *qdev, 423 struct qxl_bo *surf) 424 { 425 uint32_t handle; 426 int idr_ret; 427 int count = 0; 428 again: 429 idr_preload(GFP_ATOMIC); 430 spin_lock(&qdev->surf_id_idr_lock); 431 idr_ret = idr_alloc(&qdev->surf_id_idr, NULL, 1, 0, GFP_NOWAIT); 432 spin_unlock(&qdev->surf_id_idr_lock); 433 idr_preload_end(); 434 if (idr_ret < 0) 435 return idr_ret; 436 handle = idr_ret; 437 438 if (handle >= qdev->rom->n_surfaces) { 439 count++; 440 spin_lock(&qdev->surf_id_idr_lock); 441 idr_remove(&qdev->surf_id_idr, handle); 442 spin_unlock(&qdev->surf_id_idr_lock); 443 qxl_reap_surface_id(qdev, 2); 444 goto again; 445 } 446 surf->surface_id = handle; 447 448 spin_lock(&qdev->surf_id_idr_lock); 449 qdev->last_alloced_surf_id = handle; 450 spin_unlock(&qdev->surf_id_idr_lock); 451 return 0; 452 } 453 454 void qxl_surface_id_dealloc(struct qxl_device *qdev, 455 uint32_t surface_id) 456 { 457 spin_lock(&qdev->surf_id_idr_lock); 458 idr_remove(&qdev->surf_id_idr, surface_id); 459 spin_unlock(&qdev->surf_id_idr_lock); 460 } 461 462 int qxl_hw_surface_alloc(struct qxl_device *qdev, 463 struct qxl_bo *surf, 464 struct ttm_mem_reg *new_mem) 465 { 466 struct qxl_surface_cmd *cmd; 467 struct qxl_release *release; 468 int ret; 469 470 if (surf->hw_surf_alloc) 471 return 0; 472 473 ret = qxl_alloc_surface_release_reserved(qdev, QXL_SURFACE_CMD_CREATE, 474 NULL, 475 &release); 476 if (ret) 477 return ret; 478 479 ret = qxl_release_reserve_list(release, true); 480 if (ret) 481 return ret; 482 483 cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release); 484 cmd->type = QXL_SURFACE_CMD_CREATE; 485 cmd->flags = QXL_SURF_FLAG_KEEP_DATA; 486 cmd->u.surface_create.format = surf->surf.format; 487 cmd->u.surface_create.width = surf->surf.width; 488 cmd->u.surface_create.height = surf->surf.height; 489 cmd->u.surface_create.stride = surf->surf.stride; 490 if (new_mem) { 491 int slot_id = surf->type == QXL_GEM_DOMAIN_VRAM ? qdev->main_mem_slot : qdev->surfaces_mem_slot; 492 struct qxl_memslot *slot = &(qdev->mem_slots[slot_id]); 493 494 /* TODO - need to hold one of the locks to read tbo.offset */ 495 cmd->u.surface_create.data = slot->high_bits; 496 497 cmd->u.surface_create.data |= (new_mem->start << PAGE_SHIFT) + surf->tbo.bdev->man[new_mem->mem_type].gpu_offset; 498 } else 499 cmd->u.surface_create.data = qxl_bo_physical_address(qdev, surf, 0); 500 cmd->surface_id = surf->surface_id; 501 qxl_release_unmap(qdev, release, &cmd->release_info); 502 503 surf->surf_create = release; 504 505 /* no need to add a release to the fence for this surface bo, 506 since it is only released when we ask to destroy the surface 507 and it would never signal otherwise */ 508 qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false); 509 qxl_release_fence_buffer_objects(release); 510 511 surf->hw_surf_alloc = true; 512 spin_lock(&qdev->surf_id_idr_lock); 513 idr_replace(&qdev->surf_id_idr, surf, surf->surface_id); 514 spin_unlock(&qdev->surf_id_idr_lock); 515 return 0; 516 } 517 518 int qxl_hw_surface_dealloc(struct qxl_device *qdev, 519 struct qxl_bo *surf) 520 { 521 struct qxl_surface_cmd *cmd; 522 struct qxl_release *release; 523 int ret; 524 int id; 525 526 if (!surf->hw_surf_alloc) 527 return 0; 528 529 ret = qxl_alloc_surface_release_reserved(qdev, QXL_SURFACE_CMD_DESTROY, 530 surf->surf_create, 531 &release); 532 if (ret) 533 return ret; 534 535 surf->surf_create = NULL; 536 /* remove the surface from the idr, but not the surface id yet */ 537 spin_lock(&qdev->surf_id_idr_lock); 538 idr_replace(&qdev->surf_id_idr, NULL, surf->surface_id); 539 spin_unlock(&qdev->surf_id_idr_lock); 540 surf->hw_surf_alloc = false; 541 542 id = surf->surface_id; 543 surf->surface_id = 0; 544 545 release->surface_release_id = id; 546 cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release); 547 cmd->type = QXL_SURFACE_CMD_DESTROY; 548 cmd->surface_id = id; 549 qxl_release_unmap(qdev, release, &cmd->release_info); 550 551 qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false); 552 553 qxl_release_fence_buffer_objects(release); 554 555 return 0; 556 } 557 558 static int qxl_update_surface(struct qxl_device *qdev, struct qxl_bo *surf) 559 { 560 struct qxl_rect rect; 561 int ret; 562 563 /* if we are evicting, we need to make sure the surface is up 564 to date */ 565 rect.left = 0; 566 rect.right = surf->surf.width; 567 rect.top = 0; 568 rect.bottom = surf->surf.height; 569 retry: 570 ret = qxl_io_update_area(qdev, surf, &rect); 571 if (ret == -ERESTARTSYS) 572 goto retry; 573 return ret; 574 } 575 576 static void qxl_surface_evict_locked(struct qxl_device *qdev, struct qxl_bo *surf, bool do_update_area) 577 { 578 /* no need to update area if we are just freeing the surface normally */ 579 if (do_update_area) 580 qxl_update_surface(qdev, surf); 581 582 /* nuke the surface id at the hw */ 583 qxl_hw_surface_dealloc(qdev, surf); 584 } 585 586 void qxl_surface_evict(struct qxl_device *qdev, struct qxl_bo *surf, bool do_update_area) 587 { 588 mutex_lock(&qdev->surf_evict_mutex); 589 qxl_surface_evict_locked(qdev, surf, do_update_area); 590 mutex_unlock(&qdev->surf_evict_mutex); 591 } 592 593 static int qxl_reap_surf(struct qxl_device *qdev, struct qxl_bo *surf, bool stall) 594 { 595 int ret; 596 597 ret = qxl_bo_reserve(surf, false); 598 if (ret) 599 return ret; 600 601 if (stall) 602 mutex_unlock(&qdev->surf_evict_mutex); 603 604 ret = ttm_bo_wait(&surf->tbo, true, !stall); 605 606 if (stall) 607 mutex_lock(&qdev->surf_evict_mutex); 608 if (ret) { 609 qxl_bo_unreserve(surf); 610 return ret; 611 } 612 613 qxl_surface_evict_locked(qdev, surf, true); 614 qxl_bo_unreserve(surf); 615 return 0; 616 } 617 618 static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap) 619 { 620 int num_reaped = 0; 621 int i, ret; 622 bool stall = false; 623 int start = 0; 624 625 mutex_lock(&qdev->surf_evict_mutex); 626 again: 627 628 spin_lock(&qdev->surf_id_idr_lock); 629 start = qdev->last_alloced_surf_id + 1; 630 spin_unlock(&qdev->surf_id_idr_lock); 631 632 for (i = start; i < start + qdev->rom->n_surfaces; i++) { 633 void *objptr; 634 int surfid = i % qdev->rom->n_surfaces; 635 636 /* this avoids the case where the objects is in the 637 idr but has been evicted half way - its makes 638 the idr lookup atomic with the eviction */ 639 spin_lock(&qdev->surf_id_idr_lock); 640 objptr = idr_find(&qdev->surf_id_idr, surfid); 641 spin_unlock(&qdev->surf_id_idr_lock); 642 643 if (!objptr) 644 continue; 645 646 ret = qxl_reap_surf(qdev, objptr, stall); 647 if (ret == 0) 648 num_reaped++; 649 if (num_reaped >= max_to_reap) 650 break; 651 } 652 if (num_reaped == 0 && stall == false) { 653 stall = true; 654 goto again; 655 } 656 657 mutex_unlock(&qdev->surf_evict_mutex); 658 if (num_reaped) { 659 usleep_range(500, 1000); 660 qxl_queue_garbage_collect(qdev, true); 661 } 662 663 return 0; 664 } 665