1e559355aSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2bed41005STom Cooksey /* 3bed41005STom Cooksey * 4bed41005STom Cooksey * (C) COPYRIGHT 2012-2013 ARM Limited. All rights reserved. 5bed41005STom Cooksey * 6bed41005STom Cooksey * Parts of this file were based on sources as follows: 7bed41005STom Cooksey * 8bed41005STom Cooksey * Copyright (c) 2006-2008 Intel Corporation 9bed41005STom Cooksey * Copyright (c) 2007 Dave Airlie <airlied@linux.ie> 10bed41005STom Cooksey * Copyright (C) 2011 Texas Instruments 11bed41005STom Cooksey */ 12bed41005STom Cooksey 13bed41005STom Cooksey #ifndef _PL111_DRM_H_ 14bed41005STom Cooksey #define _PL111_DRM_H_ 15bed41005STom Cooksey 16bed41005STom Cooksey #include <drm/drm_gem.h> 17bed41005STom Cooksey #include <drm/drm_simple_kms_helper.h> 18001485d5SLinus Walleij #include <drm/drm_connector.h> 19001485d5SLinus Walleij #include <drm/drm_encoder.h> 20001485d5SLinus Walleij #include <drm/drm_panel.h> 21001485d5SLinus Walleij #include <drm/drm_bridge.h> 22032838f9SEric Anholt #include <linux/clk-provider.h> 23ad86ebe7SLinus Walleij #include <linux/interrupt.h> 24bed41005STom Cooksey 25bed41005STom Cooksey #define CLCD_IRQ_NEXTBASE_UPDATE BIT(2) 26bed41005STom Cooksey 27141518d2SEric Anholt struct drm_minor; 28141518d2SEric Anholt 29fa83306cSLinus Walleij /** 30fa83306cSLinus Walleij * struct pl111_variant_data - encodes IP differences 31fa83306cSLinus Walleij * @name: the name of this variant 32fa83306cSLinus Walleij * @is_pl110: this is the early PL110 variant 33e08015e7SLinus Walleij * @is_lcdc: this is the ST Microelectronics Nomadik LCDC variant 343d95f76aSLinus Walleij * @external_bgr: this is the Versatile Pl110 variant with external 353d95f76aSLinus Walleij * BGR/RGB routing 36eedd6033SLinus Walleij * @broken_clockdivider: the clock divider is broken and we need to 37eedd6033SLinus Walleij * use the supplied clock directly 3808e32112SLinus Walleij * @broken_vblank: the vblank IRQ is broken on this variant 39e08015e7SLinus Walleij * @st_bitmux_control: this variant is using the ST Micro bitmux 40e08015e7SLinus Walleij * extensions to the control register 41fa83306cSLinus Walleij * @formats: array of supported pixel formats on this variant 42fa83306cSLinus Walleij * @nformats: the length of the array of supported pixel formats 439f8d4fe9SLinus Walleij * @fb_bpp: desired bits per pixel on the default framebuffer 44fa83306cSLinus Walleij */ 45fa83306cSLinus Walleij struct pl111_variant_data { 46fa83306cSLinus Walleij const char *name; 47fa83306cSLinus Walleij bool is_pl110; 48e08015e7SLinus Walleij bool is_lcdc; 493d95f76aSLinus Walleij bool external_bgr; 50eedd6033SLinus Walleij bool broken_clockdivider; 5108e32112SLinus Walleij bool broken_vblank; 52e08015e7SLinus Walleij bool st_bitmux_control; 53fa83306cSLinus Walleij const u32 *formats; 54fa83306cSLinus Walleij unsigned int nformats; 559f8d4fe9SLinus Walleij unsigned int fb_bpp; 56fa83306cSLinus Walleij }; 57fa83306cSLinus Walleij 58bed41005STom Cooksey struct pl111_drm_dev_private { 59bed41005STom Cooksey struct drm_device *drm; 60bed41005STom Cooksey 61001485d5SLinus Walleij struct drm_connector *connector; 62001485d5SLinus Walleij struct drm_panel *panel; 63001485d5SLinus Walleij struct drm_bridge *bridge; 64bed41005STom Cooksey struct drm_simple_display_pipe pipe; 65bed41005STom Cooksey 66bed41005STom Cooksey void *regs; 67df99dd92SLinus Walleij u32 memory_bw; 68fa83306cSLinus Walleij u32 ienb; 69fa83306cSLinus Walleij u32 ctrl; 70032838f9SEric Anholt /* The pixel clock (a reference to our clock divider off of CLCDCLK). */ 71bed41005STom Cooksey struct clk *clk; 72032838f9SEric Anholt /* pl111's internal clock divider. */ 73032838f9SEric Anholt struct clk_hw clk_div; 74032838f9SEric Anholt /* Lock to sync access to CLCD_TIM2 between the common clock 75032838f9SEric Anholt * subsystem and pl111_display_enable(). 76032838f9SEric Anholt */ 77032838f9SEric Anholt spinlock_t tim2_lock; 78fa83306cSLinus Walleij const struct pl111_variant_data *variant; 79ad86ebe7SLinus Walleij void (*variant_display_enable) (struct drm_device *drm, u32 format); 80ad86ebe7SLinus Walleij void (*variant_display_disable) (struct drm_device *drm); 8157450671SLinus Walleij bool use_device_memory; 82bed41005STom Cooksey }; 83bed41005STom Cooksey 84bed41005STom Cooksey int pl111_display_init(struct drm_device *dev); 85bed41005STom Cooksey irqreturn_t pl111_irq(int irq, void *data); 86141518d2SEric Anholt int pl111_debugfs_init(struct drm_minor *minor); 87bed41005STom Cooksey 88bed41005STom Cooksey #endif /* _PL111_DRM_H_ */ 89