1f3ba9122SRob Herring /* SPDX-License-Identifier: GPL-2.0 */ 2f3ba9122SRob Herring /* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */ 3f3ba9122SRob Herring /* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */ 4f3ba9122SRob Herring 5f3ba9122SRob Herring #ifndef __PANFROST_DEVICE_H__ 6f3ba9122SRob Herring #define __PANFROST_DEVICE_H__ 7f3ba9122SRob Herring 87282f764SRob Herring #include <linux/atomic.h> 97282f764SRob Herring #include <linux/io-pgtable.h> 103e1399bcSNicolas Boichat #include <linux/regulator/consumer.h> 11f3ba9122SRob Herring #include <linux/spinlock.h> 12f3ba9122SRob Herring #include <drm/drm_device.h> 13f3ba9122SRob Herring #include <drm/drm_mm.h> 14f3ba9122SRob Herring #include <drm/gpu_scheduler.h> 15f3ba9122SRob Herring 169bfacfc8SClément Péron #include "panfrost_devfreq.h" 179bfacfc8SClément Péron 18f3ba9122SRob Herring struct panfrost_device; 19f3ba9122SRob Herring struct panfrost_mmu; 20f3ba9122SRob Herring struct panfrost_job_slot; 21f3ba9122SRob Herring struct panfrost_job; 227786fd10SBoris Brezillon struct panfrost_perfcnt; 23f3ba9122SRob Herring 24f3ba9122SRob Herring #define NUM_JOB_SLOTS 3 25506629c8SNicolas Boichat #define MAX_PM_DOMAINS 3 26f3ba9122SRob Herring 27f3ba9122SRob Herring struct panfrost_features { 28f3ba9122SRob Herring u16 id; 29f3ba9122SRob Herring u16 revision; 30f3ba9122SRob Herring 31f3ba9122SRob Herring u64 shader_present; 32f3ba9122SRob Herring u64 tiler_present; 33f3ba9122SRob Herring u64 l2_present; 34f3ba9122SRob Herring u64 stack_present; 35f3ba9122SRob Herring u32 as_present; 36f3ba9122SRob Herring u32 js_present; 37f3ba9122SRob Herring 38f3ba9122SRob Herring u32 l2_features; 39f3ba9122SRob Herring u32 core_features; 40f3ba9122SRob Herring u32 tiler_features; 41f3ba9122SRob Herring u32 mem_features; 42f3ba9122SRob Herring u32 mmu_features; 43f3ba9122SRob Herring u32 thread_features; 44f3ba9122SRob Herring u32 max_threads; 45f3ba9122SRob Herring u32 thread_max_workgroup_sz; 46f3ba9122SRob Herring u32 thread_max_barrier_sz; 47f3ba9122SRob Herring u32 coherency_features; 48f3ba9122SRob Herring u32 texture_features[4]; 49f3ba9122SRob Herring u32 js_features[16]; 50f3ba9122SRob Herring 51f3ba9122SRob Herring u32 nr_core_groups; 524bced8beSSteven Price u32 thread_tls_alloc; 53f3ba9122SRob Herring 54f3ba9122SRob Herring unsigned long hw_features[64 / BITS_PER_LONG]; 55f3ba9122SRob Herring unsigned long hw_issues[64 / BITS_PER_LONG]; 56f3ba9122SRob Herring }; 57f3ba9122SRob Herring 583e1399bcSNicolas Boichat /* 593e1399bcSNicolas Boichat * Features that cannot be automatically detected and need matching using the 603e1399bcSNicolas Boichat * compatible string, typically SoC-specific. 613e1399bcSNicolas Boichat */ 623e1399bcSNicolas Boichat struct panfrost_compatible { 633e1399bcSNicolas Boichat /* Supplies count and names. */ 643e1399bcSNicolas Boichat int num_supplies; 653e1399bcSNicolas Boichat const char * const *supply_names; 66506629c8SNicolas Boichat /* 67506629c8SNicolas Boichat * Number of power domains required, note that values 0 and 1 are 68506629c8SNicolas Boichat * handled identically, as only values > 1 need special handling. 69506629c8SNicolas Boichat */ 70506629c8SNicolas Boichat int num_pm_domains; 71506629c8SNicolas Boichat /* Only required if num_pm_domains > 1. */ 72506629c8SNicolas Boichat const char * const *pm_domain_names; 7391e89097SNeil Armstrong 7491e89097SNeil Armstrong /* Vendor implementation quirks callback */ 7591e89097SNeil Armstrong void (*vendor_quirk)(struct panfrost_device *pfdev); 763e1399bcSNicolas Boichat }; 773e1399bcSNicolas Boichat 78f3ba9122SRob Herring struct panfrost_device { 79f3ba9122SRob Herring struct device *dev; 80f3ba9122SRob Herring struct drm_device *ddev; 81f3ba9122SRob Herring struct platform_device *pdev; 82f3ba9122SRob Herring 83f3ba9122SRob Herring void __iomem *iomem; 84f3ba9122SRob Herring struct clk *clock; 85b681af0bSClément Péron struct clk *bus_clock; 86512f2122SClément Péron struct regulator_bulk_data *regulators; 87f3ba9122SRob Herring struct reset_control *rstc; 88506629c8SNicolas Boichat /* pm_domains for devices with more than one. */ 89506629c8SNicolas Boichat struct device *pm_domain_devs[MAX_PM_DOMAINS]; 90506629c8SNicolas Boichat struct device_link *pm_domain_links[MAX_PM_DOMAINS]; 91*268af50fSRobin Murphy bool coherent; 92f3ba9122SRob Herring 93f3ba9122SRob Herring struct panfrost_features features; 943e1399bcSNicolas Boichat const struct panfrost_compatible *comp; 95f3ba9122SRob Herring 967282f764SRob Herring spinlock_t as_lock; 977282f764SRob Herring unsigned long as_in_use_mask; 987282f764SRob Herring unsigned long as_alloc_mask; 997282f764SRob Herring struct list_head as_lru_list; 1007282f764SRob Herring 101f3ba9122SRob Herring struct panfrost_job_slot *js; 102f3ba9122SRob Herring 103f3ba9122SRob Herring struct panfrost_job *jobs[NUM_JOB_SLOTS]; 104f3ba9122SRob Herring struct list_head scheduled_jobs; 105f3ba9122SRob Herring 1067786fd10SBoris Brezillon struct panfrost_perfcnt *perfcnt; 1077786fd10SBoris Brezillon 108f3ba9122SRob Herring struct mutex sched_lock; 109aa202367STomeu Vizoso struct mutex reset_lock; 110f3ba9122SRob Herring 111013b6510SRob Herring struct mutex shrinker_lock; 112013b6510SRob Herring struct list_head shrinker_list; 113013b6510SRob Herring struct shrinker shrinker; 114013b6510SRob Herring 1159bfacfc8SClément Péron struct panfrost_devfreq pfdevfreq; 116f3ba9122SRob Herring }; 117f3ba9122SRob Herring 1187282f764SRob Herring struct panfrost_mmu { 1197282f764SRob Herring struct io_pgtable_cfg pgtbl_cfg; 1207282f764SRob Herring struct io_pgtable_ops *pgtbl_ops; 1217282f764SRob Herring int as; 1227282f764SRob Herring atomic_t as_count; 1237282f764SRob Herring struct list_head list; 1247282f764SRob Herring }; 1257282f764SRob Herring 126f3ba9122SRob Herring struct panfrost_file_priv { 127f3ba9122SRob Herring struct panfrost_device *pfdev; 128f3ba9122SRob Herring 129f3ba9122SRob Herring struct drm_sched_entity sched_entity[NUM_JOB_SLOTS]; 1307282f764SRob Herring 1317282f764SRob Herring struct panfrost_mmu mmu; 1327282f764SRob Herring struct drm_mm mm; 1337282f764SRob Herring spinlock_t mm_lock; 134f3ba9122SRob Herring }; 135f3ba9122SRob Herring 136f3ba9122SRob Herring static inline struct panfrost_device *to_panfrost_device(struct drm_device *ddev) 137f3ba9122SRob Herring { 138f3ba9122SRob Herring return ddev->dev_private; 139f3ba9122SRob Herring } 140f3ba9122SRob Herring 141f3ba9122SRob Herring static inline int panfrost_model_cmp(struct panfrost_device *pfdev, s32 id) 142f3ba9122SRob Herring { 143f3ba9122SRob Herring s32 match_id = pfdev->features.id; 144f3ba9122SRob Herring 145f3ba9122SRob Herring if (match_id & 0xf000) 146f3ba9122SRob Herring match_id &= 0xf00f; 147f3ba9122SRob Herring return match_id - id; 148f3ba9122SRob Herring } 149f3ba9122SRob Herring 1501e513480SBoris Brezillon static inline bool panfrost_model_is_bifrost(struct panfrost_device *pfdev) 1511e513480SBoris Brezillon { 1521e513480SBoris Brezillon return panfrost_model_cmp(pfdev, 0x1000) >= 0; 1531e513480SBoris Brezillon } 1541e513480SBoris Brezillon 155f3ba9122SRob Herring static inline bool panfrost_model_eq(struct panfrost_device *pfdev, s32 id) 156f3ba9122SRob Herring { 157f3ba9122SRob Herring return !panfrost_model_cmp(pfdev, id); 158f3ba9122SRob Herring } 159f3ba9122SRob Herring 16092f0ad0bSBoris Brezillon int panfrost_unstable_ioctl_check(void); 16192f0ad0bSBoris Brezillon 162f3ba9122SRob Herring int panfrost_device_init(struct panfrost_device *pfdev); 163f3ba9122SRob Herring void panfrost_device_fini(struct panfrost_device *pfdev); 16473e467f6SRob Herring void panfrost_device_reset(struct panfrost_device *pfdev); 165f3ba9122SRob Herring 166f3ba9122SRob Herring int panfrost_device_resume(struct device *dev); 167f3ba9122SRob Herring int panfrost_device_suspend(struct device *dev); 168f3ba9122SRob Herring 169f3ba9122SRob Herring const char *panfrost_exception_name(struct panfrost_device *pfdev, u32 exception_code); 170f3ba9122SRob Herring 171f3ba9122SRob Herring #endif 172