1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */ 3 /* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */ 4 5 #include <linux/clk.h> 6 #include <linux/reset.h> 7 #include <linux/platform_device.h> 8 #include <linux/regulator/consumer.h> 9 10 #include "panfrost_device.h" 11 #include "panfrost_devfreq.h" 12 #include "panfrost_features.h" 13 #include "panfrost_gpu.h" 14 #include "panfrost_job.h" 15 #include "panfrost_mmu.h" 16 #include "panfrost_perfcnt.h" 17 18 static int panfrost_reset_init(struct panfrost_device *pfdev) 19 { 20 int err; 21 22 pfdev->rstc = devm_reset_control_array_get(pfdev->dev, false, true); 23 if (IS_ERR(pfdev->rstc)) { 24 dev_err(pfdev->dev, "get reset failed %ld\n", PTR_ERR(pfdev->rstc)); 25 return PTR_ERR(pfdev->rstc); 26 } 27 28 err = reset_control_deassert(pfdev->rstc); 29 if (err) 30 return err; 31 32 return 0; 33 } 34 35 static void panfrost_reset_fini(struct panfrost_device *pfdev) 36 { 37 reset_control_assert(pfdev->rstc); 38 } 39 40 static int panfrost_clk_init(struct panfrost_device *pfdev) 41 { 42 int err; 43 unsigned long rate; 44 45 pfdev->clock = devm_clk_get(pfdev->dev, NULL); 46 if (IS_ERR(pfdev->clock)) { 47 dev_err(pfdev->dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock)); 48 return PTR_ERR(pfdev->clock); 49 } 50 51 rate = clk_get_rate(pfdev->clock); 52 dev_info(pfdev->dev, "clock rate = %lu\n", rate); 53 54 err = clk_prepare_enable(pfdev->clock); 55 if (err) 56 return err; 57 58 pfdev->bus_clock = devm_clk_get_optional(pfdev->dev, "bus"); 59 if (IS_ERR(pfdev->bus_clock)) { 60 dev_err(pfdev->dev, "get bus_clock failed %ld\n", 61 PTR_ERR(pfdev->bus_clock)); 62 return PTR_ERR(pfdev->bus_clock); 63 } 64 65 if (pfdev->bus_clock) { 66 rate = clk_get_rate(pfdev->bus_clock); 67 dev_info(pfdev->dev, "bus_clock rate = %lu\n", rate); 68 69 err = clk_prepare_enable(pfdev->bus_clock); 70 if (err) 71 goto disable_clock; 72 } 73 74 return 0; 75 76 disable_clock: 77 clk_disable_unprepare(pfdev->clock); 78 79 return err; 80 } 81 82 static void panfrost_clk_fini(struct panfrost_device *pfdev) 83 { 84 clk_disable_unprepare(pfdev->bus_clock); 85 clk_disable_unprepare(pfdev->clock); 86 } 87 88 static int panfrost_regulator_init(struct panfrost_device *pfdev) 89 { 90 int ret; 91 92 pfdev->regulator = devm_regulator_get(pfdev->dev, "mali"); 93 if (IS_ERR(pfdev->regulator)) { 94 ret = PTR_ERR(pfdev->regulator); 95 dev_err(pfdev->dev, "failed to get regulator: %d\n", ret); 96 return ret; 97 } 98 99 ret = regulator_enable(pfdev->regulator); 100 if (ret < 0) { 101 dev_err(pfdev->dev, "failed to enable regulator: %d\n", ret); 102 return ret; 103 } 104 105 return 0; 106 } 107 108 static void panfrost_regulator_fini(struct panfrost_device *pfdev) 109 { 110 regulator_disable(pfdev->regulator); 111 } 112 113 int panfrost_device_init(struct panfrost_device *pfdev) 114 { 115 int err; 116 struct resource *res; 117 118 mutex_init(&pfdev->sched_lock); 119 mutex_init(&pfdev->reset_lock); 120 INIT_LIST_HEAD(&pfdev->scheduled_jobs); 121 INIT_LIST_HEAD(&pfdev->as_lru_list); 122 123 spin_lock_init(&pfdev->as_lock); 124 125 err = panfrost_clk_init(pfdev); 126 if (err) { 127 dev_err(pfdev->dev, "clk init failed %d\n", err); 128 return err; 129 } 130 131 err = panfrost_regulator_init(pfdev); 132 if (err) { 133 dev_err(pfdev->dev, "regulator init failed %d\n", err); 134 goto err_out0; 135 } 136 137 err = panfrost_reset_init(pfdev); 138 if (err) { 139 dev_err(pfdev->dev, "reset init failed %d\n", err); 140 goto err_out1; 141 } 142 143 res = platform_get_resource(pfdev->pdev, IORESOURCE_MEM, 0); 144 pfdev->iomem = devm_ioremap_resource(pfdev->dev, res); 145 if (IS_ERR(pfdev->iomem)) { 146 dev_err(pfdev->dev, "failed to ioremap iomem\n"); 147 err = PTR_ERR(pfdev->iomem); 148 goto err_out2; 149 } 150 151 err = panfrost_gpu_init(pfdev); 152 if (err) 153 goto err_out2; 154 155 err = panfrost_mmu_init(pfdev); 156 if (err) 157 goto err_out3; 158 159 err = panfrost_job_init(pfdev); 160 if (err) 161 goto err_out4; 162 163 err = panfrost_perfcnt_init(pfdev); 164 if (err) 165 goto err_out5; 166 167 return 0; 168 err_out5: 169 panfrost_job_fini(pfdev); 170 err_out4: 171 panfrost_mmu_fini(pfdev); 172 err_out3: 173 panfrost_gpu_fini(pfdev); 174 err_out2: 175 panfrost_reset_fini(pfdev); 176 err_out1: 177 panfrost_regulator_fini(pfdev); 178 err_out0: 179 panfrost_clk_fini(pfdev); 180 return err; 181 } 182 183 void panfrost_device_fini(struct panfrost_device *pfdev) 184 { 185 panfrost_perfcnt_fini(pfdev); 186 panfrost_job_fini(pfdev); 187 panfrost_mmu_fini(pfdev); 188 panfrost_gpu_fini(pfdev); 189 panfrost_reset_fini(pfdev); 190 panfrost_regulator_fini(pfdev); 191 panfrost_clk_fini(pfdev); 192 } 193 194 const char *panfrost_exception_name(struct panfrost_device *pfdev, u32 exception_code) 195 { 196 switch (exception_code) { 197 /* Non-Fault Status code */ 198 case 0x00: return "NOT_STARTED/IDLE/OK"; 199 case 0x01: return "DONE"; 200 case 0x02: return "INTERRUPTED"; 201 case 0x03: return "STOPPED"; 202 case 0x04: return "TERMINATED"; 203 case 0x08: return "ACTIVE"; 204 /* Job exceptions */ 205 case 0x40: return "JOB_CONFIG_FAULT"; 206 case 0x41: return "JOB_POWER_FAULT"; 207 case 0x42: return "JOB_READ_FAULT"; 208 case 0x43: return "JOB_WRITE_FAULT"; 209 case 0x44: return "JOB_AFFINITY_FAULT"; 210 case 0x48: return "JOB_BUS_FAULT"; 211 case 0x50: return "INSTR_INVALID_PC"; 212 case 0x51: return "INSTR_INVALID_ENC"; 213 case 0x52: return "INSTR_TYPE_MISMATCH"; 214 case 0x53: return "INSTR_OPERAND_FAULT"; 215 case 0x54: return "INSTR_TLS_FAULT"; 216 case 0x55: return "INSTR_BARRIER_FAULT"; 217 case 0x56: return "INSTR_ALIGN_FAULT"; 218 case 0x58: return "DATA_INVALID_FAULT"; 219 case 0x59: return "TILE_RANGE_FAULT"; 220 case 0x5A: return "ADDR_RANGE_FAULT"; 221 case 0x60: return "OUT_OF_MEMORY"; 222 /* GPU exceptions */ 223 case 0x80: return "DELAYED_BUS_FAULT"; 224 case 0x88: return "SHAREABILITY_FAULT"; 225 /* MMU exceptions */ 226 case 0xC1: return "TRANSLATION_FAULT_LEVEL1"; 227 case 0xC2: return "TRANSLATION_FAULT_LEVEL2"; 228 case 0xC3: return "TRANSLATION_FAULT_LEVEL3"; 229 case 0xC4: return "TRANSLATION_FAULT_LEVEL4"; 230 case 0xC8: return "PERMISSION_FAULT"; 231 case 0xC9 ... 0xCF: return "PERMISSION_FAULT"; 232 case 0xD1: return "TRANSTAB_BUS_FAULT_LEVEL1"; 233 case 0xD2: return "TRANSTAB_BUS_FAULT_LEVEL2"; 234 case 0xD3: return "TRANSTAB_BUS_FAULT_LEVEL3"; 235 case 0xD4: return "TRANSTAB_BUS_FAULT_LEVEL4"; 236 case 0xD8: return "ACCESS_FLAG"; 237 case 0xD9 ... 0xDF: return "ACCESS_FLAG"; 238 case 0xE0 ... 0xE7: return "ADDRESS_SIZE_FAULT"; 239 case 0xE8 ... 0xEF: return "MEMORY_ATTRIBUTES_FAULT"; 240 } 241 242 return "UNKNOWN"; 243 } 244 245 void panfrost_device_reset(struct panfrost_device *pfdev) 246 { 247 panfrost_gpu_soft_reset(pfdev); 248 249 panfrost_gpu_power_on(pfdev); 250 panfrost_mmu_reset(pfdev); 251 panfrost_job_enable_interrupts(pfdev); 252 } 253 254 #ifdef CONFIG_PM 255 int panfrost_device_resume(struct device *dev) 256 { 257 struct platform_device *pdev = to_platform_device(dev); 258 struct panfrost_device *pfdev = platform_get_drvdata(pdev); 259 260 panfrost_device_reset(pfdev); 261 panfrost_devfreq_resume(pfdev); 262 263 return 0; 264 } 265 266 int panfrost_device_suspend(struct device *dev) 267 { 268 struct platform_device *pdev = to_platform_device(dev); 269 struct panfrost_device *pfdev = platform_get_drvdata(pdev); 270 271 if (!panfrost_job_is_idle(pfdev)) 272 return -EBUSY; 273 274 panfrost_devfreq_suspend(pfdev); 275 panfrost_gpu_power_off(pfdev); 276 277 return 0; 278 } 279 #endif 280