1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */ 3 /* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */ 4 5 #include <linux/clk.h> 6 #include <linux/reset.h> 7 #include <linux/platform_device.h> 8 #include <linux/pm_domain.h> 9 #include <linux/regulator/consumer.h> 10 11 #include "panfrost_device.h" 12 #include "panfrost_devfreq.h" 13 #include "panfrost_features.h" 14 #include "panfrost_gpu.h" 15 #include "panfrost_job.h" 16 #include "panfrost_mmu.h" 17 #include "panfrost_perfcnt.h" 18 19 static int panfrost_reset_init(struct panfrost_device *pfdev) 20 { 21 pfdev->rstc = devm_reset_control_array_get_optional_exclusive(pfdev->dev); 22 if (IS_ERR(pfdev->rstc)) { 23 dev_err(pfdev->dev, "get reset failed %ld\n", PTR_ERR(pfdev->rstc)); 24 return PTR_ERR(pfdev->rstc); 25 } 26 27 return reset_control_deassert(pfdev->rstc); 28 } 29 30 static void panfrost_reset_fini(struct panfrost_device *pfdev) 31 { 32 reset_control_assert(pfdev->rstc); 33 } 34 35 static int panfrost_clk_init(struct panfrost_device *pfdev) 36 { 37 int err; 38 unsigned long rate; 39 40 pfdev->clock = devm_clk_get(pfdev->dev, NULL); 41 if (IS_ERR(pfdev->clock)) { 42 dev_err(pfdev->dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock)); 43 return PTR_ERR(pfdev->clock); 44 } 45 46 rate = clk_get_rate(pfdev->clock); 47 dev_info(pfdev->dev, "clock rate = %lu\n", rate); 48 49 err = clk_prepare_enable(pfdev->clock); 50 if (err) 51 return err; 52 53 pfdev->bus_clock = devm_clk_get_optional(pfdev->dev, "bus"); 54 if (IS_ERR(pfdev->bus_clock)) { 55 dev_err(pfdev->dev, "get bus_clock failed %ld\n", 56 PTR_ERR(pfdev->bus_clock)); 57 return PTR_ERR(pfdev->bus_clock); 58 } 59 60 if (pfdev->bus_clock) { 61 rate = clk_get_rate(pfdev->bus_clock); 62 dev_info(pfdev->dev, "bus_clock rate = %lu\n", rate); 63 64 err = clk_prepare_enable(pfdev->bus_clock); 65 if (err) 66 goto disable_clock; 67 } 68 69 return 0; 70 71 disable_clock: 72 clk_disable_unprepare(pfdev->clock); 73 74 return err; 75 } 76 77 static void panfrost_clk_fini(struct panfrost_device *pfdev) 78 { 79 clk_disable_unprepare(pfdev->bus_clock); 80 clk_disable_unprepare(pfdev->clock); 81 } 82 83 static int panfrost_regulator_init(struct panfrost_device *pfdev) 84 { 85 int ret, i; 86 87 pfdev->regulators = devm_kcalloc(pfdev->dev, pfdev->comp->num_supplies, 88 sizeof(*pfdev->regulators), 89 GFP_KERNEL); 90 if (!pfdev->regulators) 91 return -ENOMEM; 92 93 for (i = 0; i < pfdev->comp->num_supplies; i++) 94 pfdev->regulators[i].supply = pfdev->comp->supply_names[i]; 95 96 ret = devm_regulator_bulk_get(pfdev->dev, 97 pfdev->comp->num_supplies, 98 pfdev->regulators); 99 if (ret < 0) { 100 if (ret != -EPROBE_DEFER) 101 dev_err(pfdev->dev, "failed to get regulators: %d\n", 102 ret); 103 return ret; 104 } 105 106 ret = regulator_bulk_enable(pfdev->comp->num_supplies, 107 pfdev->regulators); 108 if (ret < 0) { 109 dev_err(pfdev->dev, "failed to enable regulators: %d\n", ret); 110 return ret; 111 } 112 113 return 0; 114 } 115 116 static void panfrost_regulator_fini(struct panfrost_device *pfdev) 117 { 118 if (!pfdev->regulators) 119 return; 120 121 regulator_bulk_disable(pfdev->comp->num_supplies, pfdev->regulators); 122 } 123 124 static void panfrost_pm_domain_fini(struct panfrost_device *pfdev) 125 { 126 int i; 127 128 for (i = 0; i < ARRAY_SIZE(pfdev->pm_domain_devs); i++) { 129 if (!pfdev->pm_domain_devs[i]) 130 break; 131 132 if (pfdev->pm_domain_links[i]) 133 device_link_del(pfdev->pm_domain_links[i]); 134 135 dev_pm_domain_detach(pfdev->pm_domain_devs[i], true); 136 } 137 } 138 139 static int panfrost_pm_domain_init(struct panfrost_device *pfdev) 140 { 141 int err; 142 int i, num_domains; 143 144 num_domains = of_count_phandle_with_args(pfdev->dev->of_node, 145 "power-domains", 146 "#power-domain-cells"); 147 148 /* 149 * Single domain is handled by the core, and, if only a single power 150 * the power domain is requested, the property is optional. 151 */ 152 if (num_domains < 2 && pfdev->comp->num_pm_domains < 2) 153 return 0; 154 155 if (num_domains != pfdev->comp->num_pm_domains) { 156 dev_err(pfdev->dev, 157 "Incorrect number of power domains: %d provided, %d needed\n", 158 num_domains, pfdev->comp->num_pm_domains); 159 return -EINVAL; 160 } 161 162 if (WARN(num_domains > ARRAY_SIZE(pfdev->pm_domain_devs), 163 "Too many supplies in compatible structure.\n")) 164 return -EINVAL; 165 166 for (i = 0; i < num_domains; i++) { 167 pfdev->pm_domain_devs[i] = 168 dev_pm_domain_attach_by_name(pfdev->dev, 169 pfdev->comp->pm_domain_names[i]); 170 if (IS_ERR_OR_NULL(pfdev->pm_domain_devs[i])) { 171 err = PTR_ERR(pfdev->pm_domain_devs[i]) ? : -ENODATA; 172 pfdev->pm_domain_devs[i] = NULL; 173 dev_err(pfdev->dev, 174 "failed to get pm-domain %s(%d): %d\n", 175 pfdev->comp->pm_domain_names[i], i, err); 176 goto err; 177 } 178 179 pfdev->pm_domain_links[i] = device_link_add(pfdev->dev, 180 pfdev->pm_domain_devs[i], DL_FLAG_PM_RUNTIME | 181 DL_FLAG_STATELESS | DL_FLAG_RPM_ACTIVE); 182 if (!pfdev->pm_domain_links[i]) { 183 dev_err(pfdev->pm_domain_devs[i], 184 "adding device link failed!\n"); 185 err = -ENODEV; 186 goto err; 187 } 188 } 189 190 return 0; 191 192 err: 193 panfrost_pm_domain_fini(pfdev); 194 return err; 195 } 196 197 int panfrost_device_init(struct panfrost_device *pfdev) 198 { 199 int err; 200 struct resource *res; 201 202 mutex_init(&pfdev->sched_lock); 203 INIT_LIST_HEAD(&pfdev->scheduled_jobs); 204 INIT_LIST_HEAD(&pfdev->as_lru_list); 205 206 spin_lock_init(&pfdev->as_lock); 207 208 err = panfrost_clk_init(pfdev); 209 if (err) { 210 dev_err(pfdev->dev, "clk init failed %d\n", err); 211 return err; 212 } 213 214 err = panfrost_devfreq_init(pfdev); 215 if (err) { 216 if (err != -EPROBE_DEFER) 217 dev_err(pfdev->dev, "devfreq init failed %d\n", err); 218 goto out_clk; 219 } 220 221 /* OPP will handle regulators */ 222 if (!pfdev->pfdevfreq.opp_of_table_added) { 223 err = panfrost_regulator_init(pfdev); 224 if (err) 225 goto out_devfreq; 226 } 227 228 err = panfrost_reset_init(pfdev); 229 if (err) { 230 dev_err(pfdev->dev, "reset init failed %d\n", err); 231 goto out_regulator; 232 } 233 234 err = panfrost_pm_domain_init(pfdev); 235 if (err) 236 goto out_reset; 237 238 res = platform_get_resource(pfdev->pdev, IORESOURCE_MEM, 0); 239 pfdev->iomem = devm_ioremap_resource(pfdev->dev, res); 240 if (IS_ERR(pfdev->iomem)) { 241 err = PTR_ERR(pfdev->iomem); 242 goto out_pm_domain; 243 } 244 245 err = panfrost_gpu_init(pfdev); 246 if (err) 247 goto out_pm_domain; 248 249 err = panfrost_mmu_init(pfdev); 250 if (err) 251 goto out_gpu; 252 253 err = panfrost_job_init(pfdev); 254 if (err) 255 goto out_mmu; 256 257 err = panfrost_perfcnt_init(pfdev); 258 if (err) 259 goto out_job; 260 261 return 0; 262 out_job: 263 panfrost_job_fini(pfdev); 264 out_mmu: 265 panfrost_mmu_fini(pfdev); 266 out_gpu: 267 panfrost_gpu_fini(pfdev); 268 out_pm_domain: 269 panfrost_pm_domain_fini(pfdev); 270 out_reset: 271 panfrost_reset_fini(pfdev); 272 out_regulator: 273 panfrost_regulator_fini(pfdev); 274 out_devfreq: 275 panfrost_devfreq_fini(pfdev); 276 out_clk: 277 panfrost_clk_fini(pfdev); 278 return err; 279 } 280 281 void panfrost_device_fini(struct panfrost_device *pfdev) 282 { 283 panfrost_perfcnt_fini(pfdev); 284 panfrost_job_fini(pfdev); 285 panfrost_mmu_fini(pfdev); 286 panfrost_gpu_fini(pfdev); 287 panfrost_pm_domain_fini(pfdev); 288 panfrost_reset_fini(pfdev); 289 panfrost_devfreq_fini(pfdev); 290 panfrost_regulator_fini(pfdev); 291 panfrost_clk_fini(pfdev); 292 } 293 294 const char *panfrost_exception_name(struct panfrost_device *pfdev, u32 exception_code) 295 { 296 switch (exception_code) { 297 /* Non-Fault Status code */ 298 case 0x00: return "NOT_STARTED/IDLE/OK"; 299 case 0x01: return "DONE"; 300 case 0x02: return "INTERRUPTED"; 301 case 0x03: return "STOPPED"; 302 case 0x04: return "TERMINATED"; 303 case 0x08: return "ACTIVE"; 304 /* Job exceptions */ 305 case 0x40: return "JOB_CONFIG_FAULT"; 306 case 0x41: return "JOB_POWER_FAULT"; 307 case 0x42: return "JOB_READ_FAULT"; 308 case 0x43: return "JOB_WRITE_FAULT"; 309 case 0x44: return "JOB_AFFINITY_FAULT"; 310 case 0x48: return "JOB_BUS_FAULT"; 311 case 0x50: return "INSTR_INVALID_PC"; 312 case 0x51: return "INSTR_INVALID_ENC"; 313 case 0x52: return "INSTR_TYPE_MISMATCH"; 314 case 0x53: return "INSTR_OPERAND_FAULT"; 315 case 0x54: return "INSTR_TLS_FAULT"; 316 case 0x55: return "INSTR_BARRIER_FAULT"; 317 case 0x56: return "INSTR_ALIGN_FAULT"; 318 case 0x58: return "DATA_INVALID_FAULT"; 319 case 0x59: return "TILE_RANGE_FAULT"; 320 case 0x5A: return "ADDR_RANGE_FAULT"; 321 case 0x60: return "OUT_OF_MEMORY"; 322 /* GPU exceptions */ 323 case 0x80: return "DELAYED_BUS_FAULT"; 324 case 0x88: return "SHAREABILITY_FAULT"; 325 /* MMU exceptions */ 326 case 0xC1: return "TRANSLATION_FAULT_LEVEL1"; 327 case 0xC2: return "TRANSLATION_FAULT_LEVEL2"; 328 case 0xC3: return "TRANSLATION_FAULT_LEVEL3"; 329 case 0xC4: return "TRANSLATION_FAULT_LEVEL4"; 330 case 0xC8: return "PERMISSION_FAULT"; 331 case 0xC9 ... 0xCF: return "PERMISSION_FAULT"; 332 case 0xD1: return "TRANSTAB_BUS_FAULT_LEVEL1"; 333 case 0xD2: return "TRANSTAB_BUS_FAULT_LEVEL2"; 334 case 0xD3: return "TRANSTAB_BUS_FAULT_LEVEL3"; 335 case 0xD4: return "TRANSTAB_BUS_FAULT_LEVEL4"; 336 case 0xD8: return "ACCESS_FLAG"; 337 case 0xD9 ... 0xDF: return "ACCESS_FLAG"; 338 case 0xE0 ... 0xE7: return "ADDRESS_SIZE_FAULT"; 339 case 0xE8 ... 0xEF: return "MEMORY_ATTRIBUTES_FAULT"; 340 } 341 342 return "UNKNOWN"; 343 } 344 345 void panfrost_device_reset(struct panfrost_device *pfdev) 346 { 347 panfrost_gpu_soft_reset(pfdev); 348 349 panfrost_gpu_power_on(pfdev); 350 panfrost_mmu_reset(pfdev); 351 panfrost_job_enable_interrupts(pfdev); 352 } 353 354 #ifdef CONFIG_PM 355 int panfrost_device_resume(struct device *dev) 356 { 357 struct platform_device *pdev = to_platform_device(dev); 358 struct panfrost_device *pfdev = platform_get_drvdata(pdev); 359 360 panfrost_device_reset(pfdev); 361 panfrost_devfreq_resume(pfdev); 362 363 return 0; 364 } 365 366 int panfrost_device_suspend(struct device *dev) 367 { 368 struct platform_device *pdev = to_platform_device(dev); 369 struct panfrost_device *pfdev = platform_get_drvdata(pdev); 370 371 if (!panfrost_job_is_idle(pfdev)) 372 return -EBUSY; 373 374 panfrost_devfreq_suspend(pfdev); 375 panfrost_gpu_power_off(pfdev); 376 377 return 0; 378 } 379 #endif 380