1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2017 Free Electrons
4  */
5 
6 #include <linux/gpio/consumer.h>
7 #include <linux/regulator/consumer.h>
8 #include <linux/spi/spi.h>
9 
10 #include <drm/drmP.h>
11 #include <drm/drm_panel.h>
12 
13 #include <video/mipi_display.h>
14 
15 #define ST7789V_COLMOD_RGB_FMT_18BITS		(6 << 4)
16 #define ST7789V_COLMOD_CTRL_FMT_18BITS		(6 << 0)
17 
18 #define ST7789V_RAMCTRL_CMD		0xb0
19 #define ST7789V_RAMCTRL_RM_RGB			BIT(4)
20 #define ST7789V_RAMCTRL_DM_RGB			BIT(0)
21 #define ST7789V_RAMCTRL_MAGIC			(3 << 6)
22 #define ST7789V_RAMCTRL_EPF(n)			(((n) & 3) << 4)
23 
24 #define ST7789V_RGBCTRL_CMD		0xb1
25 #define ST7789V_RGBCTRL_WO			BIT(7)
26 #define ST7789V_RGBCTRL_RCM(n)			(((n) & 3) << 5)
27 #define ST7789V_RGBCTRL_VSYNC_HIGH		BIT(3)
28 #define ST7789V_RGBCTRL_HSYNC_HIGH		BIT(2)
29 #define ST7789V_RGBCTRL_PCLK_HIGH		BIT(1)
30 #define ST7789V_RGBCTRL_VBP(n)			((n) & 0x7f)
31 #define ST7789V_RGBCTRL_HBP(n)			((n) & 0x1f)
32 
33 #define ST7789V_PORCTRL_CMD		0xb2
34 #define ST7789V_PORCTRL_IDLE_BP(n)		(((n) & 0xf) << 4)
35 #define ST7789V_PORCTRL_IDLE_FP(n)		((n) & 0xf)
36 #define ST7789V_PORCTRL_PARTIAL_BP(n)		(((n) & 0xf) << 4)
37 #define ST7789V_PORCTRL_PARTIAL_FP(n)		((n) & 0xf)
38 
39 #define ST7789V_GCTRL_CMD		0xb7
40 #define ST7789V_GCTRL_VGHS(n)			(((n) & 7) << 4)
41 #define ST7789V_GCTRL_VGLS(n)			((n) & 7)
42 
43 #define ST7789V_VCOMS_CMD		0xbb
44 
45 #define ST7789V_LCMCTRL_CMD		0xc0
46 #define ST7789V_LCMCTRL_XBGR			BIT(5)
47 #define ST7789V_LCMCTRL_XMX			BIT(3)
48 #define ST7789V_LCMCTRL_XMH			BIT(2)
49 
50 #define ST7789V_VDVVRHEN_CMD		0xc2
51 #define ST7789V_VDVVRHEN_CMDEN			BIT(0)
52 
53 #define ST7789V_VRHS_CMD		0xc3
54 
55 #define ST7789V_VDVS_CMD		0xc4
56 
57 #define ST7789V_FRCTRL2_CMD		0xc6
58 
59 #define ST7789V_PWCTRL1_CMD		0xd0
60 #define ST7789V_PWCTRL1_MAGIC			0xa4
61 #define ST7789V_PWCTRL1_AVDD(n)			(((n) & 3) << 6)
62 #define ST7789V_PWCTRL1_AVCL(n)			(((n) & 3) << 4)
63 #define ST7789V_PWCTRL1_VDS(n)			((n) & 3)
64 
65 #define ST7789V_PVGAMCTRL_CMD		0xe0
66 #define ST7789V_PVGAMCTRL_JP0(n)		(((n) & 3) << 4)
67 #define ST7789V_PVGAMCTRL_JP1(n)		(((n) & 3) << 4)
68 #define ST7789V_PVGAMCTRL_VP0(n)		((n) & 0xf)
69 #define ST7789V_PVGAMCTRL_VP1(n)		((n) & 0x3f)
70 #define ST7789V_PVGAMCTRL_VP2(n)		((n) & 0x3f)
71 #define ST7789V_PVGAMCTRL_VP4(n)		((n) & 0x1f)
72 #define ST7789V_PVGAMCTRL_VP6(n)		((n) & 0x1f)
73 #define ST7789V_PVGAMCTRL_VP13(n)		((n) & 0xf)
74 #define ST7789V_PVGAMCTRL_VP20(n)		((n) & 0x7f)
75 #define ST7789V_PVGAMCTRL_VP27(n)		((n) & 7)
76 #define ST7789V_PVGAMCTRL_VP36(n)		(((n) & 7) << 4)
77 #define ST7789V_PVGAMCTRL_VP43(n)		((n) & 0x7f)
78 #define ST7789V_PVGAMCTRL_VP50(n)		((n) & 0xf)
79 #define ST7789V_PVGAMCTRL_VP57(n)		((n) & 0x1f)
80 #define ST7789V_PVGAMCTRL_VP59(n)		((n) & 0x1f)
81 #define ST7789V_PVGAMCTRL_VP61(n)		((n) & 0x3f)
82 #define ST7789V_PVGAMCTRL_VP62(n)		((n) & 0x3f)
83 #define ST7789V_PVGAMCTRL_VP63(n)		(((n) & 0xf) << 4)
84 
85 #define ST7789V_NVGAMCTRL_CMD		0xe1
86 #define ST7789V_NVGAMCTRL_JN0(n)		(((n) & 3) << 4)
87 #define ST7789V_NVGAMCTRL_JN1(n)		(((n) & 3) << 4)
88 #define ST7789V_NVGAMCTRL_VN0(n)		((n) & 0xf)
89 #define ST7789V_NVGAMCTRL_VN1(n)		((n) & 0x3f)
90 #define ST7789V_NVGAMCTRL_VN2(n)		((n) & 0x3f)
91 #define ST7789V_NVGAMCTRL_VN4(n)		((n) & 0x1f)
92 #define ST7789V_NVGAMCTRL_VN6(n)		((n) & 0x1f)
93 #define ST7789V_NVGAMCTRL_VN13(n)		((n) & 0xf)
94 #define ST7789V_NVGAMCTRL_VN20(n)		((n) & 0x7f)
95 #define ST7789V_NVGAMCTRL_VN27(n)		((n) & 7)
96 #define ST7789V_NVGAMCTRL_VN36(n)		(((n) & 7) << 4)
97 #define ST7789V_NVGAMCTRL_VN43(n)		((n) & 0x7f)
98 #define ST7789V_NVGAMCTRL_VN50(n)		((n) & 0xf)
99 #define ST7789V_NVGAMCTRL_VN57(n)		((n) & 0x1f)
100 #define ST7789V_NVGAMCTRL_VN59(n)		((n) & 0x1f)
101 #define ST7789V_NVGAMCTRL_VN61(n)		((n) & 0x3f)
102 #define ST7789V_NVGAMCTRL_VN62(n)		((n) & 0x3f)
103 #define ST7789V_NVGAMCTRL_VN63(n)		(((n) & 0xf) << 4)
104 
105 #define ST7789V_TEST(val, func)			\
106 	do {					\
107 		if ((val = (func)))		\
108 			return val;		\
109 	} while (0)
110 
111 struct st7789v {
112 	struct drm_panel panel;
113 	struct spi_device *spi;
114 	struct gpio_desc *reset;
115 	struct backlight_device *backlight;
116 	struct regulator *power;
117 };
118 
119 enum st7789v_prefix {
120 	ST7789V_COMMAND = 0,
121 	ST7789V_DATA = 1,
122 };
123 
124 static inline struct st7789v *panel_to_st7789v(struct drm_panel *panel)
125 {
126 	return container_of(panel, struct st7789v, panel);
127 }
128 
129 static int st7789v_spi_write(struct st7789v *ctx, enum st7789v_prefix prefix,
130 			     u8 data)
131 {
132 	struct spi_transfer xfer = { };
133 	struct spi_message msg;
134 	u16 txbuf = ((prefix & 1) << 8) | data;
135 
136 	spi_message_init(&msg);
137 
138 	xfer.tx_buf = &txbuf;
139 	xfer.bits_per_word = 9;
140 	xfer.len = sizeof(txbuf);
141 
142 	spi_message_add_tail(&xfer, &msg);
143 	return spi_sync(ctx->spi, &msg);
144 }
145 
146 static int st7789v_write_command(struct st7789v *ctx, u8 cmd)
147 {
148 	return st7789v_spi_write(ctx, ST7789V_COMMAND, cmd);
149 }
150 
151 static int st7789v_write_data(struct st7789v *ctx, u8 cmd)
152 {
153 	return st7789v_spi_write(ctx, ST7789V_DATA, cmd);
154 }
155 
156 static const struct drm_display_mode default_mode = {
157 	.clock = 7000,
158 	.hdisplay = 240,
159 	.hsync_start = 240 + 38,
160 	.hsync_end = 240 + 38 + 10,
161 	.htotal = 240 + 38 + 10 + 10,
162 	.vdisplay = 320,
163 	.vsync_start = 320 + 8,
164 	.vsync_end = 320 + 8 + 4,
165 	.vtotal = 320 + 8 + 4 + 4,
166 	.vrefresh = 60,
167 };
168 
169 static int st7789v_get_modes(struct drm_panel *panel)
170 {
171 	struct drm_connector *connector = panel->connector;
172 	struct drm_display_mode *mode;
173 
174 	mode = drm_mode_duplicate(panel->drm, &default_mode);
175 	if (!mode) {
176 		dev_err(panel->drm->dev, "failed to add mode %ux%ux@%u\n",
177 			default_mode.hdisplay, default_mode.vdisplay,
178 			default_mode.vrefresh);
179 		return -ENOMEM;
180 	}
181 
182 	drm_mode_set_name(mode);
183 
184 	mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
185 	drm_mode_probed_add(connector, mode);
186 
187 	panel->connector->display_info.width_mm = 61;
188 	panel->connector->display_info.height_mm = 103;
189 
190 	return 1;
191 }
192 
193 static int st7789v_prepare(struct drm_panel *panel)
194 {
195 	struct st7789v *ctx = panel_to_st7789v(panel);
196 	int ret;
197 
198 	ret = regulator_enable(ctx->power);
199 	if (ret)
200 		return ret;
201 
202 	gpiod_set_value(ctx->reset, 1);
203 	msleep(30);
204 	gpiod_set_value(ctx->reset, 0);
205 	msleep(120);
206 
207 	ST7789V_TEST(ret, st7789v_write_command(ctx, MIPI_DCS_EXIT_SLEEP_MODE));
208 
209 	/* We need to wait 120ms after a sleep out command */
210 	msleep(120);
211 
212 	ST7789V_TEST(ret, st7789v_write_command(ctx,
213 						MIPI_DCS_SET_ADDRESS_MODE));
214 	ST7789V_TEST(ret, st7789v_write_data(ctx, 0));
215 
216 	ST7789V_TEST(ret, st7789v_write_command(ctx,
217 						MIPI_DCS_SET_PIXEL_FORMAT));
218 	ST7789V_TEST(ret, st7789v_write_data(ctx,
219 					     (MIPI_DCS_PIXEL_FMT_18BIT << 4) |
220 					     (MIPI_DCS_PIXEL_FMT_18BIT)));
221 
222 	ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_PORCTRL_CMD));
223 	ST7789V_TEST(ret, st7789v_write_data(ctx, 0xc));
224 	ST7789V_TEST(ret, st7789v_write_data(ctx, 0xc));
225 	ST7789V_TEST(ret, st7789v_write_data(ctx, 0));
226 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PORCTRL_IDLE_BP(3) |
227 					     ST7789V_PORCTRL_IDLE_FP(3)));
228 	ST7789V_TEST(ret, st7789v_write_data(ctx,
229 					     ST7789V_PORCTRL_PARTIAL_BP(3) |
230 					     ST7789V_PORCTRL_PARTIAL_FP(3)));
231 
232 	ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_GCTRL_CMD));
233 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_GCTRL_VGLS(5) |
234 					     ST7789V_GCTRL_VGHS(3)));
235 
236 	ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VCOMS_CMD));
237 	ST7789V_TEST(ret, st7789v_write_data(ctx, 0x2b));
238 
239 	ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_LCMCTRL_CMD));
240 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_LCMCTRL_XMH |
241 					     ST7789V_LCMCTRL_XMX |
242 					     ST7789V_LCMCTRL_XBGR));
243 
244 	ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VDVVRHEN_CMD));
245 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_VDVVRHEN_CMDEN));
246 
247 	ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VRHS_CMD));
248 	ST7789V_TEST(ret, st7789v_write_data(ctx, 0xf));
249 
250 	ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VDVS_CMD));
251 	ST7789V_TEST(ret, st7789v_write_data(ctx, 0x20));
252 
253 	ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_FRCTRL2_CMD));
254 	ST7789V_TEST(ret, st7789v_write_data(ctx, 0xf));
255 
256 	ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_PWCTRL1_CMD));
257 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PWCTRL1_MAGIC));
258 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PWCTRL1_AVDD(2) |
259 					     ST7789V_PWCTRL1_AVCL(2) |
260 					     ST7789V_PWCTRL1_VDS(1)));
261 
262 	ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_PVGAMCTRL_CMD));
263 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP63(0xd)));
264 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP1(0xca)));
265 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP2(0xe)));
266 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP4(8)));
267 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP6(9)));
268 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP13(7)));
269 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP20(0x2d)));
270 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP27(0xb) |
271 					     ST7789V_PVGAMCTRL_VP36(3)));
272 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP43(0x3d)));
273 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_JP1(3) |
274 					     ST7789V_PVGAMCTRL_VP50(4)));
275 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP57(0xa)));
276 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP59(0xa)));
277 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP61(0x1b)));
278 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP62(0x28)));
279 
280 	ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_NVGAMCTRL_CMD));
281 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN63(0xd)));
282 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN1(0xca)));
283 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN2(0xf)));
284 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN4(8)));
285 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN6(8)));
286 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN13(7)));
287 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN20(0x2e)));
288 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN27(0xc) |
289 					     ST7789V_NVGAMCTRL_VN36(5)));
290 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN43(0x40)));
291 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_JN1(3) |
292 					     ST7789V_NVGAMCTRL_VN50(4)));
293 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN57(9)));
294 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN59(0xb)));
295 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN61(0x1b)));
296 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN62(0x28)));
297 
298 	ST7789V_TEST(ret, st7789v_write_command(ctx, MIPI_DCS_ENTER_INVERT_MODE));
299 
300 	ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_RAMCTRL_CMD));
301 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RAMCTRL_DM_RGB |
302 					     ST7789V_RAMCTRL_RM_RGB));
303 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RAMCTRL_EPF(3) |
304 					     ST7789V_RAMCTRL_MAGIC));
305 
306 	ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_RGBCTRL_CMD));
307 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RGBCTRL_WO |
308 					     ST7789V_RGBCTRL_RCM(2) |
309 					     ST7789V_RGBCTRL_VSYNC_HIGH |
310 					     ST7789V_RGBCTRL_HSYNC_HIGH |
311 					     ST7789V_RGBCTRL_PCLK_HIGH));
312 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RGBCTRL_VBP(8)));
313 	ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RGBCTRL_HBP(20)));
314 
315 	return 0;
316 }
317 
318 static int st7789v_enable(struct drm_panel *panel)
319 {
320 	struct st7789v *ctx = panel_to_st7789v(panel);
321 
322 	if (ctx->backlight) {
323 		ctx->backlight->props.state &= ~BL_CORE_FBBLANK;
324 		ctx->backlight->props.power = FB_BLANK_UNBLANK;
325 		backlight_update_status(ctx->backlight);
326 	}
327 
328 	return st7789v_write_command(ctx, MIPI_DCS_SET_DISPLAY_ON);
329 }
330 
331 static int st7789v_disable(struct drm_panel *panel)
332 {
333 	struct st7789v *ctx = panel_to_st7789v(panel);
334 	int ret;
335 
336 	ST7789V_TEST(ret, st7789v_write_command(ctx, MIPI_DCS_SET_DISPLAY_OFF));
337 
338 	if (ctx->backlight) {
339 		ctx->backlight->props.power = FB_BLANK_POWERDOWN;
340 		ctx->backlight->props.state |= BL_CORE_FBBLANK;
341 		backlight_update_status(ctx->backlight);
342 	}
343 
344 	return 0;
345 }
346 
347 static int st7789v_unprepare(struct drm_panel *panel)
348 {
349 	struct st7789v *ctx = panel_to_st7789v(panel);
350 	int ret;
351 
352 	ST7789V_TEST(ret, st7789v_write_command(ctx, MIPI_DCS_ENTER_SLEEP_MODE));
353 
354 	regulator_disable(ctx->power);
355 
356 	return 0;
357 }
358 
359 static const struct drm_panel_funcs st7789v_drm_funcs = {
360 	.disable	= st7789v_disable,
361 	.enable		= st7789v_enable,
362 	.get_modes	= st7789v_get_modes,
363 	.prepare	= st7789v_prepare,
364 	.unprepare	= st7789v_unprepare,
365 };
366 
367 static int st7789v_probe(struct spi_device *spi)
368 {
369 	struct device_node *backlight;
370 	struct st7789v *ctx;
371 	int ret;
372 
373 	ctx = devm_kzalloc(&spi->dev, sizeof(*ctx), GFP_KERNEL);
374 	if (!ctx)
375 		return -ENOMEM;
376 
377 	spi_set_drvdata(spi, ctx);
378 	ctx->spi = spi;
379 
380 	ctx->panel.dev = &spi->dev;
381 	ctx->panel.funcs = &st7789v_drm_funcs;
382 
383 	ctx->power = devm_regulator_get(&spi->dev, "power");
384 	if (IS_ERR(ctx->power))
385 		return PTR_ERR(ctx->power);
386 
387 	ctx->reset = devm_gpiod_get(&spi->dev, "reset", GPIOD_OUT_LOW);
388 	if (IS_ERR(ctx->reset)) {
389 		dev_err(&spi->dev, "Couldn't get our reset line\n");
390 		return PTR_ERR(ctx->reset);
391 	}
392 
393 	backlight = of_parse_phandle(spi->dev.of_node, "backlight", 0);
394 	if (backlight) {
395 		ctx->backlight = of_find_backlight_by_node(backlight);
396 		of_node_put(backlight);
397 
398 		if (!ctx->backlight)
399 			return -EPROBE_DEFER;
400 	}
401 
402 	ret = drm_panel_add(&ctx->panel);
403 	if (ret < 0)
404 		goto err_free_backlight;
405 
406 	return 0;
407 
408 err_free_backlight:
409 	if (ctx->backlight)
410 		put_device(&ctx->backlight->dev);
411 
412 	return ret;
413 }
414 
415 static int st7789v_remove(struct spi_device *spi)
416 {
417 	struct st7789v *ctx = spi_get_drvdata(spi);
418 
419 	drm_panel_remove(&ctx->panel);
420 
421 	if (ctx->backlight)
422 		put_device(&ctx->backlight->dev);
423 
424 	return 0;
425 }
426 
427 static const struct of_device_id st7789v_of_match[] = {
428 	{ .compatible = "sitronix,st7789v" },
429 	{ }
430 };
431 MODULE_DEVICE_TABLE(of, st7789v_of_match);
432 
433 static struct spi_driver st7789v_driver = {
434 	.probe = st7789v_probe,
435 	.remove = st7789v_remove,
436 	.driver = {
437 		.name = "st7789v",
438 		.of_match_table = st7789v_of_match,
439 	},
440 };
441 module_spi_driver(st7789v_driver);
442 
443 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
444 MODULE_DESCRIPTION("Sitronix st7789v LCD Driver");
445 MODULE_LICENSE("GPL v2");
446