1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Novatek NT36523 DriverIC panels driver
4  *
5  * Copyright (c) 2022, 2023 Jianhua Lu <lujianhua000@gmail.com>
6  */
7 
8 #include <linux/delay.h>
9 #include <linux/gpio/consumer.h>
10 #include <linux/module.h>
11 #include <linux/of_device.h>
12 #include <linux/of_graph.h>
13 #include <linux/regulator/consumer.h>
14 
15 #include <drm/drm_connector.h>
16 #include <drm/drm_crtc.h>
17 #include <drm/drm_mipi_dsi.h>
18 #include <drm/drm_modes.h>
19 #include <drm/drm_panel.h>
20 
21 #define DSI_NUM_MIN 1
22 
23 #define mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, cmd, seq...)        \
24 		do {                                                 \
25 			mipi_dsi_dcs_write_seq(dsi0, cmd, seq);      \
26 			mipi_dsi_dcs_write_seq(dsi1, cmd, seq);      \
27 		} while (0)
28 
29 struct panel_info {
30 	struct drm_panel panel;
31 	struct mipi_dsi_device *dsi[2];
32 	const struct panel_desc *desc;
33 
34 	struct gpio_desc *reset_gpio;
35 	struct backlight_device *backlight;
36 	struct regulator *vddio;
37 
38 	bool prepared;
39 };
40 
41 struct panel_desc {
42 	unsigned int width_mm;
43 	unsigned int height_mm;
44 
45 	unsigned int bpc;
46 	unsigned int lanes;
47 	unsigned long mode_flags;
48 	enum mipi_dsi_pixel_format format;
49 
50 	const struct drm_display_mode *modes;
51 	unsigned int num_modes;
52 	const struct mipi_dsi_device_info dsi_info;
53 	int (*init_sequence)(struct panel_info *pinfo);
54 
55 	bool is_dual_dsi;
56 };
57 
58 static inline struct panel_info *to_panel_info(struct drm_panel *panel)
59 {
60 	return container_of(panel, struct panel_info, panel);
61 }
62 
63 static int elish_boe_init_sequence(struct panel_info *pinfo)
64 {
65 	struct mipi_dsi_device *dsi0 = pinfo->dsi[0];
66 	struct mipi_dsi_device *dsi1 = pinfo->dsi[1];
67 	/* No datasheet, so write magic init sequence directly */
68 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
69 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
70 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x05);
71 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20);
72 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
73 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x18, 0x40);
74 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
75 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
76 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x02);
77 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x23);
78 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
79 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x80);
80 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0x84);
81 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x05, 0x2d);
82 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x06, 0x00);
83 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x07, 0x00);
84 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x08, 0x01);
85 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0x45);
86 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11, 0x02);
87 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x12, 0x80);
88 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x15, 0x83);
89 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x16, 0x0c);
90 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29, 0x0a);
91 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0xff);
92 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x31, 0xfe);
93 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x32, 0xfd);
94 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x33, 0xfb);
95 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x34, 0xf8);
96 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0xf5);
97 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x36, 0xf3);
98 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x37, 0xf2);
99 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x38, 0xf2);
100 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0xf2);
101 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0xef);
102 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0xec);
103 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3d, 0xe9);
104 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3f, 0xe5);
105 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x40, 0xe5);
106 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x41, 0xe5);
107 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x13);
108 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x45, 0xff);
109 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x46, 0xf4);
110 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x47, 0xe7);
111 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x48, 0xda);
112 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x49, 0xcd);
113 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4a, 0xc0);
114 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4b, 0xb3);
115 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4c, 0xb2);
116 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4d, 0xb2);
117 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4e, 0xb2);
118 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x99);
119 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x50, 0x80);
120 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x68);
121 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x52, 0x66);
122 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x66);
123 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x54, 0x66);
124 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0x0e);
125 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x58, 0xff);
126 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x59, 0xfb);
127 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5a, 0xf7);
128 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5b, 0xf3);
129 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5c, 0xef);
130 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5d, 0xe3);
131 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5e, 0xda);
132 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5f, 0xd8);
133 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x60, 0xd8);
134 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x61, 0xd8);
135 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x62, 0xcb);
136 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x63, 0xbf);
137 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x64, 0xb3);
138 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x65, 0xb2);
139 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x66, 0xb2);
140 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x67, 0xb2);
141 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a);
142 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
143 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x25, 0x47);
144 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0x47);
145 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0x47);
146 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26);
147 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
148 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x10);
149 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1a, 0xe0);
150 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x10);
151 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x00);
152 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x10);
153 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0xe0);
154 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
155 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
156 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0);
157 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
158 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x84, 0x08);
159 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x85, 0x0c);
160 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20);
161 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
162 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x00);
163 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25);
164 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
165 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x91, 0x1f);
166 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x92, 0x0f);
167 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x93, 0x01);
168 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x94, 0x18);
169 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x95, 0x03);
170 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x96, 0x01);
171 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
172 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb0, 0x01);
173 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25);
174 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
175 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x1f);
176 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x1b);
177 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x24);
178 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
179 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x28);
180 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x27);
181 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
182 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x31);
183 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd1, 0x20);
184 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd2, 0x30);
185 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x08);
186 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xde, 0x80);
187 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdf, 0x02);
188 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26);
189 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
190 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x81);
191 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0xb0);
192 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x22);
193 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
194 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9f, 0x50);
195 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x6f, 0x01);
196 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x70, 0x11);
197 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x73, 0x01);
198 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x74, 0x49);
199 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x76, 0x01);
200 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x77, 0x49);
201 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa0, 0x3f);
202 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa9, 0x50);
203 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xaa, 0x28);
204 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xab, 0x28);
205 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xad, 0x10);
206 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x00);
207 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x49);
208 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xba, 0x49);
209 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x49);
210 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbe, 0x04);
211 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbf, 0x49);
212 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc0, 0x04);
213 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc1, 0x59);
214 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc2, 0x00);
215 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc5, 0x00);
216 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc6, 0x01);
217 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc7, 0x48);
218 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xca, 0x43);
219 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcb, 0x3c);
220 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xce, 0x00);
221 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcf, 0x43);
222 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x3c);
223 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd3, 0x43);
224 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x3c);
225 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd7, 0x00);
226 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdc, 0x43);
227 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdd, 0x3c);
228 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xe1, 0x43);
229 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xe2, 0x3c);
230 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xf2, 0x00);
231 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xf3, 0x01);
232 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xf4, 0x48);
233 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25);
234 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
235 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x13, 0x01);
236 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x14, 0x23);
237 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbc, 0x01);
238 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbd, 0x23);
239 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a);
240 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
241 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x97, 0x3c);
242 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x98, 0x02);
243 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x99, 0x95);
244 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9a, 0x03);
245 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9b, 0x00);
246 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9c, 0x0b);
247 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9d, 0x0a);
248 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9e, 0x90);
249 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x22);
250 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
251 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9f, 0x50);
252 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x23);
253 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
254 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa3, 0x50);
255 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xe0);
256 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
257 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x14, 0x60);
258 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x16, 0xc0);
259 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x02);
260 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0);
261 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
262 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0x08);
263 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xd0);
264 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
265 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x02, 0xaf);
266 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0xee);
267 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x99);
268 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1d, 0x09);
269 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
270 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
271 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x0f, 0xff);
272 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x2c);
273 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0x00);
274 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x13);
275 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0x03, 0xac, 0x1a, 0x04, 0x04);
276 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11);
277 	msleep(70);
278 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29);
279 
280 	return 0;
281 }
282 
283 static int elish_csot_init_sequence(struct panel_info *pinfo)
284 {
285 	struct mipi_dsi_device *dsi0 = pinfo->dsi[0];
286 	struct mipi_dsi_device *dsi1 = pinfo->dsi[1];
287 	/* No datasheet, so write magic init sequence directly */
288 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
289 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
290 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x05);
291 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20);
292 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
293 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x18, 0x40);
294 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
295 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
296 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x02);
297 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xd0);
298 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
299 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x02, 0xaf);
300 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x30);
301 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0xee);
302 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x99);
303 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1d, 0x09);
304 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0);
305 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
306 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0x08);
307 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xe0);
308 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
309 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x02);
310 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20);
311 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
312 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x58, 0x40);
313 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
314 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
315 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0x00);
316 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x23);
317 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
318 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x80);
319 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0x84);
320 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x05, 0x2d);
321 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x06, 0x00);
322 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x07, 0x00);
323 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x08, 0x01);
324 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0x45);
325 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11, 0x02);
326 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x12, 0x80);
327 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x15, 0x83);
328 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x16, 0x0c);
329 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29, 0x0a);
330 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0xff);
331 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x31, 0xfe);
332 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x32, 0xfd);
333 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x33, 0xfb);
334 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x34, 0xf8);
335 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0xf5);
336 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x36, 0xf3);
337 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x37, 0xf2);
338 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x38, 0xf2);
339 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0xf2);
340 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0xef);
341 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0xec);
342 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3d, 0xe9);
343 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3f, 0xe5);
344 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x40, 0xe5);
345 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x41, 0xe5);
346 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x13);
347 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x45, 0xff);
348 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x46, 0xf4);
349 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x47, 0xe7);
350 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x48, 0xda);
351 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x49, 0xcd);
352 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4a, 0xc0);
353 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4b, 0xb3);
354 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4c, 0xb2);
355 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4d, 0xb2);
356 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4e, 0xb2);
357 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x99);
358 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x50, 0x80);
359 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x68);
360 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x52, 0x66);
361 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x66);
362 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x54, 0x66);
363 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0x0e);
364 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x58, 0xff);
365 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x59, 0xfb);
366 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5a, 0xf7);
367 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5b, 0xf3);
368 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5c, 0xef);
369 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5d, 0xe3);
370 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5e, 0xda);
371 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5f, 0xd8);
372 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x60, 0xd8);
373 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x61, 0xd8);
374 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x62, 0xcb);
375 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x63, 0xbf);
376 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x64, 0xb3);
377 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x65, 0xb2);
378 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x66, 0xb2);
379 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x67, 0xb2);
380 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
381 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
382 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x0f, 0xff);
383 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x2c);
384 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x55, 0x00);
385 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x13);
386 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0x03, 0xac, 0x1a, 0x04, 0x04);
387 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a);
388 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
389 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x25, 0x46);
390 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0x46);
391 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0x46);
392 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26);
393 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
394 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0xb0);
395 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x10);
396 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1a, 0xe0);
397 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x10);
398 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x00);
399 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x10);
400 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0xe0);
401 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0);
402 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
403 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x84, 0x08);
404 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x85, 0x0c);
405 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20);
406 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
407 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x00);
408 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25);
409 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
410 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x91, 0x1f);
411 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x92, 0x0f);
412 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x93, 0x01);
413 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x94, 0x18);
414 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x95, 0x03);
415 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x96, 0x01);
416 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
417 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb0, 0x01);
418 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25);
419 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
420 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x1f);
421 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x1b);
422 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x24);
423 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
424 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x28);
425 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x27);
426 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
427 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x31);
428 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd1, 0x20);
429 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x08);
430 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xde, 0x80);
431 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdf, 0x02);
432 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26);
433 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
434 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x81);
435 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0xb0);
436 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x22);
437 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
438 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x6f, 0x01);
439 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x70, 0x11);
440 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x73, 0x01);
441 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x74, 0x4d);
442 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa0, 0x3f);
443 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa9, 0x50);
444 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xaa, 0x28);
445 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xab, 0x28);
446 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xad, 0x10);
447 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x00);
448 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x4b);
449 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xba, 0x96);
450 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x4b);
451 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbe, 0x07);
452 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbf, 0x4b);
453 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc0, 0x07);
454 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc1, 0x5c);
455 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc2, 0x00);
456 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc5, 0x00);
457 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc6, 0x3f);
458 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc7, 0x00);
459 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xca, 0x08);
460 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcb, 0x40);
461 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xce, 0x00);
462 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcf, 0x08);
463 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x40);
464 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd3, 0x08);
465 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x40);
466 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25);
467 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
468 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbc, 0x01);
469 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbd, 0x1c);
470 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a);
471 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
472 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9a, 0x03);
473 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
474 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11);
475 	msleep(70);
476 	mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29);
477 
478 	return 0;
479 }
480 
481 static const struct drm_display_mode elish_boe_modes[] = {
482 	{
483 		/* There is only one 120 Hz timing, but it doesn't work perfectly, 104 Hz preferred */
484 		.clock = (1600 + 60 + 8 + 60) * (2560 + 26 + 4 + 168) * 104 / 1000,
485 		.hdisplay = 1600,
486 		.hsync_start = 1600 + 60,
487 		.hsync_end = 1600 + 60 + 8,
488 		.htotal = 1600 + 60 + 8 + 60,
489 		.vdisplay = 2560,
490 		.vsync_start = 2560 + 26,
491 		.vsync_end = 2560 + 26 + 4,
492 		.vtotal = 2560 + 26 + 4 + 168,
493 	},
494 };
495 
496 static const struct drm_display_mode elish_csot_modes[] = {
497 	{
498 		/* There is only one 120 Hz timing, but it doesn't work perfectly, 104 Hz preferred */
499 		.clock = (1600 + 200 + 40 + 52) * (2560 + 26 + 4 + 168) * 104 / 1000,
500 		.hdisplay = 1600,
501 		.hsync_start = 1600 + 200,
502 		.hsync_end = 1600 + 200 + 40,
503 		.htotal = 1600 + 200 + 40 + 52,
504 		.vdisplay = 2560,
505 		.vsync_start = 2560 + 26,
506 		.vsync_end = 2560 + 26 + 4,
507 		.vtotal = 2560 + 26 + 4 + 168,
508 	},
509 };
510 
511 static const struct panel_desc elish_boe_desc = {
512 	.modes = elish_boe_modes,
513 	.num_modes = ARRAY_SIZE(elish_boe_modes),
514 	.dsi_info = {
515 		.type = "BOE-elish",
516 		.channel = 0,
517 		.node = NULL,
518 	},
519 	.width_mm = 127,
520 	.height_mm = 203,
521 	.bpc = 8,
522 	.lanes = 3,
523 	.format = MIPI_DSI_FMT_RGB888,
524 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM,
525 	.init_sequence = elish_boe_init_sequence,
526 	.is_dual_dsi = true,
527 };
528 
529 static const struct panel_desc elish_csot_desc = {
530 	.modes = elish_csot_modes,
531 	.num_modes = ARRAY_SIZE(elish_csot_modes),
532 	.dsi_info = {
533 		.type = "CSOT-elish",
534 		.channel = 0,
535 		.node = NULL,
536 	},
537 	.width_mm = 127,
538 	.height_mm = 203,
539 	.bpc = 8,
540 	.lanes = 3,
541 	.format = MIPI_DSI_FMT_RGB888,
542 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM,
543 	.init_sequence = elish_csot_init_sequence,
544 	.is_dual_dsi = true,
545 };
546 
547 static void nt36523_reset(struct panel_info *pinfo)
548 {
549 	gpiod_set_value_cansleep(pinfo->reset_gpio, 1);
550 	usleep_range(12000, 13000);
551 	gpiod_set_value_cansleep(pinfo->reset_gpio, 0);
552 	usleep_range(12000, 13000);
553 	gpiod_set_value_cansleep(pinfo->reset_gpio, 1);
554 	usleep_range(12000, 13000);
555 	gpiod_set_value_cansleep(pinfo->reset_gpio, 0);
556 	usleep_range(12000, 13000);
557 }
558 
559 static int nt36523_prepare(struct drm_panel *panel)
560 {
561 	struct panel_info *pinfo = to_panel_info(panel);
562 	int ret;
563 
564 	if (pinfo->prepared)
565 		return 0;
566 
567 	ret = regulator_enable(pinfo->vddio);
568 	if (ret) {
569 		dev_err(panel->dev, "failed to enable vddio regulator: %d\n", ret);
570 		return ret;
571 	}
572 
573 	nt36523_reset(pinfo);
574 
575 	ret = pinfo->desc->init_sequence(pinfo);
576 	if (ret < 0) {
577 		regulator_disable(pinfo->vddio);
578 		dev_err(panel->dev, "failed to initialize panel: %d\n", ret);
579 		return ret;
580 	}
581 
582 	pinfo->prepared = true;
583 
584 	return 0;
585 }
586 
587 static int nt36523_disable(struct drm_panel *panel)
588 {
589 	struct panel_info *pinfo = to_panel_info(panel);
590 	int i, ret;
591 
592 	for (i = 0; i < DSI_NUM_MIN + pinfo->desc->is_dual_dsi; i++) {
593 		ret = mipi_dsi_dcs_set_display_off(pinfo->dsi[i]);
594 		if (ret < 0)
595 			dev_err(&pinfo->dsi[i]->dev, "failed to set display off: %d\n", ret);
596 	}
597 
598 	for (i = 0; i < DSI_NUM_MIN + pinfo->desc->is_dual_dsi; i++) {
599 		ret = mipi_dsi_dcs_enter_sleep_mode(pinfo->dsi[i]);
600 		if (ret < 0)
601 			dev_err(&pinfo->dsi[i]->dev, "failed to enter sleep mode: %d\n", ret);
602 	}
603 
604 	msleep(70);
605 
606 	return 0;
607 }
608 
609 static int nt36523_unprepare(struct drm_panel *panel)
610 {
611 	struct panel_info *pinfo = to_panel_info(panel);
612 
613 	if (!pinfo->prepared)
614 		return 0;
615 
616 	gpiod_set_value_cansleep(pinfo->reset_gpio, 1);
617 	regulator_disable(pinfo->vddio);
618 
619 	pinfo->prepared = false;
620 
621 	return 0;
622 }
623 
624 static void nt36523_remove(struct mipi_dsi_device *dsi)
625 {
626 	struct panel_info *pinfo = mipi_dsi_get_drvdata(dsi);
627 	int ret;
628 
629 	ret = mipi_dsi_detach(pinfo->dsi[0]);
630 	if (ret < 0)
631 		dev_err(&dsi->dev, "failed to detach from DSI0 host: %d\n", ret);
632 
633 	if (pinfo->desc->is_dual_dsi) {
634 		ret = mipi_dsi_detach(pinfo->dsi[1]);
635 		if (ret < 0)
636 			dev_err(&pinfo->dsi[1]->dev, "failed to detach from DSI1 host: %d\n", ret);
637 		mipi_dsi_device_unregister(pinfo->dsi[1]);
638 	}
639 
640 	drm_panel_remove(&pinfo->panel);
641 }
642 
643 static int nt36523_get_modes(struct drm_panel *panel,
644 			       struct drm_connector *connector)
645 {
646 	struct panel_info *pinfo = to_panel_info(panel);
647 	int i;
648 
649 	for (i = 0; i < pinfo->desc->num_modes; i++) {
650 		const struct drm_display_mode *m = &pinfo->desc->modes[i];
651 		struct drm_display_mode *mode;
652 
653 		mode = drm_mode_duplicate(connector->dev, m);
654 		if (!mode) {
655 			dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
656 				m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
657 			return -ENOMEM;
658 		}
659 
660 		mode->type = DRM_MODE_TYPE_DRIVER;
661 		if (i == 0)
662 			mode->type |= DRM_MODE_TYPE_PREFERRED;
663 
664 		drm_mode_set_name(mode);
665 		drm_mode_probed_add(connector, mode);
666 	}
667 
668 	connector->display_info.width_mm = pinfo->desc->width_mm;
669 	connector->display_info.height_mm = pinfo->desc->height_mm;
670 	connector->display_info.bpc = pinfo->desc->bpc;
671 
672 	return pinfo->desc->num_modes;
673 }
674 
675 static const struct drm_panel_funcs nt36523_panel_funcs = {
676 	.disable = nt36523_disable,
677 	.prepare = nt36523_prepare,
678 	.unprepare = nt36523_unprepare,
679 	.get_modes = nt36523_get_modes,
680 };
681 
682 static int nt36523_probe(struct mipi_dsi_device *dsi)
683 {
684 	struct device *dev = &dsi->dev;
685 	struct device_node *dsi1;
686 	struct mipi_dsi_host *dsi1_host;
687 	struct panel_info *pinfo;
688 	const struct mipi_dsi_device_info *info;
689 	int i, ret;
690 
691 	pinfo = devm_kzalloc(dev, sizeof(*pinfo), GFP_KERNEL);
692 	if (!pinfo)
693 		return -ENOMEM;
694 
695 	pinfo->vddio = devm_regulator_get(dev, "vddio");
696 	if (IS_ERR(pinfo->vddio))
697 		return dev_err_probe(dev, PTR_ERR(pinfo->vddio), "failed to get vddio regulator\n");
698 
699 	pinfo->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
700 	if (IS_ERR(pinfo->reset_gpio))
701 		return dev_err_probe(dev, PTR_ERR(pinfo->reset_gpio), "failed to get reset gpio\n");
702 
703 	pinfo->desc = of_device_get_match_data(dev);
704 	if (!pinfo->desc)
705 		return -ENODEV;
706 
707 	/* If the panel is dual dsi, register DSI1 */
708 	if (pinfo->desc->is_dual_dsi) {
709 		info = &pinfo->desc->dsi_info;
710 
711 		dsi1 = of_graph_get_remote_node(dsi->dev.of_node, 1, -1);
712 		if (!dsi1) {
713 			dev_err(dev, "cannot get secondary DSI node.\n");
714 			return -ENODEV;
715 		}
716 
717 		dsi1_host = of_find_mipi_dsi_host_by_node(dsi1);
718 		of_node_put(dsi1);
719 		if (!dsi1_host)
720 			return dev_err_probe(dev, -EPROBE_DEFER, "cannot get secondary DSI host\n");
721 
722 		pinfo->dsi[1] = mipi_dsi_device_register_full(dsi1_host, info);
723 		if (!pinfo->dsi[1]) {
724 			dev_err(dev, "cannot get secondary DSI device\n");
725 			return -ENODEV;
726 		}
727 	}
728 
729 	pinfo->dsi[0] = dsi;
730 	mipi_dsi_set_drvdata(dsi, pinfo);
731 	drm_panel_init(&pinfo->panel, dev, &nt36523_panel_funcs, DRM_MODE_CONNECTOR_DSI);
732 
733 	ret = drm_panel_of_backlight(&pinfo->panel);
734 	if (ret)
735 		return dev_err_probe(dev, ret, "failed to get backlight\n");
736 
737 	drm_panel_add(&pinfo->panel);
738 
739 	for (i = 0; i < DSI_NUM_MIN + pinfo->desc->is_dual_dsi; i++) {
740 		pinfo->dsi[i]->lanes = pinfo->desc->lanes;
741 		pinfo->dsi[i]->format = pinfo->desc->format;
742 		pinfo->dsi[i]->mode_flags = pinfo->desc->mode_flags;
743 
744 		ret = mipi_dsi_attach(pinfo->dsi[i]);
745 		if (ret < 0)
746 			return dev_err_probe(dev, ret, "cannot attach to DSI%d host.\n", i);
747 	}
748 
749 	return 0;
750 }
751 
752 static const struct of_device_id nt36523_of_match[] = {
753 	{
754 		.compatible = "xiaomi,elish-boe-nt36523",
755 		.data = &elish_boe_desc,
756 	},
757 	{
758 		.compatible = "xiaomi,elish-csot-nt36523",
759 		.data = &elish_csot_desc,
760 	},
761 	{},
762 };
763 MODULE_DEVICE_TABLE(of, nt36523_of_match);
764 
765 static struct mipi_dsi_driver nt36523_driver = {
766 	.probe = nt36523_probe,
767 	.remove = nt36523_remove,
768 	.driver = {
769 		.name = "panel-novatek-nt36523",
770 		.of_match_table = nt36523_of_match,
771 	},
772 };
773 module_mipi_dsi_driver(nt36523_driver);
774 
775 MODULE_AUTHOR("Jianhua Lu <lujianhua000@gmail.com>");
776 MODULE_DESCRIPTION("DRM driver for Novatek NT36523 based MIPI DSI panels");
777 MODULE_LICENSE("GPL");
778